CN1642153A - Short-distance wireless personal network signal generator - Google Patents
Short-distance wireless personal network signal generator Download PDFInfo
- Publication number
- CN1642153A CN1642153A CN 200410000933 CN200410000933A CN1642153A CN 1642153 A CN1642153 A CN 1642153A CN 200410000933 CN200410000933 CN 200410000933 CN 200410000933 A CN200410000933 A CN 200410000933A CN 1642153 A CN1642153 A CN 1642153A
- Authority
- CN
- China
- Prior art keywords
- signal generator
- short
- module
- personal network
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Information Transfer Systems (AREA)
Abstract
The invention is a short-distance wireless private network signal generator, comprising emitter module and real-time channel simulator module, and the emitter module is inserted in the real-time channel simulator module, and the main hardware of the signal generator with USB interface bus includes DSP and FPGA. It is connected with a PC through the USB interface, uses application program of the PC to complete man-machine interchange, simulator control, data preparation analysis, channel model setting, etc, and it can output base-band analog signal and digital signal according to IEEE 802.15.4 stipulated standard and can connect with RF module to complete simulating RF channel, and it has good practicality and programmability, wide application range and very strong social and economic effects.
Description
Technical field
The invention belongs to the wireless personal communications industry, be mainly used in low-speed wireless individual net (WPAN) field of supporting IEEE 802.15.4 agreement, provide the testing equipment of the baseband signal that satisfies IEEE 802.15.4 standard.
Background technology
In communication system, requirement communication equipment in various possible communication environments can both keep the excellent communications quality.Once because of the influence of actual environment, signal can be interfered and lose, thus influence communication.And this test is that communication system is requisite.Test is relatively more difficult in actual environment, thereby signal generator can play very big effect.Signal generator is exactly the various input signals that are used for simulating signal processing system in the practical work process, has made things convenient for system debug.So in communications network system, signal generator plays crucial effects.General signal generator is extensively complicated because of operational environment, and the factor that influences signal quality is various, and it is complicated and expensive therefore to develop this equipment.The present invention is exactly for the testing equipment of the baseband signal that satisfies IEEE 802.15.4 standard is provided, and designs a live signal generator that satisfies IEEE 802.15.4 transformat and channel situation.
Summary of the invention
Existing channel simulator generally comprises digital analog converter DAC, analog-digital converter ADC, treatment facility, DAC.After simulator receives the signal of transmitter, through ADC analog signal conversion is become digital signal again, channel simulator carries out the digitlization channel simulation to be handled, and sends in real time through behind the DAC its digital signal being converted to analog signal again.
Short-distance radio personal network signal generator is characterized in that being made up of transmitter module, Real-time Channel emulation module.This signal generator has 4 external interfaces, i.e. USB interface, two-way simulation output interface, digital-quantity output interface and user-programmable output interface.USB interface is responsible for communicating by letter between simulator and the computer, receives the order that PC sends, and sends simulator state etc. to PC; Two-way analog/digital amount output interface is sent system with analog result by different way; The user can produce signal process user-programmable interface outputs such as some self-defined digital quantity/PWM according to the needs programming of oneself.This generator is controlled by PC, produces the I/Q two paths of signals and carries out analog-and digital-amount output.The user-programmable interface makes things convenient for user and other system to carry out seamless link, as the RF module etc.
Transmitter section of the present invention is embedded in the Real-time Channel simulator, and has a USB interface.Saved the ADC analog interface like this, and be connected with PC, can utilize the application program of PC machine end that simulator is controlled and data analysis processing etc. by USB interface.Transmitter is made up of digital signal processor DSP, USB interface, memory, power supply, fifo fifo; Simulator is made up of digital signal processor DSP, memory, fifo fifo, DAC, FPGA; The two connects complex logic device CPLD by FIFO provides various decodings, control signal for two.
The present invention uses 2 dsp processors, and wherein DSP1 is responsible for controlling the USB interface chip, communicates with PC, and after the data that receive and order handled the function of transmitter, through FIFO or cushion synchronous serial interface and DSP2 communicates more.DSP2 carries out last channel simulation to be handled, and produces corresponding waveform and gives FIFO; Send the corresponding command to FPGA simultaneously.FPGA exports Wave data according to order control DAC, each output interface.During FIFO communication, its sky/full scale will is connected on the READY signal of corresponding DSP through decoding.DSP sky can not occur and read and the skip phenomenon when carrying out the FIFO read-write like this, can guarantee reliability of data transmission and real-time.
The decoding of the peripheral components of two DSP is finished by 1 CPLD.This CPLD obtains the signals such as sheet choosing, read-write of peripheral components (USBN9602/3, FIFO, RAM) according to PS, the DS of DSP, MSTROB, IOSTROB, WR and address wire decoding.
The FPGA of output interface part is responsible for finishing the control to DAC, FIFO, produces signals such as sheet choosing that their need, read-write, clock.DSP2 can visit FPGA according to the mode of visit USBN9602/3, the register of FPGA inside is operated, thereby carried out PWM and digital quantity is sent.
Software of the present invention comprises DSP and FPGA two parts.
The present invention compared with prior art, it can produce the baseband signal with numeral and the output of simulation dual mode that satisfies IEEE 802.15.4 standard, can connect to form complete test macro with other circuit modules such as RF easily, can also simulate simultaneously the generalized channel of the emulation that comprises Rayleigh multipath channel, white Gaussian noise channel and frequency deviation, can in the laboratory, finish the measurement of actual channel, reduced on-the-spot engineering test, be convenient in actual engineering, use.The present invention has good practicality and programmability, also may be used on different fields.
Description of drawings
Fig. 1 is a system block diagram of the present invention.It mainly is made of 2 processor DSP and FPGA.Wherein DSP1 is responsible for controlling the USB interface chip, communicates with PC, and after the data that receive and order handled the function of transmitter, through FIFO or cushion synchronous serial interface McBSP and DSP2 communicates more; DSP2 carries out last channel simulation to be handled, and produces corresponding waveform and gives FIFO, sends the corresponding command to FPGA simultaneously; FPGA exports data according to order control DAC and each output interface.
Fig. 2 is a DSP1 program flow diagram of the present invention.Its adopts parallel port guiding, at first DSP1 from the parallel port with the corresponding program designation the FLASH in the program's memory space of DSP1, and carry out corresponding program; Then DSP1 reads the program of DSP2 from FLASH, gives the McBSP0 of DSP2 with this program through the McBSP oral instructions, to the DSP2 channeling conduct; DSP1 also will finish USB control, control FPGA, deal with data, transmit data to DSP2.
Fig. 3 is the program flow diagram of DSP2 of the present invention.It mainly is that the data of being sent here by DSP1 are handled, and the data after will handling are again delivered to each interface, and controls the operating state of each interface.
Embodiment
The present invention utilizes DSP+FPGA to finish the WPAN channel real time simulator of an embedded transmitter.This generator has saved ADC, and is connected with PC by USB interface, the calculated in advance of the processing burden that utilize that the application program of PC finishes that man-machine interaction, simulator control, data prepare to analyze, channel model setting and some has alleviated simulator etc.
The present invention adopts the TMS320VC5402 chip of TI, in this sheet 16K * 16bitsDARAM is arranged, it is the higher 16bits fixed DSP processor of a kind of cost performance, utilizes the McBSP of 2 DSP to carry out some key parameters and the data that need carry out transmitted in both directions are carried out the communication transmission; Use 2 8bitsIDT72V01 to carry out the width expansion as asynchronous unidirectional FIFO, the unidirectional FIFO that forms a 16bits carries out transfer of data.
The present invention adopts the USB interface chip USBN9602/3 of 1.1 standards, its highest transmission rate that 12Mbps is provided; USBN9602/3 is the interface chip of a kind of USB1.1 of support standard of National Semiconductor's production, and the several data interface mode can be provided, and conveniently is connected with controller.
The decoding of the peripheral components of two DSP is to be finished by 1 CPLD among the present invention.This CPLD obtains the signals such as sheet choosing, read-write of USBN9602/3, FIFO, RAM according to PS, the DS of DSP, IS, MSTROB, IOSTROB, WR and address wire decoding.
FPGA among the present invention adopts alteral company, has designed a plurality of PWM o controllers, a plurality of digital quantity output control register in this device, and it also has multiple online programmable mode; The present invention adopts 8 EPC1441 passive serial load modes.
The present invention adopts DAC AD9709 that the 8-Bit two-way transmitter of AD company uses as analog-digital chip, and the maximum slew rate of this chip can reach 125MSPS, may be used on fields such as communication, base station, the synthetic three-D ultrasonic of numeral.Made full use of the two-way parallel input mode of the digital end of AD9709,, finished difference by amplifier AD8041 and change single-ended the two paths of differential signals of its simulation output.
Control Software of the present invention has DSP1 software, and it comprises: USB control, work such as the reception of data, the function of handling transmitter, transmission; DSP2 software is less, mainly is that the data that will be sent here by DSP1 are carried out the channel simulation processing, and the data after will handling are again delivered to each interface, and control the operating state of each interface.FPGA finishes numeral, simulates the concrete control of each interface.
The program of system of the present invention leaves among the FLASH, and it is visited by DSP1; DSP1 adopts the parallel port guiding, and DSP2 adopts the mode of DSP1 to load, and in DSP1 procedure quantity hour, can adopt the McBSP0 guiding; When system start-up, at first DSP1 from the parallel port with the corresponding program designation the FLASH in the program's memory space of DSP1, and carry out corresponding program; Then DSP1 reads the program of DSP2 from FLASH, gives the McBSP0 of DSP2 with this program through the McBSP oral instructions, to the DSP2 channeling conduct.DSP1 also will finish USB control, control FPGA, deal with data, transmit data to DSP2.Being shaken hands by BIO and XF pin between two DSP, is the handshake of parallel system, the coordination of whole procedure is carried out carried out synchronously.
Claims (4)
1, short-distance radio personal network signal generator is characterized in that it is made up of transmitter module and Real-time Channel emulation module, and described signal generator links to each other with PC by USB interface.
2,, it is characterized in that its main hardware is dsp processor and the field programmable processor spare FPGA that 2 disposal abilities reach 100MIPS according to the said short-distance radio personal network of claim 1 signal generator.
3,, it is characterized in that dsp processor chooses the TMS320VC5402 chip according to the said short-distance radio personal network of claim 2 signal generator.
4,, it is characterized in that field programmable processor spare FPGA chooses 8 EPC1441 passive serial load modes according to the said short-distance radio personal network of claim 2 signal generator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410000933 CN1642153A (en) | 2004-01-17 | 2004-01-17 | Short-distance wireless personal network signal generator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410000933 CN1642153A (en) | 2004-01-17 | 2004-01-17 | Short-distance wireless personal network signal generator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1642153A true CN1642153A (en) | 2005-07-20 |
Family
ID=34866937
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200410000933 Pending CN1642153A (en) | 2004-01-17 | 2004-01-17 | Short-distance wireless personal network signal generator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1642153A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1332291C (en) * | 2005-11-25 | 2007-08-15 | 北京中星微电子有限公司 | Virtual serial port device |
| CN100465830C (en) * | 2007-02-09 | 2009-03-04 | 上海大学 | Portable vibration controller using USB interface |
| CN105306155A (en) * | 2015-10-30 | 2016-02-03 | 江苏鑫软图无线技术有限公司 | Analog simulation method and device for communication channel |
-
2004
- 2004-01-17 CN CN 200410000933 patent/CN1642153A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1332291C (en) * | 2005-11-25 | 2007-08-15 | 北京中星微电子有限公司 | Virtual serial port device |
| CN100465830C (en) * | 2007-02-09 | 2009-03-04 | 上海大学 | Portable vibration controller using USB interface |
| CN105306155A (en) * | 2015-10-30 | 2016-02-03 | 江苏鑫软图无线技术有限公司 | Analog simulation method and device for communication channel |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107272663B (en) | A kind of quick checking device of 1553B bus type servo-system test equipment | |
| CN101499937A (en) | Software and hardware collaborative simulation verification system and method based on FPGA | |
| CN102455701B (en) | Programmable logic controller (PLC) automatic testing platform using programmable relay structure | |
| CN105718339A (en) | FPGA/CPLD remote debugging system and method | |
| WO2011001462A1 (en) | Test apparatus | |
| CN103294543B (en) | A kind of data mixing processing module based on high-speed bus and Software Radio platform | |
| CN105234942B (en) | The control system and its control method of the big prudent small arm of hydraulic pressure | |
| CN101013394A (en) | Method for checking IC design with hardware logic | |
| CN111812373A (en) | PCIe mainboard signal automatic testing device | |
| CN204946009U (en) | Simulation of power electronic system | |
| CN113865895B (en) | Locomotive and motor train unit control algorithm test system and application method thereof | |
| CN1642153A (en) | Short-distance wireless personal network signal generator | |
| CN203275482U (en) | Data acquisition card of virtual oscilloscope | |
| CN205656302U (en) | Full automatic testing device of universalization radar microwave system performance index | |
| CN106443602A (en) | Miniaturized wireless control test equipment | |
| CN202904427U (en) | Clock tree generation circuit with multiple function modes | |
| CN205103598U (en) | Diesel locomotive computer network laboratory bench | |
| CN107329897A (en) | A kind of DSP array development platforms based on gigabit Ethernet | |
| CN103150952A (en) | Reconfigurable electronic design automation (EDA) experimental platform | |
| CN106097701A (en) | A kind of infrared chip test platform based on FPGA | |
| CN2935267Y (en) | Development checking apparatus of universal chip | |
| CN201903773U (en) | Program debugging device for PLC of power station | |
| CN203340296U (en) | General information processing platform for wireless simulation devicest of various frequencies | |
| CN205656610U (en) | High performance assembly line ADC frequency domain parameter evaluation system based on soPC | |
| CN202937257U (en) | Simulation device of underground nuclear magnetic resonance logging instrument |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |