CN1608320A - 用于包括集成无源器件的非易失存储器器件的封装及其制造方法 - Google Patents

用于包括集成无源器件的非易失存储器器件的封装及其制造方法 Download PDF

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CN1608320A
CN1608320A CNA02826164XA CN02826164A CN1608320A CN 1608320 A CN1608320 A CN 1608320A CN A02826164X A CNA02826164X A CN A02826164XA CN 02826164 A CN02826164 A CN 02826164A CN 1608320 A CN1608320 A CN 1608320A
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passive component
substrate
nonvolatile storage
encapsulation
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迈克尔·沃克
埃莉诺·拉瓦丹姆
米兰·克泽尔
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Intel Corp
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Abstract

根据本发明的一个实施例，存储器器件封装包括具有存储器阵列的集成电路管芯和至少一个安装到衬底上的无源部件。在其他实施例中，焊球阵列可安装在所述无源部件的周围。

Description

用于包括集成无源器件的非易失存储器器件的封装及其制造方法
背景技术
诸如非易失存储器器件之类的存储器器件经常涉及编程/擦除电压电势的使用，并且编程/擦除电压电势通常不同于常规的工作电压电势。因此，可以将存储器器件连接到附加电路，这种附加电路产生并调节用来编程或擦除存储器器件的电压电势。但是，附加电路可能增加了与存储器器件相关的成本。附加电路和部件还可能影响存储器器件的可靠性，这是因为涉及了更多的部件，这些部件的故障可能导致存储器的运行故障。
因而，一直需要更好的方式来封装存储器器件。
附图说明
本说明书的结论部分具体地指出并清楚地要求了有关本发明的主题。但是，通过参照下面详细的描述，并同时阅读附图，可更好地理解本发明的操作方法和构造及其目的、特征和优点，其中：
图1是根据本发明实施例的封装的横截面视图；
图2是图1中所示封装的另一视图；以及
图3和4是根据本发明其他实施例的封装的横截面视图。
应该理解，为简洁清楚地说明，图中所示元件没有按比例绘制。例如，为清楚起见，某些元件的尺寸相对于其他元件则被放大了。
具体实施方式
在下面详细的描述中，为提供对本发明的全面理解，会提到许多具体细节。但是，本领域的技术人员将理解到没有这些具体细节仍可实施本发明。在其他情况下，公知的方法、过程、部件和电路没有详细描述，以免喧宾夺主、混淆本发明。
在下面的描述和权利要求中，可能使用术语“耦合的”和“连接的”及其派生词。应该理解，这两个术语并非彼此同义的。更确切地说，在具体实施例中，“连接的”可用来表示两个或多个元件彼此直接地物理接触或电接触。“耦合的”可能意味着两个或多个元件直接地物理接触或电接触。但是，“耦合的”也可能意味着两个或多个元件并非彼此直接接触，但彼此仍协作或相互作用。
参照图1，这里描述了根据本发明的实施例100。球栅阵列(Ball GridArray，BGA)封装26可包括利用多个焊球34可与外部电路电耦合的衬底28。应该理解到，由于可以使用其他封装，本发明的范围并不限于BGA封装。
封装26可包含例如利用合适的粘合剂而附到衬底28上的集成电路管芯(die)29。粘合剂可包括非导电性材料，以便提供衬底28和集成电路管芯29之间的电绝缘。或者，粘合剂可包括导电材料，以便使集成电路29与衬底28或底下的焊球34电耦合。
虽然本发明的范围并不限于此，但集成电路管芯29可包括非易失存储器阵列，例如电可编程只读存储器(EPROM)、电可擦除可编程只读存储器(EEPROM)、单比特位闪存、多比特位闪存等。
在一个实施例中，电压调节器电路的全部或一部分可形成于封装26的下方。电压调节器可用来提供集成电路管芯29运行过程中需要使用的电压电势。例如，虽然本发明的范围并不限于此，但是电压调节器可提供电压电势，用来编程和/或擦除集成电路管芯29内的非易失存储器。
虽然本发明的范围并不限于此，但是无源部件60-61可装到衬底28上，位于集成电路管芯29的下方。例如无源部件60-61可包括例如电容器、电感器、电阻元件等部件或其他与充电泵电路、电压调节器电路等相关的集成部件。但是这个列表并非意在穷举，因为如果需要，任意数目的有源或无源器件都可模制在封装26内。
无源部件60-61可装在或粘附在衬底28的下表面上，例如使用粘合剂18。粘合剂18可包括非导电性材料，例如环氧树脂，以提供无源部件60和61与衬底28之间的电绝缘。虽然本发明的范围并不限于此，但是在其他实施例中，粘合剂18可包括某种导电材料(例如焊膏)，以使无源部件60-61电耦合到集成电路管芯29。粘合层的厚度可根据需要而变化，但可小于约0.1毫米，以便降低封装26的总厚度。
在集成电路管芯29和衬底28之间可形成焊线接合(wire bond)20，如图1中所示的。或者可替换地，或是除此以外附加地，焊线接合20可在无源部件60-61和衬底28之间形成。焊线接合20可提供与集成电路管芯29、衬底28和/或任一个底下焊球34之间的电连接。虽然本发明的范围并不限于此，但是集成电路管芯29可模制在非导电性的封装剂24内以形成模制阵列封装(molded array package，MAP)。
虽然图1中仅示出了几个无源部件，但应该理解到在其他实施例中，与集成电路管芯29的运行相关的仅一个或所有无源部件都可装到衬底28上。另外，应该理解到，本发明的范围并不限于仅用在非易失存储器器件，或仅用在一般存储器器件。
如图2中所示的，无源部件60-61可装在焊球34的阵列的中央33，但是本发明的范围并不限于此。这可能是人们所期望的，这使得其位置图案(footprint)能够与现有的非PSIP封装相兼容，并节约新的测试硬件和印刷电路板的成本。但是，在其他实施例中，无源部件60-61可位于焊球34的阵列的外部。另外，在考虑到诸如部件可能产生的散热或电噪音/干扰之类的因素的基础上，无源部件60-61可位于衬底28的下表面上的任意位置处。
另外，可能需要选择无源部件和/或焊球34的尺寸，以使无源部件60-61的高度低于焊球34的高度，从而无源部件60-61不会妨碍将封装26安装到其他部件或板上，但本发明的范围并不限于此。在本发明的其他实施例中，如图3中所示的，无源部件60-61的高度可大于焊球34(即，无源部件60-61从衬底28向外伸出更远)。这个高度可用位于印刷电路板上对应于无源部件60位置处的空腔300或其他凹槽来补偿，从而使得无源部件60-61不会妨碍封装26的使用和安装。
参照图4，这里描述了本发明的另一个实施例。为进一步降低无源部件60-61妨碍BGA封装26的安装的风险，可能需要将无源部件60-61安装在衬底28的空腔400内。空腔400可以以各种方式形成。例如，虽然本发明的范围并不限于此，但空腔可以是机器加工、模压或蚀刻衬底28而形成的。或者，衬底28可以是组合几个具有不同厚度的衬底而形成的。
因此，图中所示实施例示出了封装内的电源(power supply inpackage，即PSIP结构，其中与集成电路管芯29的运行相关的至少部分电路或部件可安装到衬底28上)。封装26可基本保持相应的非PSIP封装(例如用于存储器器件、无源部件和电压调节器的独立封装)的形式因子(form factor)，以使封装26可安装在板上分配给具有基本相同特征的相应的非PSIP封装的空间内。因此，可以获得制造成本更低的紧凑封装26，同时且基本保持了相应非PSIP封装(但是更昂贵)的形式因子。
虽然这里已图示并描述了本发明的某些特征，但本领域的技术人员可进行许多改进、替换、变化和等同替换。因此，应该理解到，所附权利要求意在涵盖所有落在本发明的真正精神内的这些改进和变化。

Claims (21)

1.一种非易失存储器封装，包括：
衬底，其具有第一表面和第二表面，所述第一表面在所述第二表面的上方；
集成电路管芯，其包括被安装到所述衬底的第一表面的存储器阵列；
无源部件，其被安装到所述衬底的第二表面。
2.如权利要求1所述的非易失存储器封装，其中所述无源部件与所述集成电路管芯电耦合。
3.如权利要求1所述的非易失存储器封装，还包括被安装到所述衬底的焊球阵列。
4.如权利要求3所述的非易失存储器封装，其中所述无源部件位于所述焊球阵列的中央。
5.如权利要求4所述的非易失存储器封装，其中所述无源部件的高度小于所述焊球的高度。
6.如权利要求1所述的非易失存储器封装，其中所述无源部件是耦合到所述集成电路管芯的电压调节器电路的至少一部分。
7.如权利要求1所述的非易失存储器封装，其中所述衬底包括空腔，且所述无源部件的至少一部分位于所述空腔内。
8.如权利要求7所述的非易失存储器封装，还包括被安装到所述衬底的焊球阵列，其中所述无源部件的高度小于所述焊球的高度。
9.如权利要求1所述的非易失存储器封装，其中利用环氧树脂材料将所述无源部件安装到所述衬底的第二表面。
10.如权利要求9所述的非易失存储器封装，其中在所述无源部件和所述衬底之间的环氧树脂材料的厚度小于约0.1毫米。
11.如权利要求1所述的非易失存储器封装，其中利用导电材料将所述无源部件安装到所述衬底的第二表面。
12.如权利要求1所述的非易失存储器封装，其中所述无源部件包括电容器或电感器。
13.如权利要求1所述的存储器器件，其中所述集成电路管芯包括闪存阵列。
14.如权利要求1所述的存储器器件，还包括被安装到所述衬底的第二表面的多个无源器件。
15.一种封装非易失存储器的方法，包括：
提供具有第一表面和第二表面的衬底；
将所述非易失存储器安装到所述衬底的第一表面；以及
将无源部件安装到所述衬底的第二表面。
16.如权利要求15所述的方法，还包括：
将焊球阵列围绕着所述无源部件安装到所述衬底的第二表面。
17.如权利要求15所述的方法，其中安装所述无源部件的步骤包括将所述无源部件安装在所述衬底的空腔内。
18.一种方法，包括：
将包括非易失存储器阵列的集成电路安装到衬底的第一表面；以及
将电压调节器的至少一部分安装到所述衬底的第二表面，所述电压调节器与所述非易失存储器阵列电耦合。
19.如权利要求18所述的方法，还包括将焊球阵列安装到所述衬底的第二表面。
20.如权利要求18所述的方法，其中安装所述电压调节器的至少一部分的步骤包括将无源部件安装到所述衬底的第二表面。
21.如权利要求20所述的方法，其中将无源部件安装到所述第二表面的步骤包括将所述无源部件安装在所述衬底的空腔内。
CNA02826164XA 2001-12-28 2002-12-10 用于包括集成无源器件的非易失存储器器件的封装及其制造方法 Pending CN1608320A (zh)

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