CN1575510A - 用于管芯附着应用的粘合晶片 - Google Patents
用于管芯附着应用的粘合晶片 Download PDFInfo
- Publication number
- CN1575510A CN1575510A CNA028210115A CN02821011A CN1575510A CN 1575510 A CN1575510 A CN 1575510A CN A028210115 A CNA028210115 A CN A028210115A CN 02821011 A CN02821011 A CN 02821011A CN 1575510 A CN1575510 A CN 1575510A
- Authority
- CN
- China
- Prior art keywords
- adhesive
- film
- substrate
- semiconductor
- cutting belt
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01027—Cobalt [Co]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01087—Francium [Fr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/0665—Epoxy resin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Die Bonding (AREA)
- Adhesives Or Adhesive Processes (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Dicing (AREA)
Abstract
使用为膏剂粘合剂使用而构造的标准管芯粘附设备用无支撑的薄膜粘合剂或支撑在刚性载体上的粘合剂可以完成CSP或层叠芯片CSP的制造。
Description
技术领域
[0001]本发明涉及在半导体封装的制造中使用的粘合剂和键合方法。本发明特别对制造芯片尺寸和层叠的管芯封装有用。
背景技术
[0002]芯片尺寸封装(CSP)在半导体封装中提供轻重量、小管脚(footprint)、高密度和提高的电气性能的优点。包括依次层叠的一个或多个集成半导体芯片的CSP进一步提高电气性能和减小空间和重量。
[0003]半导体被机械地和电气地连接到衬底,其又连接到其他器件或外部电源。衬底可以是刚性的如金属引线框架、陶瓷或叠片,或者它可以是柔性的如聚酰亚胺带。
[0004]将半导体连接到其衬底的一种公知方法是线键合,其中首先用膏剂或薄膜粘合剂将半导体芯片粘附到衬底,然后用细金属线将芯片上的有源端键合到衬底上的有源端。
[0005]历史上,膏剂粘合剂比薄膜粘合剂更经常使用。但是,使用薄膜粘合剂可更成功地制造某些CSP,因为薄膜可以更精确地适于芯片布局(x-y容差),粘合层有最小的流失或没有流失,并且更容易控制粘合剂层厚度和粘合剂层倾斜。
[0006]但是,在制造芯片尺寸和层叠芯片尺寸封装中薄膜工艺和设备增加成本并且增加工艺时间。使用通常称为“拾起-和-放置”设备的放置机器,将半导体元件放置在它们合适的衬底上。该设备对于可靠地且足够精确地放置元件是重要的以便以成本效率的方式满足生产量需求。
[0007]在使用薄膜粘合剂制造CSP的一种方法中,由薄膜切开的贴花(decal)被拾起并放置在衬底上,并利用压力和热量层叠。然后半导体芯片被拾起并放置在粘合剂上,并用压力和/或热量层压到粘合剂。除拾起-和-放置设备之外,该方法需要专门的薄膜处理和层压设备。
[0008]在使用薄膜粘合剂的另一方法中,使用压力和/或热量将贴花冲压和层压在衬底上,然后将半导体芯片拾起并放置在粘合剂上且利用压力和/或热量层压到粘合剂。该方法需要为每个希望的贴花(decal)形状设置分开的冲压机以及专门的冲压机和薄膜层叠设备。
[0009]也可以使用上述两种方法和设备制造层叠芯片CSP,尽管需要的薄膜材料可能需要不同的厚度和显示出不同的流动性能。用于层叠芯片的工艺需要拾起和放置薄膜粘合剂的贴花在衬底上,并加热和加压,拾起和放置管芯在粘合剂上,且加热和加压。重复该工序,但是在此情况下粘合剂的贴花放置在第一(母)芯片的顶部且层压,接着在母芯片上放置几何形状相同或不同的第二(子)芯片。然后层压子芯片。一般,母芯片和子芯片放置和层压都需要专门的薄膜层压设备。
[0010]在另一方法中,粘合剂薄膜被直接层压到半导体晶片的背侧,然后使用一般的晶片切割设备切割成单个管芯(单数化(singulation))。粘合剂保持为层叠到单个管芯上并且现在拾起管芯并放置到衬底上,或在管芯堆叠的情况下放置到另一管芯上。利用压力和/或热量将管芯层叠到衬底或第一管芯。该方法需要专门的薄膜层压设备以及专门的薄膜管芯键合设备。
[0011]尽管用于CSP和层叠芯片CSP的薄膜粘合剂有优点,但是半导体封装工业有一个比较重要的因素,由于更低的成本、容易使用以及工业中该设备的可用性,更喜欢用于膏剂粘合剂涂覆的工艺和设备。
[0012]用于使用膏剂粘合剂将半导体芯片键合到衬底的标准拾起-和-放置设备,首先将膏剂粘合剂分配到衬底上,然后拾起芯片并将芯片放置到粘合剂上。在放置过程中衬底搁在其上的放置台可被加热或不被加热,但是通过拾起-和-放置工具施加的压力可用于优化管芯粘附的质量。这类设备一般不具有后层叠(post lamination)能力并且目前比使用薄膜所需要的设备更便宜。
[0013]使用这类设备的拾起-和-放置、加热以及加压部件借助薄膜粘合剂制造具有单个芯片或层叠芯片的半导体封装的潜能具有时间和成本的优点。避免了昂贵的冲压组件以及层压部件,以及操作本身花费较少时间。而且,一般的半导体封装工艺需要晶片切割能力以及对薄膜的物理性能的合适选择,该切割设备可用于将薄膜粘合剂切割为适当的结构。
发明内容
[0014]现在已发现可以用无支撑的薄膜粘合剂或支撑在刚性载体上的粘合剂利用为使用膏剂粘合剂构造的标准管芯粘附设备完成CSP或层叠芯片CSP的制造。本发明是用于使用无支撑薄膜粘合剂或支撑在刚性载体上的粘合剂制造半导体的方法。
具体实施方式
[0015]无支撑的粘合剂可以是具有模量高于120MPa和与晶片切割带的粘附力小于0.1MPa的任意热塑性、热固性或热塑性和热固性粘合剂的组合物。合适的粘合剂是环氧树脂、氰酸盐酯、聚酰亚胺、硅氧烷聚酰亚胺、顺丁烯二酰亚胺、硅树脂或这些粘合剂的任意组合物。
[0016]支撑的粘合剂由在一侧或两侧上涂敷热塑性或热固性粘合剂的刚性载体构成,热塑性或热固性粘合剂显示出与晶片切割带的粘附力小于0.1MPa。如果两侧都涂敷,在每一侧上的粘合剂可以是相同或不同的组成。刚性层的存在便于在切断和拾起-和-放置过程中的处理以及在特别厚和在两个键合表面之间需要受控制的距离的情况下用作隔片。
[0017]刚性载体可以是无机材料如陶瓷、硅或金属,或可以是有机材料如聚酰亚胺或聚酯,或可以是无机和有机材料的任意组合物如整个合成物显示出120MPa的模量和与切割带的粘附力小于0.1MPa的FR-和BT层压板。
[0018]在这些物理参数内,支撑的或无支撑的粘合剂都可以通过用来处理半导体晶片的标准设备处理,如用于晶片切割带的涂敷器(applicator)、切割锯以及拾起-和-放置设备(具有加热部件的管芯键合机)。使用标准晶片切割带层压设备将粘合剂涂敷到晶片切割带。然后在和硅晶片切割同样的工序中将粘合剂锯为单个贴花。(由于避免了过量处理和十分薄的易碎晶片的层压,因此该方法优于晶片背侧层压方法。)
[0019]用和使用一般膏剂键合器的管芯粘附一样的方法执行粘合剂粘附。粘合剂贴花被从晶片切割带拾起并放置到选定的衬底上并使用压力和/或热量层压到衬底。然后半导体管芯被拾起并放置到粘合剂上以及使用压力和/或热量层压。
[0020]对于层叠芯片尺寸封装,使用在先粘附的半导体芯片作为衬底重复该工序多次,重复的次数与需要层叠在一起的半导体管芯的数目相同。
[0021]在下面例1和例2中,薄膜粘合剂具有高于120MPa的模量并且对晶片切割带的粘附力小于0.1MPa。例子3中的载体不满足该这些条件。
[0022]例1:使用层叠设备在下列条件下将提供为12英寸×12英寸×2密耳厚片的薄膜热固性环氧粘合剂(来自Ablestik实验室的RP571-10),层叠到BT层叠板(三菱财团气体化学有限公司,8英寸×8英寸×8密耳厚度)的两侧上:
速度: 30.5厘米/分
温度: 135°F
压力: 40psi
[0023]然后将层压粘合剂安装在切割带上(Nitto SPV224)并使用设为以下参数的Disco DAD320切割机切割成4毫米×6毫米贴花:
刀片: NBC-ZH27HEEE
主轴转速: 30000转/分
进料速率: 2.54厘米/秒
切割模式: 向下切割
[0024]用具有拾起-和-放置能力的ESEC Die Bonder 2007 LOC管芯键合器测试切割的粘合剂的被处理能力,两次试验设为以下参数:
试验 #1 #2
拾起z-高度(密耳) 177 177
拾起时间(毫秒) 50 50
箔接触时间(毫秒) 60 0
针顶部高度(密耳) 45 45
喷射器高度偏移量(密耳) 9.8 9.8
针速度(毫米/秒) 30 30
成功次数/试验次数 10/10 10/10
[0025]为两个箔接触时间的每一个进行十次测试,且两个箔接触时间的每一个成功十次。该例子说明使用标准拾起-和-放置设备能从晶片切割带拾下粘合剂。
[0026]例2:单层聚乙烯(美国塑料30.48厘米×30.48厘米×3密耳厚度)安装在Nitto SPV-224切割带上并使用Disco DAD 320切割机用NBC-ZH 27HEEE刀片、30000转/分的主轴转速以及进料速率2.54厘米/秒将其切割成4毫米×6毫米尺寸。切割条件是:
切割模式 A
切割形状 正方形
主轴转速 32000转/分
工件厚度 7密耳
带厚 3密耳
刀片高度 2密耳
进料速度 0.5厘米/秒
Y指数 CH10.4厘米
CH20.6厘米
[0027]用具有拾起-和-放置性能的ESEC Die Bonder 2007 LOC管芯键合器测试切割的粘合剂的被处理能力,键合器设为以下参数:
拾起z高度(毫米) 6.00至5.52
拾起时间(毫秒) 600至6000
箔接触时间(毫秒) 200
针顶部高度(毫米) 0至1.80
喷射器高度偏移量(毫米) 0
针速度(毫米/秒) 30至110
键合臂状态 停放位置
喷射器状态 定标高度
针状态 底部位置
键合臂z定位(毫米) 2.17
芯片厚度(毫米) 0.17
针类型 圆头
成功次数/试验次数 10/10
[0028]例3:进行与例子2一样的测试,除衬底材料是5密耳的硅树脂以外。十次测试中拾起失败十次。
Claims (3)
1.一种制造半导体封装的方法,其中用粘合剂薄膜将半导体管芯粘结到衬底,该方法包括:
a.在晶片切割带上提供薄膜粘合剂,其中薄膜粘合剂具有高于120MPa的模量以及对晶片切割带小于0.1MPa的粘附力;
b.将晶片切割带上的薄膜粘合剂切割为贴花;
c.从切割带拾起粘合剂贴花并将粘合剂贴花放置在衬底上;
d.使用压力和/或热量将粘合剂贴花层压到衬底;
e.将半导体管芯拾起并放置到粘合剂上;以及
f.使用压力和/或热量将管芯层压到粘合剂上。
2.一种制造半导体封装的方法,其中将多个半导体管芯堆叠在一起,该方法包括首先执行权利要求1的方法,然后使用先前粘结的半导体芯片作为衬底多次重复权利要求1的方法,重复次数与所需要的将被层压在一起的半导体管芯的数目相同。
3.根据权利要求1或2的方法,其中薄膜粘合剂是无支撑的热塑性或热固性薄膜或支撑在刚性载体上的热塑性或热固性薄膜。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/040,674 US6620651B2 (en) | 2001-10-23 | 2001-10-23 | Adhesive wafers for die attach application |
US10/040,674 | 2001-10-23 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1575510A true CN1575510A (zh) | 2005-02-02 |
CN1303660C CN1303660C (zh) | 2007-03-07 |
Family
ID=21912302
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB028210115A Expired - Fee Related CN1303660C (zh) | 2001-10-23 | 2002-10-02 | 用粘合剂薄膜将半导体管芯粘结到衬底的半导体封装方法 |
Country Status (8)
Country | Link |
---|---|
US (1) | US6620651B2 (zh) |
EP (1) | EP1438741A2 (zh) |
JP (1) | JP4261356B2 (zh) |
KR (1) | KR100906355B1 (zh) |
CN (1) | CN1303660C (zh) |
AU (1) | AU2002334780A1 (zh) |
TW (1) | TW586192B (zh) |
WO (1) | WO2003036715A2 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102169824A (zh) * | 2010-02-03 | 2011-08-31 | 志圣工业股份有限公司 | 晶圆压膜工艺及其设备 |
Families Citing this family (41)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100401020B1 (ko) | 2001-03-09 | 2003-10-08 | 앰코 테크놀로지 코리아 주식회사 | 반도체칩의 스택킹 구조 및 이를 이용한 반도체패키지 |
JP4800524B2 (ja) * | 2001-09-10 | 2011-10-26 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法、及び、製造装置 |
JP2003100781A (ja) * | 2001-09-25 | 2003-04-04 | Mitsubishi Electric Corp | 半導体製造装置、半導体装置の製造方法及び半導体装置 |
US20060255446A1 (en) | 2001-10-26 | 2006-11-16 | Staktek Group, L.P. | Stacked modules and method |
US7656678B2 (en) | 2001-10-26 | 2010-02-02 | Entorian Technologies, Lp | Stacked module systems |
US7026708B2 (en) * | 2001-10-26 | 2006-04-11 | Staktek Group L.P. | Low profile chip scale stacking system and method |
US6914324B2 (en) * | 2001-10-26 | 2005-07-05 | Staktek Group L.P. | Memory expansion and chip scale stacking system and method |
US6956284B2 (en) * | 2001-10-26 | 2005-10-18 | Staktek Group L.P. | Integrated circuit stacking system and method |
US7485951B2 (en) * | 2001-10-26 | 2009-02-03 | Entorian Technologies, Lp | Modularized die stacking system and method |
US20030234443A1 (en) * | 2001-10-26 | 2003-12-25 | Staktek Group, L.P. | Low profile stacking system and method |
US7081373B2 (en) * | 2001-12-14 | 2006-07-25 | Staktek Group, L.P. | CSP chip stack with flex circuit |
US6831132B2 (en) * | 2002-03-28 | 2004-12-14 | Henkel Corporation | Film adhesives containing maleimide compounds and methods for use thereof |
US7312534B2 (en) * | 2002-06-17 | 2007-12-25 | Henkel Corporation | Interlayer dielectric and pre-applied die attach adhesive materials |
US7176044B2 (en) * | 2002-11-25 | 2007-02-13 | Henkel Corporation | B-stageable die attach adhesives |
JP2005045023A (ja) * | 2003-07-22 | 2005-02-17 | Toshiba Corp | 半導体装置の製造方法および半導体製造装置 |
US7306971B2 (en) * | 2004-03-02 | 2007-12-11 | Chippac Inc. | Semiconductor chip packaging method with individually placed film adhesive pieces |
US7074695B2 (en) * | 2004-03-02 | 2006-07-11 | Chippac, Inc. | DBG system and method with adhesive layer severing |
US20050208700A1 (en) * | 2004-03-19 | 2005-09-22 | Chippac, Inc. | Die to substrate attach using printed adhesive |
US20050224919A1 (en) * | 2004-04-01 | 2005-10-13 | Chippac, Inc | Spacer die structure and method for attaching |
US20050224959A1 (en) * | 2004-04-01 | 2005-10-13 | Chippac, Inc | Die with discrete spacers and die spacing method |
US7190058B2 (en) * | 2004-04-01 | 2007-03-13 | Chippac, Inc. | Spacer die structure and method for attaching |
US8552551B2 (en) * | 2004-05-24 | 2013-10-08 | Chippac, Inc. | Adhesive/spacer island structure for stacking over wire bonded die |
US20050269692A1 (en) | 2004-05-24 | 2005-12-08 | Chippac, Inc | Stacked semiconductor package having adhesive/spacer structure and insulation |
US20050258527A1 (en) * | 2004-05-24 | 2005-11-24 | Chippac, Inc. | Adhesive/spacer island structure for multiple die package |
US20050258545A1 (en) * | 2004-05-24 | 2005-11-24 | Chippac, Inc. | Multiple die package with adhesive/spacer structure and insulated die surface |
JP4003780B2 (ja) | 2004-09-17 | 2007-11-07 | カシオ計算機株式会社 | 半導体装置及びその製造方法 |
US20070154157A1 (en) * | 2005-12-30 | 2007-07-05 | Horine Bryce D | Quasi-waveguide printed circuit board structure |
US20070178666A1 (en) * | 2006-01-31 | 2007-08-02 | Stats Chippac Ltd. | Integrated circuit system with waferscale spacer system |
US7675180B1 (en) | 2006-02-17 | 2010-03-09 | Amkor Technology, Inc. | Stacked electronic component package having film-on-wire spacer |
US20080237824A1 (en) * | 2006-02-17 | 2008-10-02 | Amkor Technology, Inc. | Stacked electronic component package having single-sided film spacer |
US7633144B1 (en) | 2006-05-24 | 2009-12-15 | Amkor Technology, Inc. | Semiconductor package |
US7417310B2 (en) | 2006-11-02 | 2008-08-26 | Entorian Technologies, Lp | Circuit module having force resistant construction |
TW200832532A (en) * | 2007-01-23 | 2008-08-01 | Advanced Semiconductor Eng | Method for cutting a wafer and method for manufacturing semiconductor package by using multiple tape |
US8178419B2 (en) | 2008-02-05 | 2012-05-15 | Twin Creeks Technologies, Inc. | Method to texture a lamina surface within a photovoltaic cell |
CN101905625B (zh) * | 2010-07-14 | 2013-11-27 | 蔡宗翰 | 美耐皿容器的多面贴花制程 |
US8313982B2 (en) | 2010-09-20 | 2012-11-20 | Texas Instruments Incorporated | Stacked die assemblies including TSV die |
US8916954B2 (en) | 2012-02-05 | 2014-12-23 | Gtat Corporation | Multi-layer metal support |
US8841161B2 (en) | 2012-02-05 | 2014-09-23 | GTAT.Corporation | Method for forming flexible solar cells |
US8785294B2 (en) | 2012-07-26 | 2014-07-22 | Gtat Corporation | Silicon carbide lamina |
WO2014028349A1 (en) * | 2012-08-15 | 2014-02-20 | Gtat Corporation | Bonding of thin lamina |
KR20140139212A (ko) * | 2013-05-27 | 2014-12-05 | 제일모직주식회사 | 다이싱 다이본딩 필름 |
Family Cites Families (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CH628926A5 (de) | 1977-02-16 | 1982-03-31 | Guenter Schwarz | Mehrschichtiges klebematerial. |
IE55238B1 (en) * | 1983-08-03 | 1990-07-04 | Nat Starch Chem Corp | Carrier film with conductive adhesive for dicing of semiconductor wafers |
US4874721A (en) | 1985-11-11 | 1989-10-17 | Nec Corporation | Method of manufacturing a multichip package with increased adhesive strength |
JPH06101486B2 (ja) * | 1986-03-05 | 1994-12-12 | 東芝ケミカル株式会社 | 半導体チツプの接着取付け方法 |
US4793883A (en) * | 1986-07-14 | 1988-12-27 | National Starch And Chemical Corporation | Method of bonding a semiconductor chip to a substrate |
JP2918574B2 (ja) * | 1989-09-29 | 1999-07-12 | 株式会社日立製作所 | 半導体装置 |
JP2994510B2 (ja) | 1992-02-10 | 1999-12-27 | ローム株式会社 | 半導体装置およびその製法 |
WO1993023982A1 (en) | 1992-05-11 | 1993-11-25 | Nchip, Inc. | Stacked devices for multichip modules |
US5279991A (en) | 1992-05-15 | 1994-01-18 | Irvine Sensors Corporation | Method for fabricating stacks of IC chips by segmenting a larger stack |
US5286679A (en) | 1993-03-18 | 1994-02-15 | Micron Technology, Inc. | Method for attaching a semiconductor die to a leadframe using a patterned adhesive layer |
US6046072A (en) | 1993-03-29 | 2000-04-04 | Hitachi Chemical Company, Ltd. | Process for fabricating a crack resistant resin encapsulated semiconductor chip package |
JPH08508526A (ja) * | 1993-04-05 | 1996-09-10 | ミネソタ・マイニング・アンド・マニュファクチュアリング・カンパニー | 電子用途のための再使用可能ポリ(エチレン−ビニルアルコール)接着剤 |
US5323060A (en) | 1993-06-02 | 1994-06-21 | Micron Semiconductor, Inc. | Multichip module having a stacked chip arrangement |
US5548160A (en) | 1994-11-14 | 1996-08-20 | Micron Technology, Inc. | Method and structure for attaching a semiconductor die to a lead frame |
US5600183A (en) | 1994-11-15 | 1997-02-04 | Hughes Electronics | Multi-layer film adhesive for electrically isolating and grounding an integrated circuit chip to a printed circuit substrate |
US5635010A (en) | 1995-04-14 | 1997-06-03 | Pepe; Angel A. | Dry adhesive joining of layers of electronic devices |
US5564181A (en) | 1995-04-18 | 1996-10-15 | Draper Laboratory, Inc. | Method of fabricating a laminated substrate assembly chips-first multichip module |
US6281044B1 (en) * | 1995-07-31 | 2001-08-28 | Micron Technology, Inc. | Method and system for fabricating semiconductor components |
JP3467611B2 (ja) | 1995-09-29 | 2003-11-17 | 日本テキサス・インスツルメンツ株式会社 | 半導体装置の製造方法 |
JP3085356B2 (ja) * | 1996-04-23 | 2000-09-04 | 日立電線株式会社 | リードフレームのダイパット部への接着テープの貼付方法 |
US5776799A (en) | 1996-11-08 | 1998-07-07 | Samsung Electronics Co., Ltd. | Lead-on-chip type semiconductor chip package using an adhesive deposited on chip active surfaces at a wafer level and method for manufacturing same |
US5879965A (en) | 1997-06-19 | 1999-03-09 | Micron Technology, Inc. | Plastic lead frames for semiconductor devices, packages including same, and methods of fabrication |
JPH11154687A (ja) * | 1997-09-18 | 1999-06-08 | Hitachi Chem Co Ltd | 回路板 |
US6023094A (en) | 1998-01-14 | 2000-02-08 | National Semiconductor Corporation | Semiconductor wafer having a bottom surface protective coating |
US6175149B1 (en) | 1998-02-13 | 2001-01-16 | Micron Technology, Inc. | Mounting multiple semiconductor dies in a package |
WO1999048140A1 (en) | 1998-03-19 | 1999-09-23 | The Regents Of The University Of California | Attachment method for stacked integrated circuit (ic) chips |
US5972735A (en) * | 1998-07-14 | 1999-10-26 | National Starch And Chemical Investment Holding Corporation | Method of preparing an electronic package by co-curing adhesive and encapsulant |
EP0979852B1 (en) * | 1998-08-10 | 2004-01-28 | LINTEC Corporation | A dicing tape and a method of dicing a semiconductor wafer |
US6210522B1 (en) | 1999-06-15 | 2001-04-03 | Lexmark International, Inc. | Adhesive bonding laminates |
US6228687B1 (en) | 1999-06-28 | 2001-05-08 | Micron Technology, Inc. | Wafer-level package and methods of fabricating |
SG109426A1 (en) * | 1999-08-16 | 2005-03-30 | Nat Starch Chem Invest | Film adhesive composition for electronic packaging |
US6212767B1 (en) | 1999-08-31 | 2001-04-10 | Micron Technology, Inc. | Assembling a stacked die package |
AU1927501A (en) | 1999-11-24 | 2001-06-04 | International Rectifier Corporation | Power semiconductor die attach process using conductive adhesive film |
JP4230080B2 (ja) * | 2000-02-18 | 2009-02-25 | リンテック株式会社 | ウエハ貼着用粘着シート |
US6514795B1 (en) * | 2001-10-10 | 2003-02-04 | Micron Technology, Inc. | Packaged stacked semiconductor die and method of preparing same |
-
2001
- 2001-10-23 US US10/040,674 patent/US6620651B2/en not_active Expired - Fee Related
-
2002
- 2002-10-02 EP EP02802114A patent/EP1438741A2/en not_active Withdrawn
- 2002-10-02 CN CNB028210115A patent/CN1303660C/zh not_active Expired - Fee Related
- 2002-10-02 WO PCT/US2002/031350 patent/WO2003036715A2/en active Application Filing
- 2002-10-02 KR KR1020047005919A patent/KR100906355B1/ko not_active IP Right Cessation
- 2002-10-02 JP JP2003539100A patent/JP4261356B2/ja not_active Expired - Fee Related
- 2002-10-02 AU AU2002334780A patent/AU2002334780A1/en not_active Abandoned
- 2002-10-18 TW TW091124154A patent/TW586192B/zh not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102169824A (zh) * | 2010-02-03 | 2011-08-31 | 志圣工业股份有限公司 | 晶圆压膜工艺及其设备 |
Also Published As
Publication number | Publication date |
---|---|
JP4261356B2 (ja) | 2009-04-30 |
TW586192B (en) | 2004-05-01 |
EP1438741A2 (en) | 2004-07-21 |
WO2003036715A3 (en) | 2003-11-13 |
KR100906355B1 (ko) | 2009-07-06 |
AU2002334780A1 (en) | 2003-05-06 |
US20030087479A1 (en) | 2003-05-08 |
CN1303660C (zh) | 2007-03-07 |
JP2005507172A (ja) | 2005-03-10 |
US6620651B2 (en) | 2003-09-16 |
WO2003036715A2 (en) | 2003-05-01 |
KR20040062574A (ko) | 2004-07-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1303660C (zh) | 用粘合剂薄膜将半导体管芯粘结到衬底的半导体封装方法 | |
EP1195809B1 (en) | Process for producing semiconductor device | |
KR100317648B1 (ko) | 절연접착테이프에의하여다이접착되는반도체소자및다이접착방법그리고그장치 | |
TWI292596B (en) | Manufacturing method of semiconductor device | |
TWI254387B (en) | Wafer stacking package method | |
CN1298204A (zh) | 用于生产半导体器件的工艺 | |
KR100415282B1 (ko) | 반도체 소자용 듀얼 다이 접착 장치 | |
US20050208700A1 (en) | Die to substrate attach using printed adhesive | |
US6784021B2 (en) | Semiconductor device, method of fabricating the same and semiconductor device fabricating apparatus | |
CN100380653C (zh) | 半导体器件及其制造方法 | |
US7306971B2 (en) | Semiconductor chip packaging method with individually placed film adhesive pieces | |
US7687919B2 (en) | Integrated circuit package system with arched pedestal | |
US6517656B1 (en) | Method of making an integrated circuit package using a batch step for curing a die attachment film and a tool system for performing the method | |
JP3771843B2 (ja) | 導電性接着フィルムを用いるパワー半導体ダイの接着方法 | |
US7498202B2 (en) | Method for die attaching | |
US6723620B1 (en) | Power semiconductor die attach process using conductive adhesive film | |
US20240112956A1 (en) | Wafer composite, semiconductor device and methods of manufacturing a semiconductor circuit | |
KR100400762B1 (ko) | 반도체 웨이퍼의 다이본딩방법 | |
Dutt et al. | Wafer Level Silver Sintering Die Attach for Power Discretes | |
JP2005129912A (ja) | 受動素子の供給方法および半導体パッケージ製造用受動素子ならびに受動素子 | |
CN1925121A (zh) | 晶圆级堆叠多芯片的封装方法 | |
TW200411788A (en) | Manufacturing method for MCM package |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
REG | Reference to a national code |
Ref country code: HK Ref legal event code: DE Ref document number: 1072126 Country of ref document: HK |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20070307 Termination date: 20091102 |
|
REG | Reference to a national code |
Ref country code: HK Ref legal event code: WD Ref document number: 1072126 Country of ref document: HK |