CN1378267A - Method for improving separated grid type flash memory oxide layer quality - Google Patents
Method for improving separated grid type flash memory oxide layer quality Download PDFInfo
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- CN1378267A CN1378267A CN 01109733 CN01109733A CN1378267A CN 1378267 A CN1378267 A CN 1378267A CN 01109733 CN01109733 CN 01109733 CN 01109733 A CN01109733 A CN 01109733A CN 1378267 A CN1378267 A CN 1378267A
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Abstract
A method to improve the quality of separate grid flash-storing oxidation layer includes the following steps: providing silicon substrate and forming a tunneling oxidation layer on the substrate, floating a grid and an oxidation layer of compound-crystal silicon on the silicon substrate; and furthermore, carrying out heat oxidation steps as forming oxidation gap wall on the side wall of floating grid as well as increasing the thickness of the oxidation layers of compound crystal silicon and the tunneling oxidation layer, the thickened tunneling oxidation layer used as thick oxidation layer for peripheral high-pressure component grid; and subsequently, forming nitration gap wall on the side wall of oxidation gap wall, removing the thick oxidation layer uncovered by nitration gap wall by using nitration gap well as a cover curtain for exposing the silicon substrate.
Description
The invention relates to the manufacture method of a kind of flash memory (Flash memory), particularly about a kind of method of improving separated grid type flash memory oxide layer quality.
Non-voltile memory (Nonvolatile memory) now is applied in the use of various electronic building bricks, as memory structure data, program data and other can repeated access data.But and on the program non-volatile internal memory, but emphasize especially recently as flash memory structure erase and program read-only memory (Erasable Programmable Read-Only Memory, but EPROM) or can electricity remove and the application of program read-only memory (Electrically Erased Programmable ROM).Usually flash memory has two grids, wherein is divided into the compound crystal silicon made being used for the floating grid (Floating Gate) of store charge, and is used for the control gate (Control Gate) of control data access.Floating grid is positioned at the control gate below, and is in floating state usually, be connected with any circuit, and control gate is common and character line (Word Line) joins.Because the data in the flash memory, therefore actions such as can repeatedly depositing in, read and remove becomes on the semi-conductor market, the product rather fast of growing up.
Recently, semiconductor subassembly reduces cost in order to reach, simplify fabrication steps, the assembly of memory field (Memory cell) and peripheral circuit region (Periphery circuit) is incorporated into becomes a kind of trend gradually on the same chip, for example with the processing procedure framework of DRAM (Dynamic Random Access Memory) (DRAM) and peripheral circuit assembly on same chip, be referred to as embedded DRAM (Embedded DRAM), and flash memory and peripheral circuit assembly are incorporated on the same chip, then be referred to as embedded flash memory (Embedded flash memory).
And pursue reliability (Reliability) at the memory field assembly, peripheral circuit region is pursued under the priority of high-effect (High performance), and considering that assembly applies under the height of voltage, make and be incorporated in the processing procedure of same chip at assembly with memory field and periphery circuit region, assembly needs to make grid oxic horizon, so that can reach requirement in operation with different-thickness.
Figure 1A to Fig. 1 E is the manufacturing process generalized section of known a kind of separate grid type flash memory.Please refer to Figure 1A, a silicon base 100 is provided, then utilize thermal oxidation method on silicon base 100, to form one deck tunnel oxide (Tunneling oxide) 102.Then, on tunnel oxide 102, form one deck first compound crystal silicon layer 104 and one deck silicon nitride layer 106 in regular turn.
Please refer to Figure 1B, definition silicon nitride layer 106 exposes the predetermined cover curtain layer 106a that forms first compound crystal silicon layer 104 of floating grid with formation.Then, utilize thermal oxidation method on first compound crystal silicon layer 104 that is exposed, to form compound crystal silicon oxide layer 108.Because the formed cover curtain layer 106a of silicon nitride material at high temperature has good blocking capability to the diffusion of hydrone and oxygen, therefore, silicon base 100 surfaces that covered at cover curtain layer 106a can't generate silica, and the surface that is not covered by cover curtain layer 106a is then oxidized and form compound crystal silicon oxide layer 108 by silica constituted.In addition, because hydrone and oxygen still have the ability to carry out the diffusion of horizontal direction to the part in cover curtain layer 106a corner, therefore be positioned at the silicon base 100 in cover curtain layer 106a corner, still can produce oxidation in various degree, and make the part of formed compound crystal silicon oxide layer 108 present the outward appearance of beak (Bird ' s beak).
Please refer to Fig. 1 C, divest cover curtain layer 106a, to expose part first compound crystal silicon layer 104.Then, utilize compound crystal silicon oxide layer 108 to be the cover curtain, tunnel oxide 102 is an etch stop layer, removes first compound crystal silicon layer 104 that is exposed, to form a floating grid (Floating gate) 104a on tunnel oxide 102.Then, carry out thermal oxidation method once more and form oxidation clearance wall 110 with sidewall at floating grid 104a.Yet, in the step that forms oxidation clearance wall 110, still can generate silicon oxide layer on exposed compound crystal silicon oxide layer 108 and the tunnel oxide 102 with oxygen and water molecule reaction, so exposed compound crystal silicon oxide layer 108 thickening a little becomes compound crystal silicon oxide layer 108a, and tunnel oxide 102 also a little thickening become thick oxide layer (Thick oxide) 103.Wherein, the thickness of thick oxide layer 103 is tunnel oxide 102 and the summation that forms the oxidated layer thickness that is generated on the tunnel oxide 102 in the step at oxidation clearance wall 110, so the thickness of thick oxide layer 103 is greater than the thickness of tunnel oxide 102.Because compound crystal silicon oxide layer 108a and oxidation clearance wall 110 are coating floating grid 104a, so make the floating grid 104a and the external world present the state of electrical isolation.
Please refer to Fig. 1 D, deposition one deck nitration case (not being illustrated in figure) then carries out etching step in substrate 100, to form nitrogenize clearance wall 112 at oxidation clearance wall 110 sidewalls.
Please refer to Fig. 1 E, in substrate 100, cover one deck second compound crystal silicon layer 114 comprehensively, define second compound crystal silicon layer 114, on compound crystal silicon oxide layer 108a, to form the control gate (Control gate) of separate grid type flash memory.Wherein, the making of separate grid type flash memory is included in substrate 100 surfaces down, and the side of floating grid 104a is formed with gate regions and source area.Because successive process is for to be familiar with the technology that this skill person knows, give unnecessary details so seldom do at this.
Because nitrogenize clearance wall 112 is formed at after thick oxide layer 103 generations, so in the etching process that forms nitrogenize clearance wall 112, can destroy quality (Quality), the uniformity (Uniformity) and thickness (Thickness) of thick oxide layer 103, cause thick oxide layer 103 deteriorations.And because thick oxide layer 103 is the usefulness as the gate oxide of peripheral high potential assembly, so thin thickness of grid oxide layer will make it can bear the decreased number of catching electric charge (Trapping Charge), cause the generation in advance of grid oxic horizon collapse (Oxide Breakdown) phenomenon, and seriously influence the long-term reliability (Long-Term Reliability) of grid oxic horizon.So the deterioration of thick oxide layer 103 will cause the usefulness of peripheral high potential assembly to reduce.
Therefore, main purpose of the present invention is exactly that a kind of method of improving separated grid type flash memory oxide layer quality is being provided, and avoiding the thick oxide layer quality badness as the usefulness of the gate oxide of peripheral high potential assembly, and then keeps the usefulness of peripheral high potential assembly.
The present invention proposes a kind of method of improving separated grid type flash memory oxide layer quality.It comprises the following steps: to provide a silicon base, and forms one deck tunnel oxide, floating grid and compound crystal silicon oxide layer on silicon base.Continue it, carry out step of thermal oxidation, forming the oxidation clearance wall, and relatedly thicken compound crystal silicon oxide layer and tunnel oxide, and the tunnel oxide of thickening becomes thick oxide layer, with usefulness as peripheral high potential assembly gate oxide at the sidewall of floating grid.Because floating grid is coated by compound crystal silicon oxide layer and oxidation clearance wall, so itself and the extraneous state that presents electrical isolation.Then, forming the nitrogenize clearance wall at oxidation clearance wall sidewall, serves as the cover curtain with the nitrogenize clearance wall then, removes first thick oxide layer that is not hidden by the nitrogenize clearance wall, to expose silicon base.Then, on exposed silicon base, form one deck second thick oxide layer.At last, on the compound crystal silicon oxide layer, form control gate, to finish the making of separate grid type flash memory.
The invention is characterized in and remove the thick oxide layer that destroyed by etching earlier, again on exposed silicon base, form thick oxide layer again as the usefulness of peripheral high potential assembly gate oxide, keeping the due quality of thick oxide layer, uniformity and thickness, and then possess the due usefulness of peripheral high potential assembly.
For the present invention's above-mentioned purpose, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and cooperation institute accompanying drawing elaborate:
The drawing explanation:
Figure 1A to Fig. 1 E is the manufacturing process generalized section of known a kind of separate grid type flash memory; And
Fig. 2 A to Fig. 2 F is according to preferred embodiment of the present invention, a kind of manufacturing process generalized section of separate grid type flash memory.
Description of reference numerals:
100,200 silicon base
102,202 tunnel oxides
103,203,203a, 214 thick oxide layers
104,204 first compound crystal silicon layers
104a, 204a floating grid
106,106a, 206,206a insulating barrier
108,108a, 208,208a compound crystal silicon oxide layer
110,210 oxidation clearance walls
112,212 nitrogenize clearance walls
114,216 second compound crystal silicon layers
Please refer to Fig. 2 A, a silicon base 200 is provided, then on silicon base 200, form the thin oxide layer 202 of one deck tunnel oxide by name.Wherein, the formation method of tunnel oxide 202 forms the silicon oxide layer that thickness is about the 85-95 dust such as being to utilize thermal oxidation method on silicon base 200.Then, form one deck first compound crystal silicon layer 204 and a layer insulating 206 in regular turn on tunnel oxide 202, wherein the material of insulating barrier 206 is such as being silicon nitride.
Please refer to Fig. 2 B, definition insulating barrier 206 exposes the predetermined cover curtain layer 206a that forms first compound crystal silicon layer 204 of floating grid to form one.Then, on first compound crystal silicon layer 204 that is exposed, form compound crystal silicon oxide layer 208, with as the dielectric layer between control gate in the flash memory and floating grid.Wherein, the formation method of compound crystal silicon oxide layer 208 for example is to utilize thermal oxidation method, and preferably wet oxidation process, and its material is such as being silica.
Because the formed cover curtain layer 206a of silicon nitride material at high temperature has good blocking capability to the diffusion of hydrone and oxygen, therefore, silicon base 200 surfaces that covered at cover curtain layer 206a can't generate silica, and the surface that is not covered by cover curtain layer 206a is then oxidized and form compound crystal silicon oxide layer 208 by silica constituted.In addition, because hydrone and oxygen still have the ability to carry out the diffusion of horizontal direction to the part in cover curtain layer 206a corner, therefore be positioned at the silicon base 200 in cover curtain layer 206a corner, still can produce oxidation in various degree, and the part that makes formed compound crystal silicon oxide layer 208 presents the outward appearance of beak, shown in Fig. 2 B.
Please refer to Fig. 2 C, divest cover curtain layer 206a, to expose part first compound crystal silicon layer 204.Then, utilize compound crystal silicon oxide layer 208 to be the cover curtain, tunnel oxide 202 is an etch stop layer, removes first compound crystal silicon layer 204 that is exposed, to form a floating grid 204a on tunnel oxide 202.Continue it, carry out thermal oxidation method once more and form oxidation clearance wall 210 with sidewall at floating grid 204a.Yet, in the step that forms oxidation clearance wall 210, still can generate silicon oxide layer on exposed compound crystal silicon oxide layer 208 and the tunnel oxide 202 with oxygen and water molecule reaction, so exposed compound crystal silicon oxide layer 208 thickening a little becomes compound crystal silicon oxide layer 208a, and tunnel oxide 202 also a little thickening become thick oxide layer 203.Wherein, the thickness of thick oxide layer 203 is tunnel oxide 202 and the summation that forms the oxidated layer thickness that is generated on the tunnel oxide 202 in the step at oxidation clearance wall 210, so the thickness of thick oxide layer 203 is greater than the thickness of tunnel oxide 202.Because compound crystal silicon oxide layer 208a and oxidation clearance wall 210 are coating floating grid 204a, so make the floating grid 204a and the external world present the state of electrical isolation.
Please refer to Fig. 2 D, deposition one deck nitration case (not being illustrated in figure) in substrate 200 then continues and carries out etching step, and for example traditional etch process is to form nitrogenize clearance wall 212 at oxidation clearance wall 210 sidewalls.Since nitrogenize clearance wall 212 be formed at that thick oxide layer 203 generates after, so in the etching process that forms nitrogenize clearance wall 212, can destroy quality, the uniformity of thick oxide layer 203 and reduce its thickness, cause thick oxide layer 203 deteriorations.And because thick oxide layer 203 is the usefulness as the gate oxide of peripheral high potential assembly, so thin thickness of grid oxide layer will make it can bear the decreased number of catching electric charge, cause the generation in advance of grid oxic horizon collapse phenomenon, and seriously influence the long-term reliability of grid oxic horizon.So the deterioration of thick oxide layer 203 will cause the usefulness of peripheral high potential assembly to reduce.
Therefore, please refer to Fig. 2 E, the present invention is to serve as cover curtain with nitrogenize clearance wall 212, utilize traditional etch process to remove the exposed thick oxide layer 203 that is not hidden by nitrogenize clearance wall 212, exposing silicon base 200, and below oxidation clearance wall 210 and nitrogenize clearance wall 212 residual thick oxide layer 203a.Then, on silicon base 200, form one deck thick oxide layer 214 once more.Wherein, the formation method of this thick oxide layer 214 for example is to utilize thermal oxidation method to form silicon oxide layer on exposed silicon base 200, and its thickness needs decide on processing procedure, and the thickness with thick oxide layer 213a is identical haply, is approximately the 200-220 Izod right side.
At last, please refer to Fig. 2 F, in substrate 200, cover one deck second compound crystal silicon layer 216 comprehensively, define second compound crystal silicon layer 216, on compound crystal silicon oxide layer 208a, to form the control gate of separate grid type flash memory.Wherein, the making of separate grid type flash memory more is included in substrate 200 surfaces down, and the side of floating grid 204a is formed with gate regions and source area.Because successive process is to be familiar with the technology that this skill person knows, give unnecessary details so seldom do at this.
Because thick oxide layer 203 can wreck in nitrogenize clearance wall 212 etching processes, influence its quality, uniformity and thickness, cause thick oxide layer 203 deteriorations and cause the usefulness of peripheral high potential assembly to reduce.Therefore, the present invention removes original thick oxide layer 203 earlier, forms one deck thick oxide layer 204 more again on silicon base 200, keeping the due quality of thick oxide layer, uniformity and thickness, and then the usefulness of possessing peripheral high potential assembly.
Though the present invention discloses as above with a preferred embodiment; right its is not in order to limiting the present invention, anyly has the knack of this operator, without departing from the spirit and scope of the present invention; when can doing various changes and retouching, so protection scope of the present invention is as the criterion when defining with claims scope.
Claims (21)
1, a kind of method of improving separated grid type flash memory oxide layer quality, it is characterized in that: it is useful in the substrate, form tunnel oxide, first compound crystal silicon layer and cover curtain layer in this substrate in regular turn, cover curtain layer exposes part first compound crystal silicon layer, the first exposed compound crystal silicon layer is the predetermined zone that forms floating grid, and this method comprises:
On the first exposed compound crystal silicon layer, form the compound crystal silicon oxide layer;
Divesting cover curtain layer, serves as the cover curtain with the compound crystal silicon oxide layer, removes part first compound crystal silicon layer, forms floating grid;
Carry out step of thermal oxidation, form the oxidation clearance wall, and thicken the tunnel oxide of compound crystal silicon oxide layer and the covering of not oxidized clearance wall at the floating grid sidewall;
Sidewall at the oxidation clearance wall forms the nitrogenize clearance wall;
With the nitrogenize clearance wall is the cover curtain, removes the tunnel oxide that not oxidized clearance wall hides, to expose substrate;
Form an oxide layer in substrate, wherein thickness of oxide layer is thick than tunnel oxide; And
On the compound crystal silicon oxide layer, form control gate.
2, the method for improving separated grid type flash memory oxide layer quality according to claim 1 is characterized in that: wherein the formation method of tunnel oxide comprises thermal oxidation method.
3, the method for improving separated grid type flash memory oxide layer quality according to claim 1 is characterized in that: wherein the thickness of tunnel oxide is the 85-95 dust.
4, the method for improving separated grid type flash memory oxide layer quality according to claim 1, it is characterized in that: wherein the material of cover curtain layer comprises silicon nitride.
5, the method for improving separated grid type flash memory oxide layer quality according to claim 1 is characterized in that: wherein the formation method of compound crystal silicon oxide layer comprises thermal oxidation method.
6, the method for improving separated grid type flash memory oxide layer quality according to claim 1, it is characterized in that: the method that wherein forms the nitrogenize clearance wall comprises the following steps:
In substrate, deposit a nitration case comprehensively; And
Carry out etching step, at the sidewall formation nitrogenize clearance wall of oxidation clearance wall.
7, the method for improving separated grid type flash memory oxide layer quality according to claim 6 is characterized in that: wherein etching step can destroy the tunnel oxide that is not hidden by this oxidation clearance wall.
8, the method for improving separated grid type flash memory oxide layer quality according to claim 1 is characterized in that: wherein the formation method of oxide layer comprises thermal oxidation method.
9, the method for improving separated grid type flash memory oxide layer quality according to claim 1 is characterized in that: wherein thickness of oxide layer is the 200-220 dust.
10, the method for improving separated grid type flash memory oxide layer quality according to claim 1 is characterized in that: wherein oxide layer is the usefulness as the gate oxide of peripheral high potential assembly.
11, a kind of manufacture method of separate grid type flash memory is characterized in that: it is useful in the substrate, forms tunnel oxide, floating grid and compound crystal silicon oxide layer in this substrate, and this method comprises:
Carry out step of thermal oxidation, form the oxidation clearance wall in this floating grid sidewall, and form first oxide layer in this substrate that is not hidden by this oxidation clearance wall, wherein first thickness of oxide layer is greater than tunnel oxide;
Sidewall at the oxidation clearance wall forms the nitrogenize clearance wall;
With the nitrogenize clearance wall is the cover curtain, removes first oxide layer that is not hidden by the nitrogenize clearance wall, to expose substrate;
In substrate, form second oxide layer; And
On the compound crystal silicon oxide layer, form control gate.
12, the manufacture method of separate grid type flash memory according to claim 11 is characterized in that: wherein the formation method of tunnel oxide comprises thermal oxidation method.
13, the manufacture method of separate grid type flash memory according to claim 11 is characterized in that: wherein the thickness of tunnel oxide is the 85-95 dust.
14, the manufacture method of separate grid type flash memory according to claim 11 is characterized in that: wherein the formation method of compound crystal silicon oxide layer comprises the following steps:
Form first compound crystal silicon layer and cover curtain layer, cover curtain layer exposes part first compound crystal silicon layer, and the first exposed compound crystal silicon layer is a predetermined zone that forms floating grid;
Carry out step of thermal oxidation, on the first exposed compound crystal silicon layer, form the compound crystal silicon oxide layer; And
Divest cover curtain layer.
15, the manufacture method of separate grid type flash memory according to claim 11 is characterized in that: wherein the formation method of floating grid comprises the following steps:
With the compound crystal silicon oxide layer is the cover curtain, removes part first compound crystal silicon layer, forms floating grid.
16, the manufacture method of separate grid type flash memory according to claim 14 is characterized in that: wherein the material of cover curtain layer comprises silicon nitride.
17, the manufacture method of separate grid type flash memory according to claim 11 is characterized in that: the method that wherein forms this nitrogenize clearance wall comprises the following steps:
Deposition-nitration case comprehensively in substrate; And
Carry out etching step, form the nitrogenize clearance wall with sidewall in the oxidation clearance wall.
18, the manufacture method of separate grid type flash memory according to claim 17 is characterized in that: wherein etching step can destroy first oxide layer.
19, the manufacture method of separate grid type flash memory according to claim 11 is characterized in that: wherein the formation method of second oxide layer comprises thermal oxidation method.
20, the manufacture method of separate grid type flash memory according to claim 11 is characterized in that: wherein second thickness of oxide layer is the 200-220 dust.
21, the manufacture method of separate grid type flash memory according to claim 11 is characterized in that: wherein second oxide layer is the usefulness as the gate oxide of peripheral high potential assembly.
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| Application Number | Priority Date | Filing Date | Title |
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| CNB011097337A CN1153275C (en) | 2001-03-29 | 2001-03-29 | Method for improving separated grid type flash memory oxide layer quality |
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| CNB011097337A CN1153275C (en) | 2001-03-29 | 2001-03-29 | Method for improving separated grid type flash memory oxide layer quality |
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| CN1378267A true CN1378267A (en) | 2002-11-06 |
| CN1153275C CN1153275C (en) | 2004-06-09 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1323434C (en) * | 2003-09-02 | 2007-06-27 | 台湾积体电路制造股份有限公司 | Method for mfg. intergration flash memory and high-voltage assembly |
| CN100446186C (en) * | 2006-10-09 | 2008-12-24 | 上海华虹Nec电子有限公司 | Floating grid preparation method used for grid dividing structure flash memory |
-
2001
- 2001-03-29 CN CNB011097337A patent/CN1153275C/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1323434C (en) * | 2003-09-02 | 2007-06-27 | 台湾积体电路制造股份有限公司 | Method for mfg. intergration flash memory and high-voltage assembly |
| CN100446186C (en) * | 2006-10-09 | 2008-12-24 | 上海华虹Nec电子有限公司 | Floating grid preparation method used for grid dividing structure flash memory |
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| Publication number | Publication date |
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| CN1153275C (en) | 2004-06-09 |
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Granted publication date: 20040609 |