CN1373514A - 单片式微波集成电路及其制造方法 - Google Patents

单片式微波集成电路及其制造方法 Download PDF

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CN1373514A
CN1373514A CN01140864A CN01140864A CN1373514A CN 1373514 A CN1373514 A CN 1373514A CN 01140864 A CN01140864 A CN 01140864A CN 01140864 A CN01140864 A CN 01140864A CN 1373514 A CN1373514 A CN 1373514A
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沈东植
李相国
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Samsung Electronics Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
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    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
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    • H01ELECTRIC ELEMENTS
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8252Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using III-V technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration

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Abstract

本发明提供了一种单片式微波集成电路(MMIC)及其制造方法。MMIC包括半导体基板、形成在半导体基板上的有源和无源装置、形成为覆盖半导体基板上的有源和无源装置的介电层、以及形成在介电层上的接地面,用于通过介电层将有源装置接地。

Description

单片式微波集成电路及其制造方法
                          技术领域
本发明涉及一种单片式微波集成电路(MMIC)及其制造方法,更具体地说,涉及一种具有新型接地面的MMIC,及其制造方法。
                          背景技术
包括通过批加工(batch processing)在单个基板内形成的有源和无源装置的单片式微波集成电路(MMIC)被用于放大小的信号振幅和改变频率。MMIC制造技术被认为优于通过减少组件的数量而增加微波系统的产量并实现小型、轻质系统的制造。
对于MMIC,各单位装置以及半导体基板中有源和无源装置之间的互连通过批加工实现,从而MMIC板的尺寸比传统的具有高可靠性和兼容性的高频电路板小。另外,不需要各个元件的独立封装,因此与使用元件独立封装的传统高频电路的制造相比可以降低制造成本。
与必须用在有限数量的装置封装内可用的元件制造的一般微波电路不同,用于MMIC的装置的形状和尺寸可以由设计者控制,并从而可以对具体应用制造优化性能的MMIC。MMIC的制造成本不受有源装置数量增加的影响,并从而具有使电路结构多样化的优点。
传统的MMIC在图1中示出。半导体基板10被形成为足够薄以防止在数十吉赫的超高频的传输模式之间的信号耦合。附图标记12代表形成在半导体基板上的有源装置,而附图标记14代表用于半导体基板10内的有源装置12和无源装置(未示出)互连的微带线。开口16形成在半导体基板10内,而接地面18形成在半导体基板10之下,以便其通过开口16接触微带线14。
如上所述,对于传统MMIC,基板10形成得较薄以防止传输模式之间信号的耦合。例如,优选的是在数十吉赫超高频下,半导体基板10具有100μm或更小的厚度。为了获得100μm或更薄的半导体基板10,在半导体基板10内的有源和无源装置形成之后应进行半导体基板10背面的蚀刻或抛光。然而,厚度调节是困难的,且如此数十微米薄的半导体基板容易折断。从而,半导体基板必须仔细处理,以便不减小产量。另外,由半导体基板的介电常数导致的介电损失很大,从而增大了信号损失。
                          发明内容
为了解决上述问题,本发明的第一个目的是提供一种单片式微波集成电路(MMIC),它能够减小由介电损失造成的信号损失,并防止产量下降。
本发明的第二个目的是提供一种制造MMIC的简单方法,它不需要刻蚀或抛光导体基板的背面,这种刻蚀或抛光被用以防止MMIC的有源和无源装置成型后传输模式之间信号的耦合。
为了实现本发明的第一个目的,提供了一种MMIC,包括:半导体基板、形成在半导体基板上的有源和无源装置、被成型以覆盖半导体基板上的有源及无源装置的介电层、以及形成在介电层上用于通过介电层将有源装置接地的接地面。
优选的,接地面将有源装置通过形成在介电层内的接触孔接地。
为了实现本发明第二目的,提供了一种制造MMIC的方法,包括:(a)在半导体基板上形成有源和无源装置,以便有源和无源装置互连;(b)形成介电层以覆盖半导体基板上的有源和无源装置;以及(c)在介电层上形成接地面,以用于将有源装置接地。
在该MMIC制造方法中,优选的是有源和无源装置由微带线互连。优选的是步骤(c)包括:在介电层内形成接触孔,通过它显露微带线;以及通过在其内形成接触孔的介电层上形成导电层而形成经由接触孔连接到微带线上的接地面。该介电层可以由聚合物层形成。
根据本发明,具有减小的由介电损失造成的信号损失的MMIC可以通过具有高产量的简单方法制造。
                          附图说明
本发明的上述目的和优点将通过其优选实施例参照附图进行的详细描述而变得显而易见,其中:
图1是传统的单片式微波集成电路(MMIC)的剖视图;
图2是根据本发明的MMIC的优选实施例的剖视图;以及
图3到图6是说明用于制造图2的MMIC的方法的每一步骤的剖视图。
                          具体实施方式
参照附图,将描述根据本发明的单片式微波集成电路(MMIC)和用于制造该集成电路的方法的优选实施例。在附图中,为了清晰起见将各层和区域的厚度夸大。
根据本发明的MMIC的优选实施例将参照图2加以描述。参照图2,半导体基板40可以由硅基板形成,考虑到需要小型、轻质且能耗低的RF装置的MMIC终端,优选地由III-V族化合物半导体基板形成。例如,半导体基板40可以为GaAs基板。虽然不是III-V族化合物,SiGe基板也可以用作半导体基板40。有源装置42,例如高频晶体管,形成在半导体基板40上。虽然未示出,在半导体基板40上还形成诸如电容或电感的无源装置。有源装置42和无源装置在半导体基板40上互连。形成具有预定厚度的介电层46以覆盖在半导体基板40上形成的所有装置和互连线路。优选地,介电层46由聚合物层,例如聚酰亚胺或光致抗蚀剂层形成。显露微带线44的接触孔h形成在介电层46中,而接地面48形成在介电层46上,其中接地面48连接到通过接触孔h暴露出来的微带线44的一部分上。如图2所示,接地面48可以沿接触孔h的侧壁延伸,以便其接触微带线44。替换地,接地面48可以通过塞入接触孔h的导电插头(未示出)而连接到微带线44上。
根据本发明的MMIC如下地制造。参照图3,有源装置42和无源装置形成在半导体基板40上,并形成用于互连有源装置42和无源装置的微带线44。对于相对低频的装置,半导体基板40可以由硅基板制成,优选地是由III-V族化合物半导体基板制成,例如,GaAs基板。虽然不是III-V族化合物,SiGe基板也可作为半导体基板40。有源装置42为晶体管,诸如高频金属半导体场效应晶体管(MESFET)。这种MESFET可以通过进行选择性注入Si离子、激活以形成隧道区、为了适当的特性而蚀刻以形成凹坑、并在凹坑内形成金属栅极而形成。如上所述,有源装置可以通过半导体装置制造工艺予以形成。
作为无源装置的示例,电容或电感形成在半导体基板40上。
接着,如图4所示,形成介电层46以覆盖半导体基板40上的有源装置42、微带线44和无源装置。优选的是,介电层46由聚合物层,例如聚酰亚胺或光致抗蚀剂层形成。同样优选的是,考虑到随后的半导体基板40背面的抛光,介电层46形成得足够厚。考虑到在不折断半导体基板40的情况下,半导体基板40通过抛光或蚀刻半导体基板40的背面而可以减薄的程度来确定介电层46的厚度。在介电层的成型结束后,半导体基板40的背面被抛光,以减小其厚度并防止信号在传输模式之间耦合。结果,在半导体基板40通过抛光减薄后,介电层46可以防止由介电损耗造成的信号损失以及半导体基板40的断裂。
接着,如图5所示,显露微带线44的接触孔h形成在介电层46内。当介电层46由光敏材料层诸如聚酰亚胺或光致抗蚀剂层形成时,接触孔h通过在介电层46上形成掩膜(未示出)以确定要成为接触孔h的区域,利用掩模曝光,除去掩模并显影组合结构而形成。
同时,当介电层46由非光敏材料形成时,在介电层46上形成掩模以确定要成为接触孔h的区域,利用掩模蚀刻介电层46的该被确定区域,并除去掩模,从而形成接触孔h。
接触孔h的形状和尺寸不受限制,只要微带线44可以通过其暴露即可。例如,通过接触孔h可以只露出微带线44,或通过接触孔h部分暴露半导体基板40和微带线44。
接着,参照图6,导电层作为接地面48形成在介电层46上,以便接地面48的一部分通过接触孔h接触微带线44。如图6所示,接地面48可以沿接触孔h的侧壁延伸以达到通过接触孔h暴露出的微带线44的一部分。替换地,接地面48可以通过例如塞入接触孔h内的导电插头而与微带线44的暴露部分接触。
如上所述,在根据本发明的MMIC中,连接到微带线上的接地面形成在介电层上,其中介电层被形成以覆盖半导体基板上的有源和无源装置。换句话说,接地面放置在要被其接地的装置之上。从而,由介电损耗造成的信号损失可以减小,并且由于不需要进行对半导体基板背面的曝光或蚀刻而可以简化整个制造过程。虽然半导体基板为了防止传输模式之间信号耦合的目的而被加工到足够薄,但是由于形成在半导体基板上的介电层具有足够大的厚度以防止半导体基板破裂,因此产量不会下降。
虽然本发明已经参照其优选实施例具体图示并说明,但是本领域技术人员应理解的是,其中可以作出各种形式和细节上的变化。例如,本领域技术人员可以理解的是介电层可以形成为包含空气间隙或可以形成为多层。另外,根据本发明的接地面的结构可以应用于除MMIC以外的其它装置。从而,本发明的精髓和范围由所附的权利要求限定,而不是由其优选
实施例限定。

Claims (9)

1.一种单片式微波集成电路,包括:
半导体基板;
形成在半导体基板上的有源和无源装置;
形成为覆盖半导体基板上的有源和无源装置的介电层;以及
形成在介电层上的接地面,用于通过介电层将有源装置接地。
2.根据权利要求1所述的单片式微波集成电路,其中,接地面通过形成在介电层内的接触孔将有源装置接地。
3.根据权利要求1所述的单片式微波集成电路,其中,介电层由聚合物层形成。
4.根据权利要求3所述的单片式微波集成电路,其中,聚合物层为聚酰亚胺或光致抗蚀剂层。
5.一种用于制造单片式微波集成电路的方法,包括:
(a)在半导体基板上形成有源和无源装置,以便有源和无源装置互连;
(b)形成介电层以覆盖半导体基板上的有源和无源装置;以及
(c)在介电层上形成接地面,用于将有源装置接地。
6.根据权利要求5所述的方法,其中,有源和无源装置由微带线互连。
7.根据权利要求6所述的方法,其中,步骤(c)包括:
在介电层内形成接触孔,微带线通过该接触孔暴露;以及
通过在形成有接触孔的介电层上形成导电层,而形成经由接触孔与微带线连接的接地面。
8.根据权利要求5所述的方法,其中,介电层由聚合物层形成。
9.根据权利要求5或6所述的方法,其中,有源装置是高频晶体管。
CN01140864A 2001-03-03 2001-09-25 单片式微波集成电路及其制造方法 Pending CN1373514A (zh)

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CN102403316A (zh) * 2010-08-12 2012-04-04 飞思卡尔半导体公司 单片微波集成电路
CN101661921B (zh) * 2009-09-23 2012-04-18 中国科学院微电子研究所 一种微波单片集成电路中的金属布线层结构及其制备方法
CN115579299A (zh) * 2022-11-21 2023-01-06 常州承芯半导体有限公司 半导体结构及其形成方法

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CN110635203B (zh) * 2019-08-26 2021-10-15 中国电子科技集团公司第十三研究所 一种波导滤波器

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