CN1331154C - 用于使电阻性阵列中信噪比最大化的方法和结构 - Google Patents

用于使电阻性阵列中信噪比最大化的方法和结构 Download PDF

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Publication number
CN1331154C
CN1331154C CNB021414904A CN02141490A CN1331154C CN 1331154 C CN1331154 C CN 1331154C CN B021414904 A CNB021414904 A CN B021414904A CN 02141490 A CN02141490 A CN 02141490A CN 1331154 C CN1331154 C CN 1331154C
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China
Prior art keywords
resistance
row
column
array
memory cells
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Expired - Lifetime
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CNB021414904A
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Chinese (zh)
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CN1407557A (zh
Inventor
L·T·特兰
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Samsung Electronics Co Ltd
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Hewlett Packard Co
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Publication of CN1407557A publication Critical patent/CN1407557A/zh
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
    • G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1673—Reading or sensing circuits or methods

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Non-Volatile Memory (AREA)
CNB021414904A 2001-08-31 2002-08-30 用于使电阻性阵列中信噪比最大化的方法和结构 Expired - Lifetime CN1331154C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/944,680 US6385079B1 (en) 2001-08-31 2001-08-31 Methods and structure for maximizing signal to noise ratio in resistive array
US09/944680 2001-08-31

Publications (2)

Publication Number Publication Date
CN1407557A CN1407557A (zh) 2003-04-02
CN1331154C true CN1331154C (zh) 2007-08-08

Family

ID=25481859

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB021414904A Expired - Lifetime CN1331154C (zh) 2001-08-31 2002-08-30 用于使电阻性阵列中信噪比最大化的方法和结构

Country Status (6)

Country Link
US (1) US6385079B1 (enExample)
EP (1) EP1291879A3 (enExample)
JP (1) JP2003162892A (enExample)
KR (1) KR20030019262A (enExample)
CN (1) CN1331154C (enExample)
TW (1) TWI229337B (enExample)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002299584A (ja) * 2001-04-03 2002-10-11 Mitsubishi Electric Corp 磁気ランダムアクセスメモリ装置および半導体装置
US6498747B1 (en) * 2002-02-08 2002-12-24 Infineon Technologies Ag Magnetoresistive random access memory (MRAM) cross-point array with reduced parasitic effects
US7020006B2 (en) * 2002-08-02 2006-03-28 Unity Semiconductor Corporation Discharge of conductive array lines in fast memory
US6882553B2 (en) * 2002-08-08 2005-04-19 Micron Technology Inc. Stacked columnar resistive memory structure and its method of formation and operation
US6807087B2 (en) * 2002-08-30 2004-10-19 Micron Technology, Inc. Write current shunting compensation
US7251178B2 (en) * 2004-09-07 2007-07-31 Infineon Technologies Ag Current sense amplifier
US6946882B2 (en) * 2002-12-20 2005-09-20 Infineon Technologies Ag Current sense amplifier
US7433253B2 (en) * 2002-12-20 2008-10-07 Qimonda Ag Integrated circuit, method of operating an integrated circuit, method of manufacturing an integrated circuit, memory module, stackable memory module
KR20040084095A (ko) * 2003-03-26 2004-10-06 주식회사 하이닉스반도체 마그네틱 램의 형성방법
US6954392B2 (en) * 2003-03-28 2005-10-11 Micron Technology, Inc. Method for reducing power consumption when sensing a resistive memory
US6985381B2 (en) * 2003-10-15 2006-01-10 Hewlett-Packard Development Company, L.P. System and method for reading magnetization orientation of MRAM cells
JP2006229227A (ja) * 2005-02-14 2006-08-31 Samsung Electronics Co Ltd 抵抗変化型メモリ素子
US20060268602A1 (en) * 2005-05-24 2006-11-30 Northern Lights Semiconductor Corp. Memory architecture for high density and fast speed
US8395199B2 (en) * 2006-03-25 2013-03-12 4D-S Pty Ltd. Systems and methods for fabricating self-aligned memory cell
US7932548B2 (en) 2006-07-14 2011-04-26 4D-S Pty Ltd. Systems and methods for fabricating self-aligned memory cell
US8289662B2 (en) 2008-05-20 2012-10-16 International Business Machines Corporation Tunnel junction resistor for high resistance devices and systems using the same
US8516408B2 (en) * 2009-05-26 2013-08-20 Lsi Corporation Optimization of circuits having repeatable circuit instances
US10809320B2 (en) 2015-04-29 2020-10-20 Everspin Technologies, Inc. Magnetic field sensor with increased SNR
US9495627B1 (en) * 2015-12-15 2016-11-15 International Business Machines Corporation Magnetic tunnel junction based chip identification
GB2555481B (en) * 2016-11-01 2019-07-17 Evonetix Ltd Resistance measurement
US10325007B2 (en) 2017-04-05 2019-06-18 International Business Machines Corporation Noise and bound management for RPU array
US12169534B2 (en) 2020-12-07 2024-12-17 International Business Machines Corporation Worst case noise and bound management for RPU crossbar arrays

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0712134A2 (en) * 1994-11-10 1996-05-15 Kabushiki Kaisha Toshiba Semiconductor memory
CN1175775A (zh) * 1996-08-01 1998-03-11 西门子公司 虚地结构的矩阵存储器

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5173873A (en) * 1990-06-28 1992-12-22 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration High speed magneto-resistive random access memory
US5329480A (en) * 1990-11-15 1994-07-12 California Institute Of Technology Nonvolatile random access memory
TW411471B (en) * 1997-09-17 2000-11-11 Siemens Ag Memory-cell device
US6169686B1 (en) 1997-11-20 2001-01-02 Hewlett-Packard Company Solid-state memory with magnetic storage cells
US6097625A (en) * 1998-07-16 2000-08-01 International Business Machines Corporation Magnetic random access memory (MRAM) array with magnetic tunnel junction (MTJ) cells and remote diodes
US5946227A (en) * 1998-07-20 1999-08-31 Motorola, Inc. Magnetoresistive random access memory with shared word and digit lines
DE19914488C1 (de) * 1999-03-30 2000-05-31 Siemens Ag Vorrichtung zur Bewertung der Zellenwiderstände in einem magnetoresistiven Speicher
DE19942447C2 (de) * 1999-09-06 2003-06-05 Infineon Technologies Ag Speicherzellenanordnung und Verfahren zu deren Betrieb
US6188615B1 (en) * 1999-10-29 2001-02-13 Hewlett-Packard Company MRAM device including digital sense amplifiers
US6185143B1 (en) * 2000-02-04 2001-02-06 Hewlett-Packard Company Magnetic random access memory (MRAM) device including differential sense amplifiers
JP3800925B2 (ja) * 2000-05-15 2006-07-26 日本電気株式会社 磁気ランダムアクセスメモリ回路
KR20040006335A (ko) * 2002-07-12 2004-01-24 주식회사 하이닉스반도체 Ｍｒａｍ의 센싱 마진 제어 장치

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0712134A2 (en) * 1994-11-10 1996-05-15 Kabushiki Kaisha Toshiba Semiconductor memory
CN1175775A (zh) * 1996-08-01 1998-03-11 西门子公司 虚地结构的矩阵存储器

Also Published As

Publication number Publication date
CN1407557A (zh) 2003-04-02
KR20030019262A (ko) 2003-03-06
JP2003162892A (ja) 2003-06-06
TWI229337B (en) 2005-03-11
EP1291879A2 (en) 2003-03-12
US6385079B1 (en) 2002-05-07
EP1291879A3 (en) 2004-04-07

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C14 Grant of patent or utility model
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ASS Succession or assignment of patent right

Owner name: SAMSUNG ELECTRONICS CO., LTD

Free format text: FORMER OWNER: HEWLETT-PACKARD DEVELOPMENT COMPANY

Effective date: 20071228

C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20071228

Address after: Gyeonggi Do, South Korea

Patentee after: SAMSUNG ELECTRONICS Co.,Ltd.

Address before: California, USA

Patentee before: Hewlett-Packard Co.

CX01 Expiry of patent term
CX01 Expiry of patent term

Granted publication date: 20070808