CN1323428C - 制造半导体双极器件的方法 - Google Patents

制造半导体双极器件的方法 Download PDF

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CN1323428C
CN1323428C CNB2004100078731A CN200410007873A CN1323428C CN 1323428 C CN1323428 C CN 1323428C CN B2004100078731 A CNB2004100078731 A CN B2004100078731A CN 200410007873 A CN200410007873 A CN 200410007873A CN 1323428 C CN1323428 C CN 1323428C
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inp
conducting material
semi
bipolar device
injection
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CN1664999A (zh
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徐嘉东
李建明
张秀兰
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Institute of Semiconductors of CAS
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Abstract

本发明涉及一种半导体电路器件结构,特别是一种制造半导体双极器件的方法,该方法包括如下步骤:1)取一半导体材料;2)向半导体材料中注入氦和氖双离子,使半导体材料的表面下形成较薄的P型导电埋层区域;3)退火。

Description

制造半导体双极器件的方法
技术领域
本发明涉及一种制造半导体双极器件的方法,特别是一种制造具有很薄基极的InP(铟磷)双极器件的方法。
技术背景
InP晶体是重要的化合物半导体之一,与GaAs(砷化镓)相比,它的优越性主要在于高的饱和电场漂移速度、较好的导热性能以及抗辐射能力强等[L.Quintanilla,R.Pinacho,L.Enriquez,R.Pelaez,S.Duenas,E.Castan,L.Bailon,and J.Barbolla,J.Appl.Phys.Vol.85,7978(1999)],因此InP晶片常用于制造高频、高速和大功率微波器件和电路。在当前迅速发展的光纤通讯领域,InP晶片已成为首选的衬底材料。典型的InP基光电子器件包括:激光器、探测器、波导器件和抗辐射太阳能电池等;微电子器件包括:高迁移率晶体管、异质结双极晶体管、毫米波和微波电路及高速数字集成电路等。用InP制作的长波长半导体激光器和光波导器件已在光通讯中得到广泛应用。对P型InP注入惰性元素离子可形成较稳定的高阻隔离区,这一特性已被用于半导体激光器中。
发明内容
本发明的目的在于,提供一种制造半导体双极制作器件的方法,其是采用惰性元素离子的注入,即可形成具有薄基极区的InP双极器件,采用本方法制作的器件具有高的饱和电场漂移速度、较好的导热性能以及抗辐射能力强等。
本发明的技术方案是:
本发明一种制造半导体双极器件的方法,其特征在于,包括如下步骤:
1)取一InP半导体材料;
2)向InP半导体材料中注入氦和氖双离子,使半导体材料的表面下形成较薄的P型导电埋层区域;
首先对InP半导体材料做三种能量的氦离子叠加注入,注入条件为:
(1)50keV,4×1013cm-2
(2)100keV,6×1013cm-2
(3)180keV,1×1014cm-2
然后再做氖离子注入,注入条件为:
70keV,2×1013cm-2
3)退火。
其中所述的InP半导体材料,该InP半导体材料在注入前是N型的。
其中的退火温度在300℃到600℃之间。
附图说明
为进一步说明本发明的技术内容,以下结合附图和实施例对本发明作一详细的描述,其中:
图1为本发明在InP材料上经注入双离子并退火后形成的具有薄基区的NPN结构的剖面示意图。
图2为InP材料经注入及退火后的载流子类型及浓度的测量曲线图。
具体实施方式
请参阅图1所示,一种制造NPN结构器件的方法,包括如下步骤:
1)取一半导体材料10,该半导体材料10为InP材料,该InP材料10在注入前是N型的,注入后还是N型的;
2)向该半导体材料10中注入氦和氖双离子,使半导体材料的表面11下形成较薄的P型导电埋层区域12,该P型导电埋层区域12下为下层半导体材料13,该下层半导体材料13为InP材料,该InP材料13在注入前是N型的,注入后还是N型的;
3)退火,退火的温度在300℃到600℃之间。
其中所述的NPN结构器件具有很薄的基极区。
实施例
本实施例采用掺杂浓度为(3-7)×1018cm-3的N型InP单晶材料,首先对InP做三种能量的氦离子叠加注入,注入条件为:
(1)50keV,4×1013cm-2
(2)100keV,6×1013cm-2
(3)180keV,1×1014cm-2
然后再做氖离子注入,注入条件为:
70keV,2×1013cm-2
注入完后,将一部分注入的样品做400℃ 3.3分钟的退火。
采用C-V测试仪对退火过的注入样品测载流子的浓度分布。图2为InP经注入及随后退火样品的C-V测量曲线,从中可看到1.0μm深度处有一很薄区域的载流子浓度值为正值,该薄区域对应薄P型区,从而在InP的表面层区域形成了NPN的电结构。图1为InP经注入双离子并退火后形成的具有薄基区的NPN结构剖面示意图。其中,InP中间的P区很薄,这个薄的P区可用于三极管的薄基区。
这种NPN可尝试用于制作三极管和利用InP的光电特性制作光电探测器等光电器件。

Claims (3)

1、一种制造半导体双极器件的方法,其特征在于,包括如下步骤:
1)取一InP半导体材料;
2)向InP半导体材料中注入氦和氖双离子,使半导体材料的表面下形成较薄的P型导电埋层区域;
首先对InP半导体材料做三种能量的氦离子叠加注入,注入条件为:
(1)50keV,4×1013cm-2
(2)100keV,6×1013cm-2
(3)180keV,1×1014cm-2
然后再做氖离子注入,注入条件为:
70keV,2×1013cm-2
3)退火。
2、根据权利要求1所述的制造半导体双极器件的方法,其特征在于,其中所述的InP半导体材料,该InP半导体材料在注入前是N型的。
3、根据权利要求1所述的制造半导体双极器件的方法,其特征在于,其中的退火温度在300℃到600℃之间。
CNB2004100078731A 2004-03-03 2004-03-03 制造半导体双极器件的方法 Expired - Fee Related CN1323428C (zh)

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CN113437021B (zh) * 2021-07-28 2022-06-03 广东省科学院半导体研究所 薄膜材料的异质结的制备方法及其制得的薄膜

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4956693A (en) * 1986-03-20 1990-09-11 Hitachi, Ltd. Semiconductor device
WO2001073821A2 (en) * 2000-03-27 2001-10-04 Ultratech Stepper, Inc. Methods for annealing a substrate and article produced by such methods
JP2002231725A (ja) * 2001-01-30 2002-08-16 Semiconductor Energy Lab Co Ltd 半導体装置及びその作製方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4956693A (en) * 1986-03-20 1990-09-11 Hitachi, Ltd. Semiconductor device
WO2001073821A2 (en) * 2000-03-27 2001-10-04 Ultratech Stepper, Inc. Methods for annealing a substrate and article produced by such methods
JP2002231725A (ja) * 2001-01-30 2002-08-16 Semiconductor Energy Lab Co Ltd 半導体装置及びその作製方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
新光源半导体激光器 李维晖,现代科学仪器 2001 *

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