CN1316589C - 以离子植入增加局部侧壁密度的方法 - Google Patents

以离子植入增加局部侧壁密度的方法 Download PDF

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Publication number
CN1316589C
CN1316589C CNB028137884A CN02813788A CN1316589C CN 1316589 C CN1316589 C CN 1316589C CN B028137884 A CNB028137884 A CN B028137884A CN 02813788 A CN02813788 A CN 02813788A CN 1316589 C CN1316589 C CN 1316589C
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Prior art keywords
copper
dielectric layer
layer
opening
forming
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Expired - Fee Related
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CNB028137884A
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Chinese (zh)
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CN1579017A (zh
Inventor
E·M·阿佩尔格伦
C·日什尔格
J·I·马丁
P·R·贝赛尔
F·张
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GlobalFoundries US Inc
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Advanced Micro Devices Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76825Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/3115Doping the insulating layers
    • H01L21/31155Doping the insulating layers by ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/7681Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving one or more buried masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76828Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CNB028137884A 2001-07-10 2002-06-12 以离子植入增加局部侧壁密度的方法 Expired - Fee Related CN1316589C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/902,024 US6610594B2 (en) 2001-07-10 2001-07-10 Locally increasing sidewall density by ion implantation
US09/902,024 2001-07-10

Publications (2)

Publication Number Publication Date
CN1579017A CN1579017A (zh) 2005-02-09
CN1316589C true CN1316589C (zh) 2007-05-16

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CNB028137884A Expired - Fee Related CN1316589C (zh) 2001-07-10 2002-06-12 以离子植入增加局部侧壁密度的方法

Country Status (7)

Country Link
US (1) US6610594B2 (enExample)
EP (1) EP1405339A1 (enExample)
JP (1) JP2004523132A (enExample)
KR (1) KR100860133B1 (enExample)
CN (1) CN1316589C (enExample)
TW (1) TW573341B (enExample)
WO (1) WO2003007367A1 (enExample)

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US7049034B2 (en) * 2003-09-09 2006-05-23 Photronics, Inc. Photomask having an internal substantially transparent etch stop layer
TWI253684B (en) * 2003-06-02 2006-04-21 Tokyo Electron Ltd Method and system for using ion implantation for treating a low-k dielectric film
TWI302720B (en) * 2003-07-23 2008-11-01 Tokyo Electron Ltd Method for using ion implantation to treat the sidewalls of a feature in a low-k dielectric film
US20060051681A1 (en) * 2004-09-08 2006-03-09 Phototronics, Inc. 15 Secor Road P.O. Box 5226 Brookfield, Conecticut Method of repairing a photomask having an internal etch stop layer
KR100613346B1 (ko) * 2004-12-15 2006-08-21 동부일렉트로닉스 주식회사 반도체 소자 및 그 제조 방법
EP1715517A1 (en) * 2005-04-22 2006-10-25 AMI Semiconductor Belgium BVBA Ion implantation of spin on glass materials
US7482267B2 (en) * 2005-04-22 2009-01-27 Ami Semiconductor Belgium Bvba Ion implantation of spin on glass materials
CN100499069C (zh) * 2006-01-13 2009-06-10 中芯国际集成电路制造(上海)有限公司 使用所选掩模的双大马士革铜工艺
US20100109155A1 (en) * 2008-11-05 2010-05-06 Chartered Semiconductor Manufacturing, Ltd. Reliable interconnect integration
FR2969375A1 (fr) * 2010-12-17 2012-06-22 St Microelectronics Crolles 2 Structure d'interconnexion pour circuit intégré
KR101932532B1 (ko) 2012-06-22 2018-12-27 삼성전자 주식회사 반도체 장치 및 그 제조 방법
TWI509689B (zh) * 2013-02-06 2015-11-21 Univ Nat Central 介電質材料形成平台側壁的半導體製造方法及其半導體元件
US9231098B2 (en) 2013-10-30 2016-01-05 Taiwan Semiconductor Manufacturing Co., Ltd. Mechanism for forming metal gate structure
CN105336666B (zh) * 2014-06-19 2019-06-18 中芯国际集成电路制造(上海)有限公司 基于金属硬掩膜的超低k互连的制造方法及制造的产品
US11270962B2 (en) * 2019-10-28 2022-03-08 Nanya Technology Corporation Semiconductor device and method of manufacturing the same
CN112750761A (zh) 2019-10-31 2021-05-04 台湾积体电路制造股份有限公司 半导体装置及其制造方法
US11488857B2 (en) 2019-10-31 2022-11-01 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method of manufacture using a contact etch stop layer (CESL) breakthrough process
US11257753B2 (en) * 2020-01-21 2022-02-22 Taiwan Semiconductor Manufacturing Company Ltd. Interconnect structure and method for manufacturing the interconnect structure
US11776895B2 (en) 2021-05-06 2023-10-03 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure and method for manufacturing the same
US12469745B2 (en) * 2021-07-30 2025-11-11 Taiwan Semiconductor Manufacturing Company, Ltd. Conductive structures with bottom-less barriers and liners

Citations (4)

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Publication number Priority date Publication date Assignee Title
CN1226080A (zh) * 1998-02-12 1999-08-18 摩托罗拉公司 半导体器件中的互连结构及其制作方法
CN1235372A (zh) * 1998-05-11 1999-11-17 三星电子株式会社 形成金属互连的方法
US6114259A (en) * 1999-07-27 2000-09-05 Lsi Logic Corporation Process for treating exposed surfaces of a low dielectric constant carbon doped silicon oxide dielectric material to protect the material from damage
US6221780B1 (en) * 1999-09-29 2001-04-24 International Business Machines Corporation Dual damascene flowable oxide insulation structure and metallic barrier

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US5739579A (en) * 1992-06-29 1998-04-14 Intel Corporation Method for forming interconnections for semiconductor fabrication and semiconductor device having such interconnections
JP3015717B2 (ja) * 1994-09-14 2000-03-06 三洋電機株式会社 半導体装置の製造方法および半導体装置
JP3282496B2 (ja) * 1996-05-17 2002-05-13 松下電器産業株式会社 半導体装置の製造方法
TW383464B (en) * 1998-07-28 2000-03-01 United Microelectronics Corp The method for preventing poisoning of trench in dual damascene structure and via
JP2000164707A (ja) * 1998-11-27 2000-06-16 Sony Corp 半導体装置およびその製造方法
JP3863331B2 (ja) 1999-12-24 2006-12-27 株式会社リコー 光学的情報記録再生方法及び光学的情報記録再生装置
US6355555B1 (en) * 2000-01-28 2002-03-12 Advanced Micro Devices, Inc. Method of fabricating copper-based semiconductor devices using a sacrificial dielectric layer
JP2001267418A (ja) 2000-03-21 2001-09-28 Sanyo Electric Co Ltd 半導体装置及びその製造方法
US6444136B1 (en) * 2000-04-25 2002-09-03 Newport Fab, Llc Fabrication of improved low-k dielectric structures
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Patent Citations (4)

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Publication number Priority date Publication date Assignee Title
CN1226080A (zh) * 1998-02-12 1999-08-18 摩托罗拉公司 半导体器件中的互连结构及其制作方法
CN1235372A (zh) * 1998-05-11 1999-11-17 三星电子株式会社 形成金属互连的方法
US6114259A (en) * 1999-07-27 2000-09-05 Lsi Logic Corporation Process for treating exposed surfaces of a low dielectric constant carbon doped silicon oxide dielectric material to protect the material from damage
US6221780B1 (en) * 1999-09-29 2001-04-24 International Business Machines Corporation Dual damascene flowable oxide insulation structure and metallic barrier

Also Published As

Publication number Publication date
KR100860133B1 (ko) 2008-09-25
US20030013296A1 (en) 2003-01-16
JP2004523132A (ja) 2004-07-29
CN1579017A (zh) 2005-02-09
KR20040015789A (ko) 2004-02-19
US6610594B2 (en) 2003-08-26
WO2003007367A1 (en) 2003-01-23
EP1405339A1 (en) 2004-04-07
TW573341B (en) 2004-01-21

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