CN1226681C

CN1226681C - Insertion of main ATX output without need of monitoring all input

Info

Publication number: CN1226681C
Application number: CNB001069144A
Authority: CN
Inventors: 博格丹·杜杜门
Original assignee: INTELSELL Inc
Current assignee: INTELSELL Inc
Priority date: 1999-04-23
Filing date: 2000-04-21
Publication date: 2005-11-09
Anticipated expiration: 2020-04-21
Also published as: JP4472106B2; KR20000077068A; TW484050B; CN1276550A; JP2000339068A

Abstract

A power monitor circuit and method delays the start of a computer until multiple power lines are at a safe level of operation. The integrated circuit monitors only the voltage of a primary power supply output and eliminates the need for monitor circuits on each supply output. The power supply is made to exacting specifications that tie the 5 volt and 3.3 volt supplies to the primary 12 volt supply. The ATX power supply drives the 3.3 and 5.0 supplies to reach 90% of their values within 40 ms after the 12 volt supply reaches 90% of its value. A time delay circuit 25 delays switching the 3.3 and 5 volt dual outputs from the standby voltage supply to the active voltage supplies until after the primary 3.3 and 5 volt are at a safe operating level.

Description

Need not monitor all outputs and insert main ATX output

Technical field

The present invention relates to a kind of supply monitor circuit, relate in particular to a kind of circuit that is used to monitor the power supply of personal computer.

Background technology

Personal computer has the circuit that is used to monitor and control the power supply of the different piece that is provided for computing machine.Some part, for example storer needs for example different with microprocessor voltage, and for the serviceable life of conserver power source and prolongation integrated circuit, the available power of each element that reduces when computing machine is in holding state is economical.Most computers has electricity-saving function, and this function reduces power after a schedule time.The operator can control the described time.At the time durations that reduces power, to the computer supplies minimal power.In theory, only need to supply with the power when being enough to detect the user total power will be returned.Although the speed of integrated circuit is high, make power supply reach its exercisable value, still have a restricted time quantum.If computing machine began operation before reaching its operating value, then calculating and the operation of being undertaken by computing machine may make a mistake.This too early operation may cause the operating mistake of computer failure and shutdown.At this moment, the user must restart computing machine, perhaps keeps in repair.

Power management features makes it possible to improve the running cost of overall efficiency, energy savings and minimizing computing machine.Along with updating of personal computer, in improvement, produced and powered up and the power saving monitoring circuit.Because computing machine needs a plurality of voltages, so need the circuit of more complicated.The principal voltage of using in computing machine has 12V, 5V and 3.3V.These voltages are by other device and chip in the AC/DC converter supply computing machine.Thereby computer motherboard also needs the voltage that obtains from principal voltage, is used for operational store chip, graphic chips and clock chip.But, these derive from voltages be from 12,5 and 3 principal voltages of 3.3V obtain.

Importantly carry out powering up of each device and power saving according to the mode of computing machine manufacturing person regulation.Unless control powers up with power-save operation and has enough power, otherwise just may lose valuable data, perhaps cause system self conflict and disintegrate.

In order to carry out correct operation, 3 principal voltages must be held the operating value that equals its expection or remain on 90% of about its expection operating value.Microprocessor company, for example Intel Company stipulates, microprocessor and mainboard will become exercisable fully after a predetermined time window.Described time window is current to be set to about 100ms.In order to help the PC fabricator, Intel stipulates that also the power supply of 3.3V and 5.0V must reach 90% of its ratings in 40ms.The problem that computing machine manufacturing person faces is how to monitor principal voltage, so that definite time that can produce the voltage that is obtained by principal voltage.

Some fabricators propose to use 3 power monitoring chips, and each chip is used to monitor a principal voltage.This is a kind of simple method, but it has increased the quantity of the supply monitor that mates with 3 principal voltages.Some fabricators advise using a chip to monitor power supply, and advise comprising 3 principal voltage monitor circuits on a described chip, that is, a monitoring circuit is used to monitor a principal voltage.

Summary of the invention

The present invention has done improvement by an a kind of supply monitor integrated circuit with an input principal voltage plug is provided to existing solution.The present invention has realized the result that this is required by the inherent feature of using power supply.Described power supply is according to the regulation manufacturing of strictness.Described regulation bundles 3.3V, 5.0V power supply and 12V power supply.The 12V power supply reach its value of setting 90% after 40ms within, the 12V power supply is 90% of 3.3V, 5.0V power drives value of setting to it.A suitable time delay circuit 25 postpones two power supplys of 3.3V, 5.0V from the conversion of standby power to effective power supply, till after 3.3V, the operation of 5.0V primary power.

The present invention includes a kind of integrated circuit, be used to monitor and control power supply from power supply, described power supply produces a plurality of different output voltages, wherein each electric power output voltage gets from main power voltage, described integrated circuit comprises: be used to receive the input media from a plurality of power supply outputs of described power supply, thereby the power supply output that is used to control input produces the device of the power supply output of controlled voltage, be used for relatively representing the signal of main power voltage and the device of reference signal, it is characterized in that, also comprise being used to detect the device that the primary power output voltage meets or exceeds the moment of thresholding reference value, and just be connected to the device on the computing machine time delay that after the primary power output voltage reaches reference thresholds, makes a plurality of electric power output voltages postpone a selection.

The invention provides and a kind ofly be used to monitor and control integrated circuit from the power supply of the ATX power supply of computing machine.Conventional ATX power supply produces a plurality of different output voltages, and still wherein each all is to get from the main power voltage that is generally 12V.Described integrated circuit comprises a plurality of input pins, is used to be provided for receiving the input media of exporting from a plurality of power supplys of ATX power supply.Described integrated circuit also comprises conventional LPC circuit, is used to control its each power output.A comparator circuit is relatively represented main power voltage and signal and reference signal.A voltage divider provides an input of comparer, and another input is relatively provided by the thresholding reference power source.When the signal of dividing potential drop surpasses thresholding, a this result's of expression of comparer output signal.This signal means that primary power has at least reached 90% of its desired value.Then, the output of comparer triggers a timing circuit.Described timing circuit postpones the startup of computing machine in the time of a setting, the described time is corresponding to the timing specification of ATX power supply.These regulations require voltages and the power supply that obtains by primary power in the time of a control very carefully, be generally 40ms, reach its magnitude of voltage separately.Described timing circuit is set to such time delay, and it equals or about the time in the ATX regulation.In a kind of typical application, described time delay is set to approximate greatly 100ms.After described time delay, the present invention produces one and adds electric signal in process.

The present invention also comprises a kind of computer system with the power supply that is monitored, comprise a power supply that is used to produce a plurality of different DC voltage, a mainboard that comprises memory cell and CPU (central processing unit), the operating voltage that each unit need be different with other unit wherein, and power monitoring integrated circuit, it is set between power supply and the mainboard, be used to control of the power supply of described power supply to described mainboard, described power supply monitoring circuit comprises the input media that is used to receive from a plurality of power supply outputs of described power supply, the power supply that is used to control input is exported the device that produces controlled voltage source output, be used for relatively representing the signal of primary power output voltage and the device of reference signal, it is characterized in that, also comprise being used to detect the device that the primary power output voltage meets or exceeds the moment of thresholding reference value, and just be connected to the device on the computing machine time delay that after the primary power output voltage reaches reference thresholds, makes a plurality of electric power output voltages postpone a selection.

The present invention also comprises and a kind ofly is used to monitor and controls method from the power supply of power supply, described power supply produces a plurality of different output voltages, wherein each electric power output voltage gets from a main power voltage, it is characterized in that, reception is from a plurality of power supply outputs of described power supply, the power supply output of control input is to produce controlled voltage source output, relatively represent the signal and the reference signal of main power voltage, detect the primary power output voltage and meet or exceed the moment of a thresholding reference value, and link to each other with computing machine the time delay that makes a plurality of electric power output voltages postpone a selection after the primary power output voltage reaches reference thresholds.

At this moment, computing machine just can enter required mode of operation, comprises effective status or sleep state.

Description of drawings

Fig. 1 is the general schematic view of the power distribution system in the computing machine;

Fig. 2 is the synoptic diagram of comparator circuit of the present invention;

Fig. 3 is to use the synoptic diagram of the integrated circuit of electric power management circuit of the present invention;

Fig. 4 is illustrated in all outputs by the curve at interval of soft start under the sleep state of gating;

Fig. 5 is illustrated in soft start curve at interval under the effective status.

Embodiment

Fig. 1 represents the level circuit synoptic diagram of the part of personal computer.ATX AC/DC power supply 10 comprises transformer and DC-DC converter chip.Power supply 10 is included in the splicing ear of its ac power input end.Its 9 outputs comprise standby output and the 12V of a 5V, 5V, 3 principal voltage outputs of 3.3V.From the output of ATX power supply coupling connection closely mutually.Really, they are from same AC power.When the time window of 40ms finishes, in case the primary power of 12V passes through 90% of its specified setting, the power supply of 5V and 3.3V will equal or exceed 90% of its specified setting.In fact, can use of the representative of the main power voltage of 12V as other principal voltage.Do not need to monitor practically the voltage of 5V and 3.3V, because the power supply of they and 12V is relevant.Thereby, in order to make all voltage conforms requirements, only need to monitor the power supply of 12V.When the time window of 40ms finishes, in case the power supply of 12V meets the requirements, the power supply of 5V and 3.3V also will meet the requirements.

In supply monitor integrated circuit 20, introduce comparator circuit 22.Comparator circuit 22 is resistive divider networks that comprise resistance R 1 and R2, sees Fig. 2.Select enough big resistance, make the voltage of input comparator 24 be in by dividing potential drop in the scope of standby power supply of 5V.Be input to the voltage V of comparer 24 _REFStandby power supply from 5V.Maximum reference value is set to 90% of ratings, i.e. the 90%=10.8V of 12V.In a preferred embodiment, reference voltage is near 1.2V, and voltage divider is 9 to 1 voltage divider.Thereby when the voltage on resistance R 2 was 10.6V, the voltage that is input to comparer equated, and be high in the output signal of the terminal 27 of comparer, represented voltage V ₁₂Near 90% of its ratings.High signal at terminal 27 is imported into a circuit that is used to produce derivation voltage by control line 32.The height output of comparer 24 is postponed by delay circuit 25.This control signal represents, 5,3.3 and the present value of power supply of 2.5V be applicable to produce and derive from voltage.

Referring to Fig. 3, wherein show further details of the present invention.Be supplied to mainboard and be monitored from the master battery signal of the 12V of power supply 10 by circuit 301.Described circuit provides input voltage to the voltage divider (not shown, as to see Fig. 2) that is included in the monitor integrated circuit 22.Supply monitor integrated circuit 22 comprises timing circuit (not shown, as to see Fig. 2), is used to measure the 90% o'clock institute's elapsed time that equals or exceeds its ratings from the power supply of 12V.For mainboard, this time is less than the 100ms window.When the timing circuit time then, steering logic 304 oxide-semiconductor control transistors Q2, Q3, the operation of Q4 and Q5 is converted to line voltage from power supply 10 to two circuits of 5V and 3.3V from its standby voltage separately.

The ACPI that circuit 22 has been simplified in microprocessor and computer utility meets design.Circuit 22 integrated two linear controllers and low current transmission transistors, and handle monitors and control function is integrated in the SOIC encapsulation of one 16 contact pin.A linear controller 305 is at sleep state S3, produces the DUAL voltage plane (plane) of 3.3V during the S4/S5 from the 5VSB output of ATX power supply, according to the instruction by the state of 3.3VDUAL gating pin, powers to the PCI groove by outside transmission transistor.Use the output for the 3.3V among the PCI operation conversion ATX during S0 and S1 (effectively) mode of operation of another transmission transistor.Second linear controller 306 is powered to the 2.5V/3.3V of computer system storer by the outside transmission transistor under effective status.During the S3 state, integrated transmission transistor provides the sleep state power of 2.5V/3.3V.The output of the 5V of the 3rd controller 307 by connecting ATX under effective status or the 5VSB that connects ATX under sleep state are to the power supply of the DUAL plane of a 5V.

Can select the mode of operation (effective status output or sleep state output) of circuit 22 by two control pins 319 and 318.Be provided for controlling the logic control 304 of the validity of different power supply modes by two gating pins 319 and 320.Under effective status, the DUAL linear regulator 305 of 3.3V uses outside N-channel MOS FET 331 that output 314 (V OUT1) are directly linked to each other with the input of the 3.3V that is provided by ATX (or its equivalent) power supply, makes the loss minimum simultaneously.Under sleep state, the DUAL of 3.3V output offers controller by outside NPN transistor 330 from ATX5VSB.For the setting of 3.3V, provide effective status power to 2.5/3.3VMEM output 351 by outside NPN transistor 332 or nmos switch.Under sleep state, the connection of this output is delivered to the internal delivery transistor.The DUAL output 352 of 5V is by two MOS transistor power supplies.At sleep state, 333 conductings of PMOS (or PNP) transistor are from the electric current of ATX 5VSB, and under effective status, electric current is delivered to the nmos pass transistor 334 that links to each other with the output of ATX 5B.With the DUAL output class of 3.3V seemingly, the operation of 5V DUAL output 352 is not only by the State Control of contact pin 317 and 318, and by the State Control of EN5VDL gating pin 319.

5VSB power-on reset (POR) signal initialization soft start program.The internal current source of one 10 μ A is charged to 5V to an external capacitor.The reference input of error amplifier is clamped to the value that is directly proportional with soft start pin voltage.Because soft start pin voltage approximately is transformed into 2.5V from 1.25V, so the input clamp allows a controlled fast output voltage to rise.

Fig. 4 is illustrated in all output voltages by a kind of soft start program of starting of typically being used under the sleep state of gating.In time T 0, circuit is added 5V SB (biasing).In time T 1,5V SB surpasses the POR value, and inner quick-charging circuit is elevated to the SS condenser voltage near 1V fast, at this moment, the current source of 10 μ A continues to the capacitor charging, reaches the voltage (usually) of 1.25V, further charging of inner clamp restriction up to T2.The clamp of soft start voltage (T2-T3 at interval) can only utilize the capacitor observation less than 0.1 μ F.The soft start capacitor device that is equal to or greater than 0.1 μ F will occur one does not have this steadily slope of part.In time T 3, (general 5V SB POR (T1), the current source of 10 μ A continue the soft start capacitor device is charged 3ms.At this moment, the reference of error amplifier input begins conversion, makes output voltage rise with being directly proportional.Rising lasts till time T 4, and this moment, all voltages reached its value of setting.In time T 5, when the magnitude of voltage of soft start capacitor device reached about 2.8V, the under-voltage monitoring circuit was activated, the soft start capacitor device by rapid discharge to the value that keeps when the time T 2 (approximately 11.25V).

If apply 5VSB during for logic high 317 and 318, then circuit 22 will keep effective status, and keep controlled external transistor to end, surpass the thresholding (general 10.8V) that is provided with about 50ms afterwards up to output (detecting) at 12V input end 311 at the 12V of ATX.This timing characteristic needs, so that guarantee that main ATX output is stable.Described timing characteristic also can be guaranteed when keeping sleep state from the level and smooth conversion of sleep state to effective status.

Under the condition that initial output is 0V from sleep state to transition period of effective status (for example at EN3VDL=1, under the condition of EN5VDL=0, S4/S5 changes to S0, perhaps directly enter effective status) by simply powering up program, be pulled to height by means of the diode that makes the N-channel MOS FET itself that is connected to these outputs and 3.3V, 5V ATX output, the situation of this soft start is represented in 3V DUAL and 5V DUAL output through an accurate soft start Fig. 5.

When main ATX exported in time T 0 conducting, 5V SB existed.Similarly, the soft start capacitor device has been charged to 1.25V, and clamp is effectively, waits for that the 12VPOR timer time arrives.Along with the rising of 3.3V 1N and 5V 1N, 3,3V DUAL and 5V DUAL output capacitor C1, C3 pass through the own diode charging (see figure 3) of Q3, Q5 respectively.In time T 1, the ATX of 12V output surpasses the under-voltage thresholding of the 12V of circuit 22, thereby starts inner 50ms (usually) timer 25 (Fig. 2).At T2, timer time arrives, the beginning soft start, and storer output is risen, and arrives predetermined restricted in time T 3.When storer voltage rose, DLA output 312 was pulled to height (12V), makes Q3, Q5 conducting, and in time T 2,3.3V DUAL, 5V DUAL output is stable.In time T 4, when soft start voltage reached about 28V, the under-voltage monitoring circuit was by gating, and the soft start capacitor device is arrived about 2.45V by rapid discharge.

Require to enter sleep state during effective status, soft start raise and caused and then enter required state by a new soft start program by chip reset this moment.

A kind of supply monitor circuit and power monitoring method have postponed the startup of computing machine, are in safe operating value up to a plurality of power circuits.Integrated circuit only monitors the voltage of primary power output, thereby does not need to monitor each power supply.Power supply is accurately made according to the rules, promptly the primary power of 5V power supply and 3.3V power supply and 12V is bundled.The power supply of 12V reach its value of setting 90% after in the 40ms, the ATX power supply is 90% of 3.3V, 5.0V power drives value of setting to it.Time delay circuit 25 postpones two power supplys of 3.3V, 5.0V from the conversion of standby power to effective power supply, till at 3.3V, when the 5.0V power supply is in the safe operation magnitude of voltage.

Claims

1. integrated circuit, be used to monitor and control power supply from power supply, described power supply produces a plurality of different output voltages, wherein each electric power output voltage gets from main power voltage, described integrated circuit comprises: be used to receive the input media from a plurality of power supply outputs of described power supply, thereby the power supply output that is used to control input produces the device of the power supply output of controlled voltage, be used for relatively representing the signal of main power voltage and the device of reference signal, it is characterized in that, also comprise being used to detect the device that the primary power output voltage meets or exceeds the moment of thresholding reference value, and just be connected to the device on the computing machine time delay that after the primary power output voltage reaches reference thresholds, makes a plurality of electric power output voltages postpone a selection.

2. integrated circuit as claimed in claim 1, it is characterized in that comprising, be used to produce the device that adds electric signal, describedly power up all output voltages that are monitored that signal indication is monitored power supply and be equal to or greater than an available and effective magnitude of voltage, and the device that wherein is used for comparison comprises voltage divider and comparer, wherein said comparer and a thresholding reference voltage coupling connection, and described voltage divider and main power voltage and comparer coupling connection, and a linear controller, be used to control the output voltage of each electric power output voltage of supply monitor circuit.

3. integrated circuit as claimed in claim 2 is characterized in that, described deferred mount comprises a timing circuit, and the output of described comparer links to each other with described timing circuit, is used for the time delay of a selection of connection delay of supply voltage and computing machine.

4. computer system with the power supply that is monitored, comprise a power supply that is used to produce a plurality of different DC voltage, a mainboard that comprises memory cell and CPU (central processing unit), the operating voltage that each unit need be different with other unit wherein, and power monitoring integrated circuit, it is set between power supply and the mainboard, be used to control of the power supply of described power supply to described mainboard, described power supply monitoring circuit comprises the input media that is used to receive from a plurality of power supply outputs of described power supply, the power supply that is used to control input is exported the device that produces controlled voltage source output, be used for relatively representing the signal of primary power output voltage and the device of reference signal, it is characterized in that, also comprise being used to detect the device that the primary power output voltage meets or exceeds the moment of thresholding reference value, and just be connected to the device on the computing machine time delay that after the primary power output voltage reaches reference thresholds, makes a plurality of electric power output voltages postpone a selection.

5. computer system as claimed in claim 4, it is characterized in that comprising, be used to produce the device that adds electric signal, describedly power up all output voltages that are monitored that signal indication is monitored power supply and be equal to or greater than an available and effective magnitude of voltage, and the device that wherein is used for comparison comprises voltage divider and comparer, wherein said comparer and a thresholding reference voltage coupling connection, and described voltage divider and main power voltage and comparer coupling connection, and the device that is used for control output voltage comprises a plurality of linear controllers, and each linear controller is used to control the output voltage of one of electric power output voltage of supply monitor circuit.

6. computer system as claimed in claim 5, it is characterized in that, described deferred mount comprises a timing circuit, and the output of described comparer links to each other with described timing circuit, is used for the time delay of a selection of connection delay of supply voltage and computing machine.

7. one kind is used to monitor and controls method from the power supply of power supply, described power supply produces a plurality of different output voltages, wherein each electric power output voltage gets from a main power voltage, it is characterized in that, reception is from a plurality of power supply outputs of described power supply, the power supply output of control input is to produce controlled voltage source output, relatively represent the signal and the reference signal of main power voltage, detect the primary power output voltage and meet or exceed the moment of a thresholding reference value, and link to each other with computing machine the time delay that makes a plurality of electric power output voltages postpone a selection after the primary power output voltage reaches reference thresholds.

8. method as claimed in claim 7, it is characterized in that, produce one and add electric signal, the described electric signal that adds is used to represent that all output voltages that are monitored that are monitored power supply are equal to or greater than an available and effective magnitude of voltage, wherein comparison step comprises that a signal to representing main power voltage carries out dividing potential drop, and relatively signal and a thresholding reference voltage of dividing potential drop, control each electric power output voltage of supply monitor circuit linearly.

9. method as claimed in claim 7, it is characterized in that, described delay step comprises a time interval is set, and the described time interval is when surpassing the thresholding reference signal in voltage division signal, and the time delay of a selection of connection delay of supply voltage and computing machine.