CN114024434A - Soft start and electric leakage protection circuit for power management chip - Google Patents
Soft start and electric leakage protection circuit for power management chip Download PDFInfo
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- CN114024434A CN114024434A CN202111190984.0A CN202111190984A CN114024434A CN 114024434 A CN114024434 A CN 114024434A CN 202111190984 A CN202111190984 A CN 202111190984A CN 114024434 A CN114024434 A CN 114024434A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/36—Means for starting or stopping converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
Abstract
The invention relates to a soft start and leakage protection circuit for a power management chip, which comprises: a first diode and a second diode are respectively parasitized between a source electrode and a drain electrode of the power tube and the well region, the source electrode or the drain electrode of the power tube is used as an input node, and the drain electrode or the source electrode of the power tube is used as an output node; the substrate of the first switch tube is connected with the substrate of the power tube, the source electrode or the drain electrode is connected with the input node, and the drain electrode or the source electrode is connected with the substrate of the power tube; the substrate of the second switch tube is connected with the substrate of the power tube, the source electrode or the drain electrode is connected with the output node, and the drain electrode or the source electrode is connected with the substrate of the power tube; the state of the power tube is controlled by the mutual cooperation of the voltage comparison circuit, the low voltage detection locking output circuit, the soft start circuit, the substrate control circuit and the grid drive circuit to realize soft start and electric leakage protection.
Description
Technical Field
The invention relates to the technical field of power management chips, in particular to a soft start and leakage protection circuit for a power management chip.
Background
With the rapid development of society, electronic devices have become an essential part of people's daily work and life. Power management chips represented by LDO, DC-DC, lithium battery charging chips, etc. are widely used in various electronic devices. Taking LDO as an example, a general LDO management chip generates a large current at the initial stage of external power supply, and a so-called peak current (peak) is generated due to the instantaneous output to the load, which may cause damage due to the reduced tolerance of components and cause overshoot during start-up. Therefore, it is very necessary to add a soft start circuit in the LDO. When the circuit is in the off mode, the power supply still exists at the input port of the circuit, and at this time, in order to eliminate the leakage current, it is very necessary to add a leakage protection circuit.
Disclosure of Invention
The invention aims to provide a soft start and leakage protection circuit for a power management chip, which can perform soft start and leakage protection on the power management chip.
The technical scheme adopted by the invention for solving the technical problems is as follows: the utility model provides a soft start and electric leakage protection circuit for power management chip, includes:
a first diode and a second diode are respectively parasitized between a source electrode and a drain electrode of the power tube and the well region; the source electrode of the power tube is used as an input node, the drain electrode of the power tube is used as an output node, or the drain electrode of the power tube is used as an input node, and the source electrode of the power tube is used as an output node;
the substrate of the first switch tube is connected with the substrate of the power tube, the source electrode or the drain electrode is connected with the input node, and the drain electrode or the source electrode is connected with the substrate of the power tube;
the substrate of the second switch tube is connected with the substrate of the power tube, the source electrode or the drain electrode is connected with the output node, and the drain electrode or the source electrode is connected with the substrate of the power tube;
a voltage comparison circuit for comparing voltages of the input node and the output node;
the low-voltage detection locking output circuit is used for detecting the magnitude of power supply voltage, and outputting a voltage electrifying unfinished signal to the substrate control circuit, the grid drive circuit and the soft start circuit when the power supply voltage is lower than the minimum working voltage of the circuit;
the soft start circuit is used for enabling the circuit to enter a soft start stage or a normal working stage according to the output node and the signal of the low-voltage detection locking output circuit;
the substrate control circuit is used for controlling the states of the first switching tube and the second switching tube according to signals of the low-voltage detection locking output circuit, the voltage comparison circuit and the soft start circuit;
and the grid driving circuit is used for controlling the state of the power tube according to the signals of the low-voltage detection locking output circuit and the soft start circuit.
A first input end and a second input end of the voltage comparison circuit are respectively connected with the input node and the output node, and an output end of the voltage comparison circuit is connected with a second input end of the substrate control circuit; a first input end of the substrate control circuit is connected with a second output end of the low-voltage detection locking output circuit, and a first output end and a second output end are respectively connected with a grid electrode of the first switch tube and a grid electrode of the second switch tube; the first input end of the low-voltage detection locking output circuit is connected with the input node, and the first output end of the low-voltage detection locking output circuit is connected with the first input end of the grid drive circuit; the output end of the grid driving circuit is connected with the grid of the power tube; the first input end of the soft start circuit is connected with the third output end of the low-voltage detection locking output circuit, the second input end of the soft start circuit is connected with the output node, the first output end of the soft start circuit is connected with the second input end of the grid drive circuit, and the second output end of the soft start circuit is connected with the third input end of the substrate control circuit.
And at the stage of incomplete power supply electrification, the low-voltage detection locking output circuit, the grid drive circuit and the substrate control circuit are matched with each other to control the state of the power tube to be cut off, so that the substrate of the power tube is connected to the input node.
After the low-voltage detection locking output circuit detects that the power supply voltage is less than the minimum working voltage, the low-voltage detection locking output circuit respectively outputs power supply electrifying unfinished signals to the substrate control circuit, the grid drive circuit and the soft start circuit; the grid driving circuit controls the power tube to be disconnected after receiving a signal that the power supply is not electrified, the substrate control circuit controls the first switch tube to be connected and the second switch tube to be disconnected after receiving the signal that the power supply is not electrified; and the soft start circuit does not perform soft start after receiving the signal that the power supply is not electrified.
In a soft start stage, the low voltage detection locking output circuit, the grid drive circuit, the soft start circuit and the substrate control circuit are matched with each other to control the state of the power tube to be cut off, so that the substrate of the power tube is connected to the output node.
The low-voltage detection locking output circuit detects the magnitude of the power supply voltage, and after the power supply is electrified, the low-voltage detection locking output circuit outputs power supply electrifying completion signals to the grid drive circuit and the soft start circuit respectively; the grid driving circuit controls the power tube to be disconnected after receiving the signal of finishing power-on of the power supply, and the soft start circuit outputs a soft start starting signal to the substrate control circuit after receiving the signal of finishing power-on of the power supply; the substrate control circuit receives the soft start starting signal and then controls the first switch tube to be switched off and the second switch tube to be switched on; and at the moment, the soft start circuit detects the voltage of the output node, when the voltage of the output node is higher than the internal reference voltage of the soft start circuit, the soft start is finished, and the soft start circuit sends a soft start finishing signal to the substrate control circuit.
In a substrate selection stage, the low-voltage detection locking output circuit, the gate drive circuit, the substrate control circuit and the voltage comparison circuit are matched with each other to control the state of the power tube to be conducted, so that the substrate of the power tube is connected to a point with higher voltage in the input node and the output node.
After the soft start circuit detects that the soft start is finished, a soft start finishing signal is output to the substrate control circuit and the grid drive circuit, the grid drive circuit controls the power tube to be conducted, the substrate control circuit obtains a comparison result of voltage values of the input node and the output node from a voltage comparison circuit, and if the potential of the input node is higher than that of the output node, the substrate control circuit controls the first switch tube to be conducted and the second switch tube to be disconnected; and if the potential of the input node is lower than that of the output node, the substrate control circuit controls the first switch tube to be switched off and the second switch tube to be switched on.
When the circuit is in a closing mode or the power supply voltage is too low, the low-voltage detection locking output circuit, the grid drive circuit and the substrate control circuit are matched with each other to control the state of the power tube to be cut off, so that the substrate of the power tube is connected to the input node.
When the circuit is in a closing mode or the low-voltage detection locking output circuit detects that the power supply voltage is too low, the grid driving circuit controls the power tube to be disconnected, the substrate control circuit controls the first switch tube to be connected, and the second switch tube is disconnected.
Advantageous effects
Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages and positive effects: the invention can realize the soft start and the electric leakage protection of the power management chip by one power tube, two switching tubes and the combination of a substrate control circuit, a low voltage detection and locking output (UVLO) circuit, a soft start circuit and a voltage comparison circuit.
Drawings
FIG. 1 is a schematic structural diagram of a PMOS transistor in a P-substrate N-well process;
FIG. 2 is a circuit diagram of an embodiment of the present invention;
FIG. 3 is a simplified diagram of the power-on and power-off states of P1 and P2 before power-on is completed or during normal operation or when the circuit is in an off mode or during low supply voltage, according to an embodiment of the present invention;
FIG. 4 is a simplified diagram of the soft start with P2 turned on and P1 turned off according to the embodiment of the present invention;
FIG. 5 is a simplified diagram of the embodiment of the present invention during the normal operation stage, when P2 is turned on and P1 is turned off to eliminate the leakage current;
FIG. 6 is a schematic diagram of power-up and power-down processes of a power supply in an embodiment of the invention;
fig. 7 is a schematic diagram of Vnode, Vref, and soft start end signal during soft start according to the embodiment of the present invention.
Detailed Description
The invention will be further illustrated with reference to the following specific examples. It should be understood that these examples are for illustrative purposes only and are not intended to limit the scope of the present invention. Further, it should be understood that various changes or modifications of the present invention may be made by those skilled in the art after reading the teaching of the present invention, and such equivalents may fall within the scope of the present invention as defined in the appended claims.
The embodiment of the invention relates to a soft start and leakage protection circuit for a power management chip, which comprises:
a power tube P3, a first diode D1 and a second diode D2 are respectively parasitized between the source electrode and the drain electrode of the power tube P3 to the well region; the source of the power transistor P3 is used as the input Node1, and the drain of the power transistor P3 is used as the output Node 2. The input Node1 is used for connecting an input power voltage Vin, and the output Node2 is connected with a load resistor RL and a load capacitor CL which are connected in parallel. It should be noted that the input node may also be the drain of the power transistor P3, and the output node is the source of the power transistor P3.
As shown in fig. 1, the power transistor P3 may be a PMOS transistor in a P-substrate N-well process, and the source and drain to N-well regions respectively host diodes D1 and D2. When the substrate (N-well) potential of the power transistor P3 is lower than the source or the drain, the first diode D1 or the second diode D2 will be turned on, and there will be a leakage current flowing through the first diode D1 or the second diode D2. When the substrate (N-well) potential of the power transistor P3 is higher than the source or drain, the first diode D1 or the second diode D2 will be turned off, and no leakage current will flow through the first diode D1 or the second diode D2. By utilizing the basic principle, the soft start and electric leakage protection circuit can be designed, and can be applied to power management chips such as LDO (low dropout regulator), DC-DC (direct current-direct current), lithium battery charging chips and the like.
The first switch tube P1 is a PMOS tube, the substrate of the first switch tube P1 is connected to the substrate Node3 of the power tube P3, the source or drain is connected to the input Node1, and the drain or source is connected to the substrate Node3 of the power tube P3.
The second switch tube P2 is a PMOS tube, the substrate of the second switch tube P2 is connected to the substrate Node3 of the power tube P3, the source or drain is connected to the output Node2, and the drain or source is connected to the substrate Node3 of the power tube P3.
It should be noted that the PMOS transistor of the power transistor in this embodiment may be replaced by an NMOS transistor, and the first switch transistor P1 and the second switch transistor P2 may also be replaced by an NMOS transistor.
And the voltage comparison circuit is used for comparing the voltages of the input Node1 and the output Node2 and outputting the comparison result to the substrate control circuit.
And the UVLO circuit is used for detecting the magnitude of the power supply voltage Vin and outputting a voltage electrifying unfinished signal to the substrate control circuit, the gate drive circuit and the soft start circuit when the power supply voltage Vin is lower than the minimum working voltage of the circuit.
And the soft start circuit is used for enabling the circuit to enter a soft start stage or a normal working stage according to the signals of the output Node2 and the UVLO circuit.
And the substrate control circuit is used for controlling the states of the first switching tube P1 and the second switching tube P2 according to signals of the UVLO circuit, the voltage comparison circuit and the soft start circuit.
And the gate drive circuit is used for controlling the state of the power tube P3 according to signals of the UVLO circuit and the soft start circuit.
As shown in fig. 2, the input power voltage Vin is connected to the source or drain of the power transistor P3, i.e. the input Node 1; the drain or source of the power tube P3 is connected to the load capacitor CL and the load resistor RL, i.e., the output Node 2; the gate of the power tube P3 is connected to the Output end Output1 of the gate drive circuit; the anode of the parasitic diode D1 is connected to the input Node1, and the cathode is connected to the substrate Node3 of the power tube P3; the anode of the parasitic diode D2 is connected to the output Node2, and the cathode is connected to the substrate Node3 of the power tube P3; the substrate of the first switch tube P1 is connected with the substrate of the power tube P3, the source or the drain is connected with the input Node1, and the drain or the source is connected with the substrate Node3 of the power tube P3; the substrate of the second switch tube P2 is connected with the substrate of the power tube P3, the drain or source electrode is connected with the output Node2, and the source or drain electrode is connected with the substrate Node3 of the power tube P3; a first Input terminal 1 and a second Input terminal 2 of the voltage comparison circuit are respectively connected to the Input Node1 and the output Node2, and an output terminal is connected to a second Input terminal Input2 of the substrate control circuit; a first Input end 1 of the substrate control circuit is connected to a second Output end Output2 of the UVLO circuit, and a first Output end Input1 and a second Output end Input2 of the substrate control circuit are respectively connected to the gates of the first switching tube P1 and the second switching tube P2; an Input end 1 of the UVLO circuit is connected to the Input Node1, and a first Output end 1 is connected to a first Input end 1 of the gate driving circuit; an Output end Output1 of the gate drive circuit is connected to the gate of the power tube P3; a first Input terminal Input1 of the soft start circuit is connected to a third Output terminal Output3 of the UVLO circuit, a second Input terminal Input2 of the soft start circuit is connected to the Output Node2, the first Output terminal Output1 of the soft start circuit is connected to the second Input terminal Input2 of the gate driving circuit, and a second Output terminal Output2 of the soft start circuit is connected to the third Input terminal Input3 of the substrate control circuit.
The working process of the soft start and leakage protection circuit for the power management chip of the embodiment is totally divided into four stages, and the working states of the power tubes are controlled corresponding to different substrate control circuits. These four phases include:
the first stage is as follows: and a power-on unfinished stage of the power supply.
At this stage, the UVLO circuit, the gate driver circuit, and the substrate control circuit cooperate to control the state of the power transistor P3 to be off, so that the substrate of the power transistor P3 is connected to the input Node 1.
Specifically, first, the UVLO circuit detects the magnitude of the power supply voltage Vin. It is detected that the power supply voltage Vin is less than the minimum operable voltage V1, i.e. before time t1 in fig. 6. And the UVLO circuit outputs a power supply electrifying unfinished signal to the substrate control circuit, the gate drive circuit and the soft start circuit respectively. The gate driving circuit receives a signal indicating that power-on of the power supply is not completed and then controls the power tube P3 to be disconnected, the substrate control circuit receives a signal indicating that power-on of the power supply is not completed and then controls the first switch tube P1 to be connected and the second switch tube P2 to be disconnected, namely, the diode D1 is short-circuited. The soft start circuit does not perform soft start after receiving a signal that power-on of the power supply is not completed. A simplified schematic of the overall system at this stage is shown in figure 3. At this time, no current is used for charging the load capacitor, and the whole system waits for the power supply to be powered on.
And a second stage: a soft start phase.
At this stage, the UVLO circuit, the gate driver circuit, the soft start circuit, and the substrate control circuit cooperate with each other to control the state of the power transistor P3 to be off, so that the substrate of the power transistor P3 is connected to the output Node 2.
Specifically, the UVLO circuit detects the magnitude of the power supply voltage Vin. After the power supply is powered on, namely after the time t1 and before the time t2 in fig. 6. The UVLO circuit outputs power supply electrifying completion signals to the gate drive circuit and the soft start circuit respectively. The grid driving circuit controls the power tube P3 to be disconnected after receiving the signal of power supply electrification completion, and the soft start circuit outputs a soft start starting signal to the substrate control circuit after receiving the signal of power supply electrification completion. After receiving the soft start signal, the substrate control circuit controls the first switch P1 to turn off, and the second switch P2 to turn on, i.e., the second diode D2 is shorted. A simplified schematic of the overall system is now shown in figure 4. The power supply charges the load capacitor through the first diode D1, and enters a soft start phase. Meanwhile, the soft start circuit detects a voltage Vnode2 of the output Node2, and the soft start is ended when the voltage Vnode2 is higher than the soft start circuit internal reference voltage Vref. The soft start circuit sends a soft start end signal to the substrate control circuit. The voltage Vnode2, the reference voltage Vref, and the soft start end signal are changed as shown in fig. 7.
And a third stage: a substrate selection phase.
At this stage, the UVLO circuit, the gate driver circuit, the substrate control circuit, and the voltage comparator circuit cooperate with each other to control the state of the power transistor P3 to be turned on, and the substrate is connected to a higher voltage point of the input Node1 and the output Node 2.
Specifically, after the soft start circuit detects that the soft start is completed, the soft start circuit outputs a soft start completion signal to the substrate control circuit and the gate drive circuit, and the system enters a substrate selection stage. The gate driving circuit controls the power tube P3 to be turned on. The substrate control circuit obtains the comparison result of the voltage values of the input Node1 and the output Node2 from the voltage comparison circuit, then controls the states of the first switch tube P1 and the second switch tube P2, and enables the substrate to be short-circuited to the point with higher voltage in the input Node1 and the output Node 2. If the potential of the input Node1 is higher than the potential of the output Node2, the substrate control circuit controls the first switch transistor P1 to be turned on and the second switch transistor P2 to be turned off, so as to short the substrate of the power transistor P3 to the input Node 1. A simplified schematic of which is shown in figure 3. At this time, the parasitic first diode D1 is short-circuited, and the second diode D2 is cut off, thereby realizing leakage protection. If the potential of the input Node1 is lower than the potential of the output Node2, the substrate control circuit controls the first switch transistor P1 to be turned off and the second switch transistor P2 to be turned on, so as to short the substrate of the power transistor P3 to the output Node 2. A simplified schematic of this is shown in figure 5. At this time, the parasitic second diode D2 is short-circuited, and the first diode D1 is cut off, thereby realizing leakage protection. After the substrate selection phase is finished, the circuit starts to work normally.
A fourth stage: the circuit is in off mode or in the phase of too low supply voltage.
At this stage, the UVLO circuit, the gate driver circuit, and the substrate control circuit cooperate with each other to control the state of the power transistor P3 to be off, and the substrate is connected to the input Node 1.
Specifically, when the circuit is in off mode or the UVLO detects that the supply voltage is too low, the gate driver circuit controls the power tube P3 to turn off. At this time, the power voltage still exists at the input Node1, the substrate control circuit controls the first switch P1 to be turned on, the second switch P2 is turned off, and the parasitic first diode D1 is short-circuited at this time, so as to eliminate the leakage current, thereby implementing the leakage protection in the off mode or under the condition of too low power voltage, and the simplified schematic diagram thereof is shown in fig. 3.
It can be easily found that the system has good effect in eliminating the large current pulse and the leakage current in the off state of the circuit after being implemented. The invention can realize the soft start and the electric leakage protection of the power management chip by one power tube, two switching tubes and the combination of a substrate control circuit, a low voltage detection and locking output (UVLO) circuit, a soft start circuit and a voltage comparison circuit.
Claims (10)
1. A soft start and leakage protection circuit for a power management chip, comprising:
a first diode and a second diode are respectively parasitized between a source electrode and a drain electrode of the power tube and the well region;
the source electrode of the power tube is used as an input node, the drain electrode of the power tube is used as an output node, or the drain electrode of the power tube is used as an input node, and the source electrode of the power tube is used as an output node;
the substrate of the first switch tube is connected with the substrate of the power tube, the source electrode or the drain electrode is connected with the input node, and the drain electrode or the source electrode is connected with the substrate of the power tube;
the substrate of the second switch tube is connected with the substrate of the power tube, the source electrode or the drain electrode is connected with the output node, and the drain electrode or the source electrode is connected with the substrate of the power tube;
a voltage comparison circuit for comparing voltages of the input node and the output node;
the low-voltage detection locking output circuit is used for detecting the magnitude of power supply voltage, and outputting a voltage electrifying unfinished signal to the substrate control circuit, the grid drive circuit and the soft start circuit when the power supply voltage is lower than the minimum working voltage of the circuit;
the soft start circuit is used for enabling the circuit to enter a soft start stage or a normal working stage according to the output node and the signal of the low-voltage detection locking output circuit;
the substrate control circuit is used for controlling the states of the first switching tube and the second switching tube according to signals of the low-voltage detection locking output circuit, the voltage comparison circuit and the soft start circuit;
and the grid driving circuit is used for controlling the state of the power tube according to the signals of the low-voltage detection locking output circuit and the soft start circuit.
2. The soft-start and leakage protection circuit for a power management chip of claim 1, wherein a first input terminal and a second input terminal of said voltage comparison circuit are connected to said input node and said output node, respectively, and an output terminal is connected to a second input terminal of said substrate control circuit; a first input end of the substrate control circuit is connected with a second output end of the low-voltage detection locking output circuit, and a first output end and a second output end are respectively connected with a grid electrode of the first switch tube and a grid electrode of the second switch tube; the first input end of the low-voltage detection locking output circuit is connected with the input node, and the first output end of the low-voltage detection locking output circuit is connected with the first input end of the grid drive circuit; the output end of the grid driving circuit is connected with the grid of the power tube; the first input end of the soft start circuit is connected with the third output end of the low-voltage detection locking output circuit, the second input end of the soft start circuit is connected with the output node, the first output end of the soft start circuit is connected with the second input end of the grid drive circuit, and the second output end of the soft start circuit is connected with the third input end of the substrate control circuit.
3. The soft-start and leakage protection circuit for a power management chip of claim 1, wherein during a power-up incomplete phase, the low voltage detection latch output circuit, the gate driving circuit and the substrate control circuit cooperate with each other to control the state of the power transistor to be off, so that the substrate of the power transistor is connected to the input node.
4. The soft-start and leakage protection circuit for a power management chip of claim 3, wherein the low voltage detection latch output circuit outputs a power-on unfinished signal to the substrate control circuit, the gate driver circuit and the soft-start circuit after detecting that a power voltage is less than a minimum operating voltage; the grid driving circuit controls the power tube to be disconnected after receiving a signal that the power supply is not electrified, the substrate control circuit controls the first switch tube to be connected and the second switch tube to be disconnected after receiving the signal that the power supply is not electrified; and the soft start circuit does not perform soft start after receiving the signal that the power supply is not electrified.
5. The soft-start and leakage protection circuit for a power management chip of claim 1, wherein during the soft-start phase, the low voltage detection latch output circuit, the gate driving circuit, the soft-start circuit, and the substrate control circuit cooperate with each other to control the state of the power transistor to be off, so that the substrate of the power transistor is connected to the output node.
6. The soft-start and leakage protection circuit for a power management chip of claim 5, wherein the low voltage detection latch output circuit detects a magnitude of a power voltage, and outputs a power-on completion signal to the gate driving circuit and the soft-start circuit after power-on is completed; the grid driving circuit controls the power tube to be disconnected after receiving the signal of finishing power-on of the power supply, and the soft start circuit outputs a soft start starting signal to the substrate control circuit after receiving the signal of finishing power-on of the power supply; the substrate control circuit receives the soft start starting signal and then controls the first switch tube to be switched off and the second switch tube to be switched on; and at the moment, the soft start circuit detects the voltage of the output node, when the voltage of the output node is higher than the internal reference voltage of the soft start circuit, the soft start is finished, and the soft start circuit sends a soft start finishing signal to the substrate control circuit.
7. The soft-start and leakage protection circuit for a power management chip of claim 1, wherein during a substrate selection phase, the low voltage detection latch output circuit, the gate driving circuit, the substrate control circuit and the voltage comparison circuit cooperate with each other to control the state of the power transistor to be conductive, so that the substrate of the power transistor is connected to a higher voltage point of the input node and the output node.
8. The soft-start and leakage protection circuit for a power management chip according to claim 7, wherein the soft-start circuit outputs a soft-start completion signal to the substrate control circuit and the gate driving circuit after detecting that the soft-start is completed, the gate driving circuit controls the power transistor to be turned on, the substrate control circuit obtains a comparison result of voltage values of the input node and the output node from a voltage comparison circuit, and if the potential of the input node is higher than that of the output node, the substrate control circuit controls the first switching transistor to be turned on and the second switching transistor to be turned off; and if the potential of the input node is lower than that of the output node, the substrate control circuit controls the first switch tube to be switched off and the second switch tube to be switched on.
9. The soft-start and leakage protection circuit for a power management chip of claim 1, wherein when the circuit is in an off mode or at a stage of low power supply voltage, the low voltage detection latch output circuit, the gate driving circuit and the substrate control circuit cooperate with each other to control the state of the power transistor to be off, so that the substrate of the power transistor is connected to the input node.
10. The soft-start and leakage protection circuit for a power management chip of claim 9, wherein when the circuit is in an off mode or the low voltage detection latch output circuit detects that the power voltage is too low, the gate driving circuit controls the power transistor to be turned off, the substrate control circuit controls the first switch transistor to be turned on, and the second switch transistor to be turned off.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111190984.0A CN114024434A (en) | 2021-10-13 | 2021-10-13 | Soft start and electric leakage protection circuit for power management chip |
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| CN202111190984.0A CN114024434A (en) | 2021-10-13 | 2021-10-13 | Soft start and electric leakage protection circuit for power management chip |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114944746A (en) * | 2022-06-28 | 2022-08-26 | 苏州浪潮智能科技有限公司 | Leakage compensation circuit and method |
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2021
- 2021-10-13 CN CN202111190984.0A patent/CN114024434A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114944746A (en) * | 2022-06-28 | 2022-08-26 | 苏州浪潮智能科技有限公司 | Leakage compensation circuit and method |
| CN114944746B (en) * | 2022-06-28 | 2024-02-02 | 苏州浪潮智能科技有限公司 | Leakage compensation circuit and method |
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