CN108696113B - Switching power supply shutdown delay line - Google Patents
Switching power supply shutdown delay line Download PDFInfo
- Publication number
- CN108696113B CN108696113B CN201810670791.7A CN201810670791A CN108696113B CN 108696113 B CN108696113 B CN 108696113B CN 201810670791 A CN201810670791 A CN 201810670791A CN 108696113 B CN108696113 B CN 108696113B
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- line
- power supply
- switching power
- shutdown
- triode
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/36—Means for starting or stopping converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
- H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
- H02M3/33592—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The invention provides a switching power supply shutdown delay line, which comprises a switching power supply primary side power line, a secondary side rectifying line, an isolation transformer coupling the primary side line and the secondary side line, a delay triggering line, a shutdown delay line and a shutdown line. The shutdown delay line provided by the invention is simpler in line, fewer in used components and low in cost, effectively avoids the damage of devices caused by frequent startup and shutdown of the switching power supply, and simultaneously contributes to improving the power density of the switching power supply.
Description
Technical Field
The invention relates to the field of switching power supplies, in particular to a shutdown delay line in a switching power supply.
Background
The switching power supply is a main device in the current power electronic system, the switching power supply is widely applied to the fields of communication, rail transit, electric automobiles and the like, the wide application field also enables the switching power supply to face more complex application environments, in practical application, a client generally adds a larger capacitor at the output end of the switching power supply so as to enable the switching power supply to supply stable voltage to the system, however, because space limitation is not provided at the input end of the switching power supply, enough power supply current can be supplied, when the switching power supply starts up, load current is supplied on one hand, the output capacitor is charged on the other hand, when the power supply at the input end is limited in current, the input voltage is powered down, the voltage of the input power supply is not pulled down after the switching power supply is powered down, the voltage rises, once the UVLO detects that the voltage is enough, the PWM controller can generate PWM driving signals, the switching power supply is restarted, so repeatedly started and powered down frequently, thereby leading to the auxiliary power supply to become overstress and the shutdown of the switching power supply, and other protection lines are restarted again, and the problem of frequent startup and shutdown is also caused, and the problem of needing to be solved. Today, where power density requirements are increasing, the addition of wiring tends to be a significant space-wise stress, and it is imperative to perform more functions with fewer parts.
In order to solve the problems, the invention provides a switching power supply shutdown delay line with a simple structure.
Disclosure of Invention
The invention solves the technical problem of providing a switching power supply shutdown delay line.
The technical scheme adopted by the invention for solving the technical problems is as follows: the switching power supply shutdown delay line comprises a switching power supply primary power line, a secondary rectifying line, an isolation transformer for coupling the primary line and the secondary line, a delay triggering line, a shutdown delay line and a shutdown line, wherein the delay triggering line is connected with a first port VREF and a second port ENA of a PWM controller, the shutdown delay line is connected with VREF, and the shutdown line is connected with a third port UVLO of the PWM controller.
Preferably, the switching power supply shutdown delay line is characterized in that the delay trigger line comprises a first resistor, a first capacitor, a first triode, a second triode and an integrated diode, one end of the first resistor is connected with a first port VREF of the PWM controller, the other end of the first resistor is connected with a collector electrode of the first triode, an emitter electrode of the first triode is connected with one end of the first capacitor and an emitter electrode of the second triode, a base electrode of the first triode and a base electrode of the second triode are connected with a second port ENA of the PWM controller together, the other end of the first capacitor is grounded, a collector electrode of the second triode is connected with an anode of the integrated diode, the inside of the integrated diode is formed by connecting two diodes in parallel and in series, a middle node is connected with the shutdown delay line, and a cathode is connected with the shutdown line.
Preferably, the shutdown delay line of the switching power supply comprises a first MOS transistor, a second capacitor, a second resistor, a third resistor, and a second diode, wherein a source of the first MOS transistor is connected to a first port VREF of the PWM controller, a gate of the first MOS transistor is connected to a drain of the second MOS transistor, the drain is connected to the third resistor and one end of the second capacitor together with a delay trigger line, a gate of the second MOS transistor is connected to the other end of the second capacitor, a cathode of the second diode, and one end of the second capacitor, and a source of the second MOS transistor is grounded together with an anode of the second diode, the other end of the second resistor, and the other end of the third resistor.
Preferably, the shutdown delay line of the switching power supply is characterized in that the shutdown delay line comprises a third diode and a third triode, an anode of the third diode is connected with a third port UVLO of the PWM controller, a cathode of the third diode is connected with a collector of the third triode, an emitter of the third triode is grounded, and a base of the third diode is connected with a shutdown delay trigger line and an ON/OFF control line.
Preferably, the switch power supply shutdown delay line is characterized in that the ON/OFF control line can control the ON/OFF of the module under the condition that the input end of the switch power supply is powered ON.
Preferably, the switching power supply shutdown delay line is characterized in that the primary power line of the switching power supply may be a half-bridge, a full-bridge or any other primary power structure, and the secondary rectifying line may be a full-bridge, a push-pull or any other switching power supply rectifying line.
Preferably, the switching power supply shutdown delay line is characterized in that the first port VREF of the PWM controller is a stable 5V voltage source, and is generated by the PWM controller itself, the third port UVLO determines the power-on and power-off voltages of the power supply module, and the second port ENA is connected to two current sources inside the PWM controller, and pulls up and pulls down the current when the switching power supply is turned on and off, respectively.
The switching power supply shutdown delay line provided by the invention utilizes the charging time constant of the resistor and the capacitor to establish the delay line and utilizes the port of the PWM controller to establish the delay trigger line, so that the switching power supply can trigger the delay line when in shutdown, the line is simpler, the number of used components is less, the cost is low, the working efficiency of the switching power supply is improved, a new scheme is provided for the shutdown delay line in the switching power supply, and the contribution is made to the improvement of the power density of the switching power supply.
Drawings
Fig. 1 is a schematic diagram of a shutdown delay line structure of a switching power supply according to the present invention.
Fig. 2 is a specific example of a power stage circuit of a switching power supply shutdown delay circuit provided by the present invention.
Detailed Description
Embodiments of the circuit of the present invention are described below in detail with reference to the accompanying drawings.
Fig. 1 below shows a switching power supply shutdown delay line provided by the present invention, which includes an input voltage source, an input filter line, a switching power supply primary side power line 10, a switching power supply secondary side rectifying line 20, an output filter line, an isolation transformer 30 coupled between the primary side and the secondary side, a pwm controller 40, a delay trigger line 50, a shutdown delay line 60, a shutdown line 70, and an on/OFF control 80. The primary power line of the switching power supply may be a half-bridge, a full-bridge or any other primary power structure, and the secondary rectifying line may be a full-bridge, push-pull or any other switching power rectifying line, as shown in fig. 2 below, which is a specific example of a power stage of the switching power supply, and the primary power line and the secondary power line are all full-bridge lines. The PWM controller outputs PWM driving signals to be directly or indirectly supplied to the grid electrode of the primary line switching tube of the switching power supply to control the on and off of the switching tube.
The delay trigger circuit 50 comprises a first resistor R1, a first capacitor C1, a first triode Q1, a second triode Q2, and an integrated diode CR1, wherein one end of R1 is connected with a first port VREF of the PWM controller, the other end is connected with a collector of Q1, an emitter of Q1 is connected with one end of C1 and an emitter of Q2, a base of Q1 and a base of Q2 are connected with a second port ENA of the PWM controller together, the other end of C1 is grounded, a collector of Q2 is connected with an anode of CR2, the inside of CR2 is formed by connecting two diodes in the same direction in series, a middle node protection is connected with a shutdown delay circuit, and a cathode is connected with a shutdown circuit.
The shutdown delay line 60 comprises a first MOS transistor Q3, a second MOS transistor Q4, a second capacitor C2, a second resistor R2, a third resistor R3, and a second diode CR2, where the source of Q3 is connected to the first port VREF of the PWM controller, the gate is connected to the drain of Q4, the drain of Q4 is connected to the delay trigger line together with the one end protection of R3 and C2, the gate of Q4 is connected to the other end of C2, the cathode of CR2 and one end of R2, and the source of Q4 is grounded together with the anode of CR2, the other end of R2, and the other end of R3.
The shutdown circuit comprises a third diode CR3 and a third triode Q5, wherein the anode of the CR3 is connected with a third port UVLO of the PWM controller, the cathode is connected with the collector of the Q5, the emitter of the Q5 is grounded, and the base is connected with a shutdown delay trigger circuit and an ON/OFF control circuit.
The ON/OFF control circuit can control the ON and OFF of the module under the condition that the input end of the switch power supply is electrified, the working principle is that when the ON/OFF control circuit provides a high level for Q5, the Q5 is an NPN tube, the Q5 is ON, the UVLO of the PWM controller is pulled down, the UVLO determines the starting and shutting points of the power supply module, the voltage of the UVLO is lower than 0.4V, the PWM controller does not work, between 0.4V and 1.25V, the PWM controller is in a standby mode, the voltage of 5V is arranged ON a VREF port, the UVLO reaches more than 1.25, the PWM controller outputs PWM driving signals, and the power supply module is started.
The ENA is internally connected with two current sources in the PWM controller, and pulls up and pulls down current when the switching power supply is started and shut down respectively, and under the stable working state of the module, the voltage of an ENA port is 5V, Q1 is conducted, VREF charges a capacitor C1, and the voltage of C1 is 5V. When the module is turned ON/OFF or when the module works abnormally, a PWM driving signal is not output by the PWM controller, ENA starts to be powered down, when the ENA voltage is lower than the emitter voltage of Q2, Q2 is conducted, CR1 is conducted, the voltage of 5V is applied to the base electrode of Q5, Q5 is conducted, UVLO is pulled down, due to the existence of a diode CR3, the voltage of UVLO is larger than 0.4V, the PWM controller is in a standby mode, VREF cannot be powered down, when CR1 is conducted, protection becomes high level 5V, a delay line is triggered, protection charges C2 through R2, the grid voltage of Q4 is reduced from 5V downwards, Q4 is conducted, the grid of Q3 is pulled down, a P MOS tube Q3 is turned ON, protection is powered by VREF, after the grid voltage of Q4 is reduced to be lower than a threshold value, Q3 is turned OFF, long delay time is ended, the charge time constant of R2 is determined by the charge time constant of R2, the current of R2 can be regulated according to the actual requirement, the C2 is not powered down, the current of the module is turned ON, the voltage of Q2 is turned OFF, the current is rapidly controlled to be turned OFF after the C2 is turned OFF, and the current is turned ON by the module is not turned ON, the current is turned OFF, and the current of the module is rapidly is turned OFF, and the current is turned OFF is not turned OFF, and the current is controlled.
The long-delay line avoids frequent switching on and off of the module when the output voltage does not fall to 0V after the module is shut down, and damages a switching tube in the power line.
While particular implementations of the present invention have been described above, it will be appreciated by those skilled in the art that these are merely illustrative, and that many changes and modifications may be made to these implementations without departing from the principles and spirit of the invention. Accordingly, the scope of the invention is defined by the appended claims.
Claims (4)
1. A switching power supply shutdown delay line, the line comprises a switching power supply primary side power line, a secondary side rectifying line, an isolation transformer coupling the primary side line and the secondary side line, a delay triggering line, a shutdown delay line and a shutdown line, wherein the delay triggering line is connected with a first port VREF and a second port ENA of a PWM controller, the shutdown delay line is connected with VREF, the shutdown line is connected with a third port UVLO of the PWM controller, the circuit is characterized in that the delay line is established by utilizing the charging time constant of a resistor capacitor, the delay triggering line is established by utilizing the port of the PWM controller, so that the switching power supply can trigger the delay line when being shut down,
the delay trigger circuit comprises a first resistor, a first capacitor, a first triode, a second triode and an integrated diode, wherein one end of the first resistor is connected with a first port VREF of the PWM controller, the other end of the first resistor is connected with a collector of the first triode, an emitter of the first triode is connected with one end of the first capacitor and an emitter of the second triode, a base of the first triode and a base of the second triode are connected with a second port ENA of the PWM controller together, the other end of the first capacitor is grounded, the collector of the second triode is connected with an anode of the integrated diode, the inside of the integrated diode is formed by connecting two diodes in a same direction in series, a middle node is connected with a shutdown delay circuit, and a cathode is connected with the shutdown circuit;
the shutdown delay line comprises a first MOS tube, a second capacitor, a second resistor, a third resistor and a second diode, wherein a source electrode of the first MOS tube is connected with a first port VREF of the PWM controller, a grid electrode of the first MOS tube is connected with a drain electrode of the second MOS tube, the drain electrode is connected with one end of the third resistor and one end of the second capacitor together with a delay trigger line, a grid electrode of the second MOS tube is connected with the other end of the second capacitor, a cathode of the second diode and one end of the second capacitor, and the source electrode of the second MOS tube is grounded together with an anode of the second diode, the other end of the second resistor and the other end of the third resistor;
the shutdown circuit comprises a third diode and a third triode, wherein the anode of the third diode is connected with a third port UVLO of the PWM controller, the cathode of the third diode is connected with the collector of the third triode, the emitter of the third triode is grounded, and the base of the third triode is connected with a shutdown delay trigger circuit and an ON/OFF control circuit.
2. A switching power supply shutdown delay line as defined in claim 1 wherein said ON/OFF control line is capable of controlling the ON and OFF of the module in the event of power at the input of the switching power supply.
3. A switching power supply shutdown delay line as claimed in claim 1 wherein the switching power supply primary side power line may be a half bridge, full bridge or any other primary side power structure and the secondary side rectifying line may be a full bridge, push-pull or any other switching power supply rectifying line.
4. The switching power supply shutdown delay line of claim 1, wherein the PWM controller first port VREF is a stable 5V voltage source generated by the PWM controller itself, the third port UVLO determines the power-on and power-off voltages of the power module, and the second port ENA connects two current sources inside the PWM controller to pull up and pull down the current when the switching power supply is turned on and off, respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810670791.7A CN108696113B (en) | 2018-06-26 | 2018-06-26 | Switching power supply shutdown delay line |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810670791.7A CN108696113B (en) | 2018-06-26 | 2018-06-26 | Switching power supply shutdown delay line |
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| Publication Number | Publication Date |
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| CN108696113A CN108696113A (en) | 2018-10-23 |
| CN108696113B true CN108696113B (en) | 2023-07-25 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201810670791.7A Active CN108696113B (en) | 2018-06-26 | 2018-06-26 | Switching power supply shutdown delay line |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113067470B (en) * | 2021-06-02 | 2021-08-17 | 上海芯龙半导体技术股份有限公司 | Enabling circuit for switching power supply chip, switching power supply chip and control method |
| CN117134292B (en) * | 2023-10-26 | 2024-01-23 | 深圳清大电子科技有限公司 | Safety protection circuit of display screen |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201754562U (en) * | 2010-06-18 | 2011-03-02 | 瑞谷科技(深圳)有限公司 | Active clamp delay shutdown circuit |
| CN105186850A (en) * | 2015-09-15 | 2015-12-23 | 深圳三星通信技术研究有限公司 | Circuit for preventing restarting of converter after shutdown and corresponding converter |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110127978A1 (en) * | 2009-12-02 | 2011-06-02 | Wei-Ching Lee | Pwm controller with low uvlo voltage |
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2018
- 2018-06-26 CN CN201810670791.7A patent/CN108696113B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201754562U (en) * | 2010-06-18 | 2011-03-02 | 瑞谷科技(深圳)有限公司 | Active clamp delay shutdown circuit |
| CN105186850A (en) * | 2015-09-15 | 2015-12-23 | 深圳三星通信技术研究有限公司 | Circuit for preventing restarting of converter after shutdown and corresponding converter |
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| CN108696113A (en) | 2018-10-23 |
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