CN219477595U - Dynamic voltage spike absorbing circuit and switching power supply circuit with same - Google Patents

Dynamic voltage spike absorbing circuit and switching power supply circuit with same Download PDF

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Publication number
CN219477595U
CN219477595U CN202320175325.8U CN202320175325U CN219477595U CN 219477595 U CN219477595 U CN 219477595U CN 202320175325 U CN202320175325 U CN 202320175325U CN 219477595 U CN219477595 U CN 219477595U
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resistor
electrically coupled
circuit
switch
voltage
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CN202320175325.8U
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王彦
许道飞
祁健
吴韬
章进法
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Delta Electronics Shanghai Co Ltd
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Delta Electronics Shanghai Co Ltd
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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Abstract

The utility model discloses a dynamic voltage spike absorbing circuit and a switching power supply circuit with the same. The dynamic voltage spike absorbing circuit includes: the voltage spike absorbing module is electrically coupled to a first end and a second end of the first switch in the first circuit; the dynamic adjustment module comprises a switch unit and an output detection control unit; the first resistor is connected in series with the switch unit, and the whole resistor is electrically connected with the voltage peak absorbing module to the first parallel node and the second parallel node; the output detection control unit is connected with the switch unit and is electrically coupled to the output end of the first circuit, and the dynamic adjustment module controls the electrical connection or the electrical disconnection between the first resistor and the voltage peak absorption module according to the output voltage of the first circuit. The utility model can dynamically control the electrical connection or the electrical disconnection between the first resistor and the voltage spike absorbing module according to the output voltage, thereby reducing the loss of part of circuits of the voltage spike absorbing module.

Description

Dynamic voltage spike absorbing circuit and switching power supply circuit with same
Technical Field
The utility model relates to the technical field of switching power supplies, in particular to a dynamic voltage spike absorbing circuit and a switching power supply circuit with the same.
Background
The USB PD (Power driver) protocol is one of the current mainstream fast charging protocols, which is a USB charging standard and technology established by the USB IF association, and is widely used in Power supplies of various devices.
In the design of USB PD 3.1, because of the zero voltage switching (ZVS, zero Voltage Switch) circuit, the switching voltage stress of the secondary synchronous rectification circuit (SR, synchronous Rectifier) is low during normal operation, but a short, high voltage spike occurs in the secondary SR during start-up because of the unstable ZVS state. The prior art generally adds a voltage spike absorbing circuit to absorb the voltage spike to protect the corresponding switching element.
As shown in fig. 1, which schematically illustrates a prior art voltage spike absorbing circuit (VSSC, voltage Spike Suppression Circuit) which may be constituted, for example, by an absorbing resistor R S The snubber capacitor C2 and the snubber diode D1 are electrically coupled to two ends of the first switch Q1 of the secondary side SR of a switching power supply circuit, where the secondary side SR may further include a secondary side winding Ns of the converter and a rectifying capacitor C1. In fig. 1, the primary side circuit of the switching power supply circuit is omitted for the sake of drawing cleanliness. By absorption of resistance R S The snubber capacitor C2 and the snubber diode D may absorb voltage spikes of the first switch Q1, e.g., increase the snubber capacitor C2 or decrease the snubber resistor R S Can play a better role in absorption. However, this partial voltageThe spike absorbing circuit VSSC is constantly operating, so there is always a loss.
Disclosure of Invention
The utility model aims to provide a dynamic voltage spike absorbing circuit and a switching power supply circuit with the same, which can effectively solve at least one defect in the prior art.
In order to achieve the above object, the present utility model provides a dynamic voltage spike absorbing circuit, comprising: the voltage spike absorbing module is electrically coupled to a first end and a second end of the first switch in the first circuit; the dynamic adjustment module comprises a switch unit and an output detection control unit; the first resistor is connected in series with the switch unit, and the whole resistor is electrically connected with the voltage peak absorbing module to a first parallel node and a second parallel node; the output detection control unit is connected with the switch unit and electrically coupled to the output end of the first circuit, and the dynamic adjustment module controls the electrical connection or the electrical disconnection between the first resistor and the voltage spike absorbing module according to the output voltage of the first circuit.
In some embodiments of the present utility model, when the first circuit is in the start-up mode, the switch unit is turned on, and the first resistor is electrically connected to the voltage spike absorbing module; when the first circuit is in a steady-state working mode, the switch unit is turned off, and the first resistor is electrically disconnected from the voltage spike absorbing module.
In some embodiments of the present utility model, the switch unit includes a second switch, a first end of the second switch is electrically coupled to a first end of the first resistor, a second end of the first resistor is electrically coupled to the first parallel node, a second end of the second switch is electrically coupled to the second parallel node, and a control end of the second switch is electrically coupled to the output detection control unit.
In some embodiments of the utility model, the second switch is an N-type MOSFET or an NPN transistor.
In some embodiments of the present utility model, the output detection control unit includes a first voltage regulator, a second resistor, a third resistor, and a third switch, where a cathode of the first voltage regulator is electrically coupled to the output terminal of the first circuit, an anode of the first voltage regulator is connected in series with the second resistor and the third resistor to a first terminal of the third switch, a second terminal of the third switch is electrically coupled to the control terminal of the second switch of the switch unit, and a control terminal of the third switch is electrically coupled to a common node of the second resistor and the third resistor.
In some embodiments of the present utility model, the output detection control unit includes a comparator, a fourth resistor, a fifth resistor and a sixth resistor, wherein a first end of the fourth resistor and a first end of the fifth resistor are connected in series, a common node of the series connection is electrically coupled to an inverting input end of the comparator, a non-inverting input end of the comparator is electrically coupled to a reference voltage, a second end of the fourth resistor is electrically coupled to the output end of the first circuit, a second end of the fifth resistor is electrically coupled to a negative power supply end of the comparator, a positive power supply end of the comparator is electrically coupled to a power supply voltage, and a sixth resistor is electrically coupled between the positive power supply end of the comparator and the output end of the comparator, and an output end of the comparator is electrically coupled to the control end of the second switch of the switch unit.
In some embodiments of the present utility model, the output detection control unit includes an operational amplifier, a fourth resistor, and a fifth resistor, wherein a first end of the fourth resistor and a first end of the fifth resistor are connected in series, a common node of the series connection is electrically coupled to an inverting input end of the operational amplifier, a non-inverting input end of the operational amplifier is electrically coupled to a reference voltage, a second end of the fourth resistor is electrically coupled to the output end of the first circuit, a second end of the fifth resistor is electrically coupled to a negative power supply end of the operational amplifier, a positive power supply end of the operational amplifier is electrically coupled to a power supply voltage, and an output end of the operational amplifier is electrically coupled to the control end of the second switch of the switch unit.
In some embodiments of the utility model, the dynamic voltage spike absorbing circuit further comprises: the protection module comprises a seventh resistor and a second voltage stabilizing tube, wherein a first end of the seventh resistor is electrically coupled to the first parallel node, a second end of the seventh resistor is electrically coupled to the control end of the second switch, a cathode of the second voltage stabilizing tube is electrically coupled to a common node connected with the seventh resistor and the control end of the second switch, and an anode of the second voltage stabilizing tube is electrically coupled to the second parallel node.
In some embodiments of the present utility model, the voltage spike absorbing module includes an absorbing diode, an absorbing capacitor and an absorbing resistor, wherein an anode of the absorbing diode is electrically coupled to the first end of the first switch, the absorbing capacitor and the absorbing resistor are connected in parallel to the first parallel node and the second parallel node, the first parallel node is electrically coupled to a cathode of the absorbing diode, and the second parallel node is electrically coupled to the second end of the first switch; the first resistor is connected with the switch unit in series, and the whole of the first resistor is connected with the absorption resistor in parallel.
In some embodiments of the present utility model, the first circuit is a secondary synchronous rectification circuit of a switching power supply circuit, the secondary synchronous rectification circuit includes a secondary winding of a converter, a rectification capacitor, and the first switch, wherein a common node of the rectification capacitor and the first switch is grounded, and a common node of the rectification capacitor and the secondary winding of the converter is electrically coupled to the output terminal of the first circuit.
In order to achieve the above object, the present utility model further provides a switching power supply circuit, wherein the switching power supply circuit includes a converter, a primary side circuit located on a primary side of the converter, and a secondary side synchronous rectification circuit located on a secondary side of the converter, the secondary side further having the dynamic voltage spike absorbing circuit as described above.
According to the utility model, through the dynamic adjustment module, the electrical connection or the electrical disconnection between the first resistor and the voltage spike absorbing module can be dynamically controlled according to the output voltage, for example, the voltage stress on the secondary side SR can be controlled by controlling the electrical connection between the first resistor and the voltage spike absorbing module in the starting process (namely in a starting mode); and in steady-state operation (namely in a steady-state operation mode), the effect of the voltage spike absorbing circuit can be weakened by controlling the first resistor to be electrically disconnected from the voltage spike absorbing module, so that the loss of part of the circuit of the voltage spike absorbing module is reduced.
Additional aspects and advantages of the utility model will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the utility model.
Drawings
The above and other features and advantages of the present utility model will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings.
FIG. 1 is a schematic diagram of a prior art voltage spike absorbing circuit;
FIG. 2 is a schematic diagram of a switching power supply circuit with a dynamic voltage spike absorbing circuit according to a preferred embodiment of the present utility model;
FIG. 3A is a schematic diagram of a first embodiment of a switching unit of the dynamic adjustment module in the dynamic voltage spike absorbing circuit shown in FIG. 2;
FIG. 3B is a schematic diagram of a second embodiment of a switching unit of the dynamic adjustment module in the dynamic voltage spike absorbing circuit shown in FIG. 2;
FIG. 4A is a schematic diagram of a first embodiment of an output detection control unit of the dynamic voltage spike absorbing circuit of FIG. 2;
FIG. 4B is a schematic diagram of a second embodiment of the output detection control unit of the dynamic voltage spike absorbing circuit of FIG. 2;
FIG. 4C is a schematic diagram of a third embodiment of an output detection control unit of the dynamic voltage spike absorbing circuit of FIG. 2;
fig. 5 is a schematic diagram of a switching power supply circuit according to an embodiment of the utility model.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments can be embodied in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and thus detailed descriptions thereof will be omitted.
When introducing elements/components/etc. that are described and/or illustrated herein, the terms "a," "an," "the," and "at least one" are intended to mean that there are one or more of the elements/components/etc. The terms "comprising," "including," and "having" are intended to be inclusive and mean that there may be additional elements/components/etc., in addition to the listed elements/components/etc. The terms "connected," "spliced," and "butted" are used to denote a direct connection between two elements/components, or an indirect connection (i.e., there are other elements/components between two elements/components, including, but not limited to, air, etc.). Furthermore, the terms "first," "second," and the like in the claims are used merely as labels, and are not intended to limit the numerals of their objects.
As shown in fig. 2, the present utility model provides a switching power supply circuit 1000, which may include a converter (not shown), a primary side circuit (not shown) including a primary side winding of the converter on a primary side of the converter, and a secondary side synchronous rectification circuit 100 including a secondary side winding Ns of the converter on a secondary side of the converter. In particular, the utility model has a dynamic voltage spike absorbing circuit 200 on the secondary side, and can dynamically absorb (or inhibit) voltage spikes.
In some embodiments of the present utility model, the secondary synchronous rectification circuit 100 may include, for example, a transformer secondary winding Ns, a rectification capacitor C1, and a first switch Q1 connected in sequence. The common node of the rectifying capacitor C1 and the first switch Q1 may be grounded, for example, electrically coupled to the ground GND, and the common node of the rectifying capacitor C1 and the secondary winding Ns of the converter may be electrically coupled to the output VOUT of the secondary synchronous rectifying circuit 100.
In some embodiments of the present utility model, the dynamic voltage spike absorbing circuit 200 may include, for example, a voltage spike absorbing module 201, a first resistor R1, and a dynamic adjustment module 202. The dynamic adjustment module 202 may include a switch unit 2021 and an output detection control unit 2022, for example. The voltage spike absorbing module 201 may be electrically coupled to a first end and a second end of the first switch Q1 in the secondary synchronous rectification circuit 100 (i.e. the first circuit). After the first resistor R1 and the switch unit 2021 are connected in series, the whole of the first resistor R1 and the switch unit 2021 can be electrically connected to the first parallel node N1 and the second parallel node N2 together with the voltage spike absorbing module 201. The output detection control unit 2022 may be connected to the switch unit 2021 and electrically coupled to the output terminal VOUT of the secondary synchronous rectification circuit 100, wherein the dynamic adjustment module 202 can control the electrical connection or the electrical disconnection between the first resistor R1 and the voltage spike absorbing module 100 according to the output voltage (i.e. the voltage of the output terminal VOUT) of the secondary synchronous rectification circuit 100.
More specifically, the switch unit 2021 may be turned on when the secondary synchronous rectification circuit 100 is in a start-up mode (i.e. a start-up process of the switching power supply circuit 1000), so as to electrically connect the first resistor R1 and the voltage spike absorbing module 201; in addition, the switch unit 2021 may be turned off, for example, when the secondary synchronous rectification circuit 100 is in a steady-state operation mode (i.e. the secondary circuit of the switching power supply circuit 1000 enters a steady-state operation state), so as to disconnect the first resistor R1 from the voltage spike absorbing module 201.
As shown in fig. 2, the voltage spike absorbing module 201 may include, for example, an absorbing diode D1, an absorbing capacitor C2 and an absorbing resistor R S . Wherein the anode of the absorption diode D1 is electrically coupled to the first end of the first switch Q1, and the absorption capacitor C2 and the absorption resistor R S Connected in parallel to the first and second parallel nodes N1 and N2, and absorbing capacitanceC2 and absorption resistance R S The first parallel node N1 connected in parallel can be electrically coupled to the cathode of the absorption diode D1, the absorption capacitor C2 and the absorption resistor R S The second parallel node N2 connected in parallel may be electrically coupled to the second terminal of the first switch Q1. The first resistor R1 is preferably connected in series with the switching unit 2021, and then integrally connected with the absorption resistor R S Connected in parallel. However, it should be understood that one circuit configuration of the voltage spike absorbing module 201 is shown in fig. 2 only schematically, and in other embodiments, the voltage spike absorbing module 201 may also employ other circuit configurations, which are not limiting to the present utility model.
As shown in fig. 2, in some embodiments of the present utility model, the switching unit 2021 may include a second switch having a first terminal P1, a second terminal P2, and a control terminal P3. The first end P1 may be electrically coupled to the first end of the first resistor R1, and the second end of the first resistor R1 may be electrically coupled to the first parallel node N1; the second end P2 may be electrically coupled to the second parallel node N2; the control terminal P3 may be electrically coupled to the output detection control unit 2022, for example, electrically coupled to the first terminal P4 of the output detection control unit 2022, and the second terminal P5 of the output detection control unit 2022 is electrically coupled to the output terminal VOUT of the secondary synchronous rectification circuit 100. Preferably, the switch unit 2021 may be composed of a second switch Q2, as shown in fig. 3A, wherein the second switch Q2 may be, for example, an N-type MOSFET, and the drain D, the source S, and the gate G thereof respectively form a first terminal P1, a second terminal P2, and a control terminal P3. Alternatively, the switch unit 2021 may be composed of NPN transistors, as shown in fig. 3B, whose collector c, emitter e, and base B respectively form the first terminal P1, the second terminal P2, and the control terminal P3. However, it is to be understood that the switching unit 2021 in the present utility model is not limited to the above-described switch, and these are not limiting to the present utility model.
As shown in fig. 4A, a preferred configuration of the output detection control unit 2022-1 in the present utility model is shown. The output detection control unit 2022-1 may include, for example, a first voltage regulator ZD1, a second resistor R2, a third resistor R3, and a third switch Q3. The cathode of the first voltage regulator ZD1 may be electrically coupled to the output terminal VOUT (refer to fig. 2) of the secondary synchronous rectification circuit 100 through the second terminal P5 of the output detection control unit 2022-1 (combined with fig. 2), and the anode of the first voltage regulator ZD1 may be connected to the first terminal of the third switch Q3 in series with the second resistor R2 and the third resistor R3. The second terminal of the third switch Q3 may be electrically coupled to the control terminal P3 (refer to fig. 2) of the second switch of the switch unit 2021, and the control terminal of the third switch Q3 may be electrically coupled to a common node of the second resistor R2 and the third resistor R3. When the output voltage reaches the first voltage, the first voltage regulator ZD1 is broken down and turned on, and the third switch Q3 provides a turn-on signal (for example, a high level signal, but the utility model is not limited thereto) for the control terminal of the third switch Q3 through the voltage division between the second resistor R2 and the third resistor R3 to control the turn-on of the third switch Q3, so that the switch unit 2021 (for example, the second switch Q2 shown in fig. 3A or the NPN triode shown in fig. 3B) can be controlled by the third switch Q3 to turn off.
As shown in fig. 4B, another preferred structure of the output detection control unit 2022-2 in the present utility model is shown. The output detection control unit 2022-2 may include, for example, a comparator U1, a fourth resistor R4, a fifth resistor R5, and a sixth resistor R6. Wherein the first end of the fourth resistor R4 and the first end of the fifth resistor R5 are connected in series, and a common node of the series connection is electrically coupled to the inverting input end (i.e., "-end") of the comparator U1, and the non-inverting input end (i.e., "+" -end) of the comparator U1 is electrically coupled to a reference voltage V REF The second end of the fourth resistor R4 is electrically coupled to the output end VOUT of the secondary synchronous rectification circuit 100 (see FIG. 2) through the second end P5 of the output detection control unit 2022-2, the second end of the fifth resistor R5 is electrically coupled to the negative power supply end (which may have a voltage V), for example) of the comparator U1, and the positive power supply end of the comparator U1 is electrically coupled to a power supply voltage V S The sixth resistor R6 can be used as a pull-up resistor R PULL-UP The output terminal of the comparator U1 is electrically coupled to the control terminal P3 of the second switch of the switch unit 2021 via the first terminal P4 of the output detection control unit 2022-2 (refer to fig. 2). Wherein, when outputtingThe voltage reaches the first voltage and the fourth resistor R4 and the fifth resistor R5 are connected in series to the input voltage V of the common node IN Greater than reference voltage V REF In this case, the output terminal of the comparator U1 is turned from the output high level to the low level, so as to control the switch unit 2021 (e.g. the second switch Q2 shown in fig. 3A or the NPN transistor shown in fig. 3B, but the utility model is not limited thereto).
As shown in fig. 4C, a structure of a further preferred output detection control unit 2022-3 in the present utility model is shown. The output detection control unit 2022-3 may include, for example, an operational amplifier U2, a fourth resistor R4 and a fifth resistor R5, wherein a first end of the fourth resistor R4 and a first end of the fifth resistor R5 are connected in series and a common node of the series connection is electrically coupled to an inverting input end (i.e., "-end) of the operational amplifier U2, and a non-inverting input end (i.e.," + "-end) of the operational amplifier U2 may be electrically coupled to a reference voltage V REF The second end of the fourth resistor R4 is electrically coupled to the output end VOUT of the secondary synchronous rectification circuit 100 (see FIG. 2) through the second end P5 of the output detection control unit 2022-3, the second end of the fifth resistor R5 is electrically coupled to the negative power supply end (which may have a voltage V-), for example, of the operational amplifier U2, and the positive power supply end of the operational amplifier U2 is electrically coupled to a power supply voltage V S The output terminal of the operational amplifier U2 may be electrically coupled to the control terminal P3 of the second switch of the switch unit 2021 through the first terminal P4 of the output detection control unit 2022-3 (refer to fig. 2 in combination). Wherein when the output voltage reaches the first voltage, the fourth resistor R4 and the fifth resistor R5 are connected in series to input voltage V of the common node IN Greater than reference voltage V REF In this case, the output terminal of the operational amplifier U2 is turned from the output high level to the low level, so as to control the switch unit 2021 (e.g. the second switch Q2 shown in fig. 3A or the NPN transistor shown in fig. 3B, but the utility model is not limited thereto).
As shown in fig. 5, the switching power supply circuit 1000-1 according to an embodiment of the present utility model is shown, in this embodiment, the switching unit 2021 in the dynamic adjustment module 202 is, for example, a second switch Q2 (i.e., an N-type MOSFET) shown in fig. 3A, and the output detection control unit 2022 is, for example, an output detection control unit 2022-1 shown in fig. 4A. Unlike the embodiment shown in fig. 2, in this embodiment, the dynamic voltage spike absorbing circuit 200 further includes a protection module 203, which may include, for example, a seventh resistor R7 and a second regulator ZD2. The first end of the seventh resistor R7 may be electrically coupled to the first parallel node N1, the second end of the seventh resistor R7 may be electrically coupled to the control end of the second switch Q2, the cathode of the second voltage regulator ZD2 may be electrically coupled to a common node connected between the seventh resistor R7 and the control end of the second switch Q2, and the anode of the second voltage regulator ZD2 may be electrically coupled to the second parallel node N2.
When the power-on is started, the second switch Q2 is turned on through the seventh resistor R7 to enable the first resistor R1 and the absorption resistor R S A parallel connection is formed between the second voltage regulator ZD2 may be used to protect the gate voltage of the second switch Q2 (i.e., the voltage corresponding to the gate of the N-type MOSFET) from being too high.
When the output voltage reaches the first voltage, after the first voltage stabilizing tube ZD1 breaks down, a high-level signal is provided to the control end of the third switch Q3 through the voltage division of the second resistor R2 and the third resistor R3 to turn on the third switch Q3, so that the voltage of the control end of the second switch Q2 can be pulled down to turn off the second switch Q2, and the first resistor R1 and the absorption resistor R can be further turned on S The parallel connection therebetween is broken.
Thus, the first resistor R1 and the absorption resistor R can be realized in the starting process S Is connected in parallel with the first resistor R1 and the absorption resistor R in steady state operation S The open design between the two can dynamically realize the absorption of voltage spike. In other words, the present utility model can dynamically enable the first resistor R1 and the absorption resistor R only during the starting process S The parallel connection can control the voltage stress on the secondary side SR, and avoid the reduction of efficiency caused by the steady-state loss of the absorption circuit part due to the voltage peak generated during the steady-state operation of the circuit.
In summary, the present utility model can dynamically control the electrical connection or the electrical disconnection between the first resistor and the voltage spike absorbing module according to the output voltage by the dynamic adjustment module, for example, by controlling the electrical connection between the first resistor and the voltage spike absorbing module in the starting process (i.e. in the starting mode), the voltage stress on the secondary side SR can be controlled; and in steady-state operation (namely in a steady-state operation mode), the effect of the voltage spike absorbing circuit can be weakened by controlling the electric disconnection between the first resistor and the voltage spike absorbing module, so that the loss of the voltage spike absorbing circuit is reduced.
The exemplary embodiments of the present utility model have been particularly shown and described above. It is to be understood that the utility model is not to be limited to the disclosed embodiments, but on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims (11)

1. A dynamic voltage spike absorbing circuit comprising:
the voltage spike absorbing module is electrically coupled to a first end and a second end of the first switch in the first circuit;
the dynamic adjustment module comprises a switch unit and an output detection control unit;
the first resistor is connected in series with the switch unit, and the whole resistor is electrically connected with the voltage peak absorbing module to a first parallel node and a second parallel node;
the output detection control unit is connected with the switch unit and electrically coupled to the output end of the first circuit, and the dynamic adjustment module controls the electrical connection or the electrical disconnection between the first resistor and the voltage spike absorbing module according to the output voltage of the first circuit.
2. The dynamic voltage spike absorbing circuit of claim 1 wherein,
when the first circuit is in a starting mode, the switch unit is conducted, and the first resistor is electrically connected to the voltage spike absorbing module;
when the first circuit is in a steady-state working mode, the switch unit is turned off, and the first resistor is electrically disconnected from the voltage spike absorbing module.
3. The dynamic voltage spike absorbing circuit of claim 2 wherein,
the switch unit comprises a second switch, a first end of the second switch is electrically coupled to a first end of the first resistor, a second end of the first resistor is electrically coupled to the first parallel node, a second end of the second switch is electrically coupled to the second parallel node, and a control end of the second switch is electrically coupled to the output detection control unit.
4. The dynamic voltage spike absorbing circuit of claim 3 wherein the second switch is an N-type MOSFET or an NPN-type transistor.
5. The dynamic voltage spike absorbing circuit of claim 3 wherein,
the output detection control unit comprises a first voltage stabilizing tube, a second resistor, a third resistor and a third switch, wherein the cathode of the first voltage stabilizing tube is electrically coupled to the output end of the first circuit, the anode of the first voltage stabilizing tube, the second resistor and the third resistor are connected in series to the first end of the third switch, the second end of the third switch is electrically coupled to the control end of the second switch, and the control end of the third switch is electrically coupled to a common node of the second resistor and the third resistor.
6. The dynamic voltage spike absorbing circuit of claim 3 wherein,
the output detection control unit comprises a comparator, a fourth resistor, a fifth resistor and a sixth resistor, wherein a first end of the fourth resistor and a first end of the fifth resistor are connected in series, a common node of the series connection of the first end of the fourth resistor and the first end of the fifth resistor is electrically coupled to an inverting input end of the comparator, a non-inverting input end of the comparator is electrically coupled to a reference voltage, a second end of the fourth resistor is electrically coupled to the output end of the first circuit, a second end of the fifth resistor is electrically coupled to a negative power supply end of the comparator, a positive power supply end of the comparator is electrically coupled to a power supply voltage, and a sixth resistor is electrically coupled between a positive power supply end of the comparator and an output end of the comparator, and an output end of the comparator is electrically coupled to the control end of the second switch.
7. The dynamic voltage spike absorbing circuit of claim 3 wherein,
the output detection control unit comprises an operational amplifier, a fourth resistor and a fifth resistor, wherein a first end of the fourth resistor and a first end of the fifth resistor are connected in series, a common node of the series connection of the first end of the fourth resistor and the first end of the fifth resistor is electrically coupled to an inverting input end of the operational amplifier, a non-inverting input end of the operational amplifier is electrically coupled to a reference voltage, a second end of the fourth resistor is electrically coupled to the output end of the first circuit, a second end of the fifth resistor is electrically coupled to a negative power supply end of the operational amplifier, a positive power supply end of the operational amplifier is electrically coupled to a power supply voltage, and an output end of the operational amplifier is electrically coupled to the control end of the second switch.
8. The dynamic voltage spike absorbing circuit of claim 3 further comprising:
the protection module comprises a seventh resistor and a second voltage stabilizing tube, wherein a first end of the seventh resistor is electrically coupled to the first parallel node, a second end of the seventh resistor is electrically coupled to the control end of the second switch, a cathode of the second voltage stabilizing tube is electrically coupled to a common node connected with the seventh resistor and the control end of the second switch, and an anode of the second voltage stabilizing tube is electrically coupled to the second parallel node.
9. The dynamic voltage spike absorbing circuit of claim 1 wherein,
the voltage spike absorbing module comprises an absorbing diode, an absorbing capacitor and an absorbing resistor, wherein the anode of the absorbing diode is electrically coupled to the first end of the first switch, the absorbing capacitor and the absorbing resistor are connected in parallel to the first parallel node and the second parallel node, the first parallel node is electrically coupled to the cathode of the absorbing diode, and the second parallel node is electrically coupled to the second end of the first switch;
the first resistor is connected with the switch unit in series, and the whole of the first resistor is connected with the absorption resistor in parallel.
10. The dynamic voltage spike absorbing circuit of any one of claims 1-9 wherein the first circuit is a secondary synchronous rectification circuit of a switching power supply circuit, the secondary synchronous rectification circuit comprising a converter secondary winding, a rectification capacitor and the first switch, wherein a common node of the rectification capacitor and the first switch is grounded, and wherein a common node of the rectification capacitor and the converter secondary winding is electrically coupled to the output of the first circuit.
11. A switching power supply circuit comprising a converter, a primary side circuit on a primary side of the converter, and a secondary side synchronous rectification circuit on a secondary side of the converter, the secondary side further having the dynamic voltage spike absorbing circuit of claim 10.
CN202320175325.8U 2023-02-02 2023-02-02 Dynamic voltage spike absorbing circuit and switching power supply circuit with same Active CN219477595U (en)

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CN202320175325.8U CN219477595U (en) 2023-02-02 2023-02-02 Dynamic voltage spike absorbing circuit and switching power supply circuit with same

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