CN119156895A - 层叠基板 - Google Patents

层叠基板 Download PDF

Info

Publication number
CN119156895A
CN119156895A CN202380038558.6A CN202380038558A CN119156895A CN 119156895 A CN119156895 A CN 119156895A CN 202380038558 A CN202380038558 A CN 202380038558A CN 119156895 A CN119156895 A CN 119156895A
Authority
CN
China
Prior art keywords
electrode
thermoplastic resin
main surface
resin layer
laminated substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202380038558.6A
Other languages
English (en)
Chinese (zh)
Inventor
山元一生
山本智树
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Publication of CN119156895A publication Critical patent/CN119156895A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
CN202380038558.6A 2022-06-01 2023-05-17 层叠基板 Pending CN119156895A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2022089630 2022-06-01
JP2022-089630 2022-06-01
PCT/JP2023/018392 WO2023234023A1 (ja) 2022-06-01 2023-05-17 積層基板

Publications (1)

Publication Number Publication Date
CN119156895A true CN119156895A (zh) 2024-12-17

Family

ID=89026526

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202380038558.6A Pending CN119156895A (zh) 2022-06-01 2023-05-17 层叠基板

Country Status (4)

Country Link
US (1) US20250087568A1 (https=)
JP (1) JPWO2023234023A1 (https=)
CN (1) CN119156895A (https=)
WO (1) WO2023234023A1 (https=)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100096178A1 (en) * 2008-10-17 2010-04-22 Sumsung Electro-Mechanics Co., Ltd. Non-shirinkage ceramic substrate and manufacturing method thereof
JP5593625B2 (ja) * 2009-03-30 2014-09-24 株式会社村田製作所 多層配線基板の製造方法
JP6105316B2 (ja) * 2013-02-19 2017-03-29 京セラ株式会社 電子装置
WO2017150611A1 (ja) * 2016-03-02 2017-09-08 株式会社村田製作所 モジュール部品、モジュール部品の製造方法、及び多層基板
CN211321678U (zh) * 2017-06-26 2020-08-21 株式会社村田制作所 多层布线基板
US12245366B2 (en) * 2019-10-30 2025-03-04 Kyocera Corporation Wiring board

Also Published As

Publication number Publication date
WO2023234023A1 (ja) 2023-12-07
JPWO2023234023A1 (https=) 2023-12-07
US20250087568A1 (en) 2025-03-13

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