CN119013777A - 结合结构 - Google Patents
结合结构 Download PDFInfo
- Publication number
- CN119013777A CN119013777A CN202380031728.8A CN202380031728A CN119013777A CN 119013777 A CN119013777 A CN 119013777A CN 202380031728 A CN202380031728 A CN 202380031728A CN 119013777 A CN119013777 A CN 119013777A
- Authority
- CN
- China
- Prior art keywords
- singulated
- conductive
- contact
- conductive contact
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P54/00—Cutting or separating of wafers, substrates or parts of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W80/00—Direct bonding of chips, wafers or substrates
- H10W80/301—Bonding techniques, e.g. hybrid bonding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W80/00—Direct bonding of chips, wafers or substrates
- H10W80/301—Bonding techniques, e.g. hybrid bonding
- H10W80/312—Bonding techniques, e.g. hybrid bonding characterised by the direct bonding of electrically conductive pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W80/00—Direct bonding of chips, wafers or substrates
- H10W80/301—Bonding techniques, e.g. hybrid bonding
- H10W80/327—Bonding techniques, e.g. hybrid bonding characterised by the direct bonding of insulating parts, e.g. of silicon oxide layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W80/00—Direct bonding of chips, wafers or substrates
- H10W80/701—Direct bonding of chips, wafers or substrates characterised by the pads after the direct bonding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/791—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads
- H10W90/792—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads between multiple chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/791—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads
- H10W90/794—Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Engineering & Computer Science (AREA)
- Wire Bonding (AREA)
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Connections Effected By Soldering, Adhesion, Or Permanent Deformation (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US202263313639P | 2022-02-24 | 2022-02-24 | |
| US63/313,639 | 2022-02-24 | ||
| PCT/US2023/063147 WO2023164564A1 (en) | 2022-02-24 | 2023-02-23 | Bonded structures |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN119013777A true CN119013777A (zh) | 2024-11-22 |
Family
ID=87574555
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202380031728.8A Pending CN119013777A (zh) | 2022-02-24 | 2023-02-23 | 结合结构 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US20230268300A1 (enExample) |
| EP (1) | EP4483406A4 (enExample) |
| JP (1) | JP2025506818A (enExample) |
| KR (1) | KR20240156613A (enExample) |
| CN (1) | CN119013777A (enExample) |
| TW (1) | TW202343714A (enExample) |
| WO (1) | WO2023164564A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20230299123A1 (en) * | 2022-03-18 | 2023-09-21 | Intel Corporation | Inductors for hybrid bonding interconnect architectures |
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| US8735219B2 (en) | 2012-08-30 | 2014-05-27 | Ziptronix, Inc. | Heterogeneous annealing method and device |
| US9953941B2 (en) | 2015-08-25 | 2018-04-24 | Invensas Bonding Technologies, Inc. | Conductive barrier direct hybrid bonding |
| US10204893B2 (en) | 2016-05-19 | 2019-02-12 | Invensas Bonding Technologies, Inc. | Stacked dies and methods for forming bonded structures |
| US10607136B2 (en) | 2017-08-03 | 2020-03-31 | Xcelsis Corporation | Time borrowing between layers of a three dimensional chip stack |
| US10580735B2 (en) | 2016-10-07 | 2020-03-03 | Xcelsis Corporation | Stacked IC structure with system level wiring on multiple sides of the IC die |
| US10672663B2 (en) | 2016-10-07 | 2020-06-02 | Xcelsis Corporation | 3D chip sharing power circuit |
| TWI822659B (zh) | 2016-10-27 | 2023-11-21 | 美商艾德亞半導體科技有限責任公司 | 用於低溫接合的結構和方法 |
| US10002844B1 (en) | 2016-12-21 | 2018-06-19 | Invensas Bonding Technologies, Inc. | Bonded structures |
| US20180182665A1 (en) | 2016-12-28 | 2018-06-28 | Invensas Bonding Technologies, Inc. | Processed Substrate |
| WO2018125673A2 (en) | 2016-12-28 | 2018-07-05 | Invensas Bonding Technologies, Inc | Processing stacked substrates |
| TWI837879B (zh) | 2016-12-29 | 2024-04-01 | 美商艾德亞半導體接合科技有限公司 | 具有整合式被動構件的接合結構 |
| US10629577B2 (en) | 2017-03-16 | 2020-04-21 | Invensas Corporation | Direct-bonded LED arrays and applications |
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| US10508030B2 (en) | 2017-03-21 | 2019-12-17 | Invensas Bonding Technologies, Inc. | Seal for microelectronic assembly |
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| US12341083B2 (en) | 2023-02-08 | 2025-06-24 | Adeia Semiconductor Bonding Technologies Inc. | Electronic device cooling structures bonded to semiconductor elements |
| US12598962B2 (en) | 2023-03-14 | 2026-04-07 | Adeia Semiconductor Bonding Technologies Inc. | System and method for bonding transparent conductor substrates |
| US20250087543A1 (en) * | 2023-09-11 | 2025-03-13 | Taiwan Semiconductor Manufacturing Co., Ltd. Hsinchu | Integrated circuit packages and methods |
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| CN111916354B (zh) * | 2019-05-07 | 2022-08-30 | 欣兴电子股份有限公司 | 线路载板及其制作方法 |
| MY202540A (en) * | 2019-06-11 | 2024-05-06 | Intel Corp | Multi-faceted integrated-circuit dice and packages |
| DE102020114141B4 (de) * | 2019-10-18 | 2024-03-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integriertes schaltungspackage und verfahren |
| US11264362B2 (en) * | 2020-05-28 | 2022-03-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure and method of fabricating the same |
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| US20220189850A1 (en) * | 2020-12-15 | 2022-06-16 | Intel Corporation | Inter-component material in microelectronic assemblies having direct bonding |
| US12261163B2 (en) * | 2021-04-08 | 2025-03-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Molded dies in semiconductor packages and methods of forming same |
-
2023
- 2023-02-23 KR KR1020247031827A patent/KR20240156613A/ko active Pending
- 2023-02-23 CN CN202380031728.8A patent/CN119013777A/zh active Pending
- 2023-02-23 US US18/173,690 patent/US20230268300A1/en active Pending
- 2023-02-23 JP JP2024550200A patent/JP2025506818A/ja active Pending
- 2023-02-23 EP EP23760929.2A patent/EP4483406A4/en active Pending
- 2023-02-23 WO PCT/US2023/063147 patent/WO2023164564A1/en not_active Ceased
- 2023-02-24 TW TW112106994A patent/TW202343714A/zh unknown
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20230299123A1 (en) * | 2022-03-18 | 2023-09-21 | Intel Corporation | Inductors for hybrid bonding interconnect architectures |
Also Published As
| Publication number | Publication date |
|---|---|
| TW202343714A (zh) | 2023-11-01 |
| JP2025506818A (ja) | 2025-03-13 |
| WO2023164564A1 (en) | 2023-08-31 |
| KR20240156613A (ko) | 2024-10-30 |
| US20230268300A1 (en) | 2023-08-24 |
| EP4483406A1 (en) | 2025-01-01 |
| EP4483406A4 (en) | 2026-03-04 |
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