CN118339651A - 半导体装置 - Google Patents

半导体装置 Download PDF

Info

Publication number
CN118339651A
CN118339651A CN202280078821.XA CN202280078821A CN118339651A CN 118339651 A CN118339651 A CN 118339651A CN 202280078821 A CN202280078821 A CN 202280078821A CN 118339651 A CN118339651 A CN 118339651A
Authority
CN
China
Prior art keywords
semiconductor
semiconductor device
die pad
insulating
bonding layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202280078821.XA
Other languages
English (en)
Chinese (zh)
Inventor
大角嘉藏
和田惠治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of CN118339651A publication Critical patent/CN118339651A/zh
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/411Chip-supporting parts, e.g. die pads
    • H10W70/413Insulating or insulated substrates serving as die pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/811Multiple chips on leadframes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/753Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Engineering & Computer Science (AREA)
  • Ceramic Engineering (AREA)
CN202280078821.XA 2021-11-29 2022-11-14 半导体装置 Pending CN118339651A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021192779 2021-11-29
JP2021-192779 2021-11-29
PCT/JP2022/042243 WO2023095659A1 (ja) 2021-11-29 2022-11-14 半導体装置

Publications (1)

Publication Number Publication Date
CN118339651A true CN118339651A (zh) 2024-07-12

Family

ID=86539584

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202280078821.XA Pending CN118339651A (zh) 2021-11-29 2022-11-14 半导体装置

Country Status (5)

Country Link
US (1) US20240312877A1 (https=)
JP (1) JPWO2023095659A1 (https=)
CN (1) CN118339651A (https=)
DE (1) DE112022005155T5 (https=)
WO (1) WO2023095659A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7582156B2 (ja) * 2021-10-27 2024-11-13 三菱電機株式会社 半導体装置及びその製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5303167B2 (ja) * 2008-03-25 2013-10-02 ローム株式会社 スイッチ制御装置及びこれを用いたモータ駆動装置
JP6104512B2 (ja) * 2011-04-01 2017-03-29 ローム株式会社 温度検出装置
JP6591637B2 (ja) * 2013-11-13 2019-10-16 ローム株式会社 半導体装置および半導体モジュール
JP6522402B2 (ja) * 2015-04-16 2019-05-29 ローム株式会社 半導体装置

Also Published As

Publication number Publication date
JPWO2023095659A1 (https=) 2023-06-01
WO2023095659A1 (ja) 2023-06-01
DE112022005155T5 (de) 2024-08-29
US20240312877A1 (en) 2024-09-19

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