CN118330312B - FPGA crystal oscillator frequency measurement method and system - Google Patents

FPGA crystal oscillator frequency measurement method and system Download PDF

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CN118330312B
CN118330312B CN202410755959.XA CN202410755959A CN118330312B CN 118330312 B CN118330312 B CN 118330312B CN 202410755959 A CN202410755959 A CN 202410755959A CN 118330312 B CN118330312 B CN 118330312B
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frequency
crystal oscillator
count value
crystal
clock signal
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CN118330312A (en
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陈锋超
王建伟
杨保林
杨孝文
王毅
高峻雪
邵松杰
郑照阳
安建
刘伟
侯童译
张良
隋炳斐
李佚名
侯荣汗
王禹铭
邢玉威
赵冰
李雪松
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Dongfang Electronics Co Ltd
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Abstract

The invention belongs to the technical field of crystal oscillator frequency measurement, and particularly relates to an FPGA crystal oscillator frequency measurement method and system. The original clock signal generated by the crystal oscillator is multiplied by a frequency multiplier to obtain a clock signal after frequency multiplication; the frequency multiplication factor is M, namely the frequency of the clock signal after frequency multiplication is M times of the frequency of the original crystal oscillator; and counting the second pulses from the time service module by using the clock signal after frequency multiplication, storing the count value into a memory of the FPGA, and calculating the frequency of the crystal oscillator by adopting a weighted average method when the stored count value reaches a preset number N. The frequency of the crystal oscillator is multiplied by M times through a frequency multiplier so as to improve the frequency resolution; and counting the second pulse from the time service module by using the frequency-doubled clock signal, and processing the count data by a weighted average algorithm, thereby realizing high-precision measurement of the crystal oscillator frequency.

Description

FPGA crystal oscillator frequency measurement method and system
Technical Field
The invention belongs to the technical field of crystal oscillator frequency measurement, and particularly relates to an FPGA crystal oscillator frequency measurement method and system.
Background
Currently, there are two methods for measuring crystal oscillator frequency: one is a method of manually measuring the frequency, which usually uses a frequency meter or an oscilloscope or other equipment to manually measure the frequency of the crystal oscillator; while this approach is feasible in some cases, it is not suitable for application scenarios where continuous acquisition of frequency in real time is required. In addition, manual measurements may also be affected by human operational errors, resulting in inaccurate measurement results.
Another is a method for measuring the crystal oscillator frequency in real time by a CPU, and the main problems of the method are delay of the CPU in response to interruption and precision deviation of an RTC (real time clock); the delay of the CPU response to the interrupt may result in failure to accurately measure the crystal frequency in real time, and the accuracy deviation of the RTC may further reduce the accuracy of the measurement result.
Therefore, how to effectively improve the accuracy of the crystal oscillator frequency is a technical problem to be solved currently.
Disclosure of Invention
In order to overcome the problems in the prior art, the invention provides a method and a system for measuring the frequency of an FPGA crystal oscillator.
The technical scheme for solving the technical problems is as follows:
in a first aspect, the invention provides a method for measuring the frequency of an FPGA crystal oscillator, which comprises the following steps:
the original clock signal generated by the crystal oscillator is multiplied by a frequency multiplier to obtain a clock signal after frequency multiplication; the frequency multiplication factor is M, namely the frequency of the clock signal after frequency multiplication is M times of the frequency of the original crystal oscillator;
And counting the second pulses from the time service module by using the clock signal after frequency multiplication, storing the count value into a memory of the FPGA, and calculating the frequency of the crystal oscillator by adopting a weighted average method when the stored count value reaches a preset number N.
Further, the time service module is Beidou.
Further, the method for calculating the frequency of the crystal oscillator by adopting a weighted average method specifically comprises the following steps:
In the above formula, f 1 is the first calculated crystal frequency, f 2 is the second calculated crystal frequency, f 3 is the third calculated crystal frequency, f n is the nth calculated crystal frequency, f n-1 is the n-1 th calculated crystal frequency, and f n-2 is the n-2 nd calculated crystal frequency; c 1 is the first stored count value, C 2 is the second stored count value, C N+1 is the (n+1) th stored count value, C N+2 is the (n+2) th stored count value, C k is the (k) th stored count value, and C N+k-1 is the (n+k-1) th stored count value; a. and b and c are weight coefficients used for adjusting the weight calculated each time.
Further, the relation among a, b and c is: a > b > c,
In a second aspect, the present invention further provides an FPGA crystal oscillator frequency measurement system, including: the system comprises an FPGA module, a time service module and a crystal oscillator;
The crystal oscillator is used for generating an original clock signal;
the time service module is connected with the FPGA module and is used for providing a second pulse reference by the FPGA module;
the FPGA module comprises a frequency multiplier and a frequency measurement module;
The frequency multiplier is connected with the crystal oscillator and is used for multiplying the original clock signal generated by the crystal oscillator through the frequency multiplier to obtain a frequency-multiplied clock signal; the frequency multiplication factor is M, namely the frequency of the clock signal after frequency multiplication is M times of the frequency of the original crystal oscillator;
The frequency measuring module is respectively connected with the frequency multiplier and the time service module and is used for counting the second pulse from the time service module by using the clock signal after frequency multiplication, storing the count value in the memory, and calculating the frequency of the crystal oscillator by adopting a weighted average method when the stored count value reaches a preset number N.
Further, the method for calculating the frequency of the crystal oscillator by adopting a weighted average method specifically comprises the following steps:
In the above formula, f 1 is the first calculated crystal frequency, f 2 is the second calculated crystal frequency, f 3 is the third calculated crystal frequency, f n is the nth calculated crystal frequency, f n-1 is the n-1 th calculated crystal frequency, and f n-2 is the n-2 nd calculated crystal frequency; c 1 is the first stored count value, C 2 is the second stored count value, C N+1 is the (n+1) th stored count value, C N+2 is the (n+2) th stored count value, C k is the (k) th stored count value, and C N+k-1 is the (n+k-1) th stored count value; a. and b and c are weight coefficients used for adjusting the weight calculated each time.
Further, the relation among a, b and c is: a > b > c,
Compared with the prior art, the invention has the following technical effects:
In the invention, the frequency of the crystal oscillator is multiplied by M times through the frequency multiplier integrated in the FPGA so as to improve the frequency resolution; and counting the second pulse from the time service module by using the frequency-doubled clock signal, and processing the count data by a weighted average algorithm, thereby realizing high-precision measurement of the crystal oscillator frequency.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions and advantages of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are only some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic flow chart of the method of the present invention;
fig. 2 is a schematic diagram of the overall structure of the system of the present invention.
Detailed Description
In order to further describe the technical means and effects adopted by the present invention to achieve the preset purpose, the following detailed description is given below of the specific implementation, structure, features and effects of the technical solution according to the present invention with reference to the accompanying drawings and preferred embodiments. The particular features, structures, or characteristics of one or more embodiments may be combined in any suitable manner. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.
In one embodiment of the present invention, referring to fig. 1, there is provided a method for measuring the frequency of an FPGA crystal oscillator, including the steps of:
The crystal oscillator generates an original clock signal;
the original clock signal generated by the crystal oscillator is multiplied by a frequency multiplier to obtain a clock signal after frequency multiplication; the frequency multiplication factor is M, namely the frequency of the clock signal after frequency multiplication is M times of the frequency of the original crystal oscillator;
And counting the second pulses from the time service module by using the clock signal after frequency multiplication, storing the count value into a memory of the FPGA, and calculating the frequency of the crystal oscillator by adopting a weighted average method when the stored count value reaches a preset number N.
The method for calculating the frequency of the crystal oscillator by adopting the weighted average method specifically comprises the following steps:
first calculation:
second calculation:
third calculation:
calculation of the k-th time:
In the above formula, f 1 is the first calculated crystal frequency, f 2 is the second calculated crystal frequency, f 3 is the third calculated crystal frequency, f n is the nth calculated crystal frequency, f n-1 is the n-1 th calculated crystal frequency, and f n-2 is the n-2 nd calculated crystal frequency; c 1 is the first stored count value, C 2 is the second stored count value, C N+1 is the (n+1) th stored count value, C N+2 is the (n+2) th stored count value, C k is the (k) th stored count value, and C N+k-1 is the (n+k-1) th stored count value; a. and b and c are weight coefficients used for adjusting the weight calculated each time.
The purpose of using the weighted average method is that the second pulse of the time service module has jitter, the jitter is about 100ppb (parts per billion ), thus the frequency measurement error is also 100ppb, and the measurement accuracy far better than 100ppb can be obtained by adjusting the number of stored count values and the weight coefficient. The weighted average method is used from the second calculation, the frequency jitter of the calculated result is smaller in the second calculation compared with the first calculation, and by analogy, f n-1 is smaller than f n-2 jitter, the weight coefficient a > b > c can lead to smaller calculated result jitter, and the method is generally used in practical application
For the stored count value, specific: for example, the crystal oscillator frequency is standard 1MHz, the counter is always counted and cannot be cleared every second, and the counting value is recorded every second. If the first second pulse occurs when the count value is 0, the count value C 1 =0, the count value of the second pulse is C 2 =1000001, the more 1 is the more one of the second pulse jitter, the jitter of the crystal oscillator is very little ignored, the count value of the third second pulse is C 3 =2000000, the less 1 is the less one of the second pulse jitter, and the more or less jitter is possible. C 4=2999999,C5=4000000,C6 = 5000001.
For example, m=1, c N=C6 is substituted into the first calculation formula,The accuracy is 5 times higher than C 2 =1000001, and the greater N, the higher the accuracy that is finally calculated. However, the larger N requires longer waiting time, for example, n=60 requires the device to start calculating the frequency value after waiting 60 seconds for power-on.
Second calculation: the frequency value finally calculated depends on the last calculation result and the current result, so that the phenomenon that the current calculation result shakes too much to cause the final result to follow the mutation is avoided. The last calculation result is C A =1000000, the current calculation result is C B =1000001, a= 9,b =1; the result of the calculation is 1000000.1.
Third calculation: the principle of summation of the last time, the last time and the current result multiplied by the proportion is the same as that of the second time, but one more calculation participated in calculation is added, so that the jitter of the calculation result is smaller.
In a specific embodiment, the output high-frequency conversion pulse is used to the high-speed AD converter (high-speed analog-to-digital converter) for controlling the sampling frequency of the high-speed AD converter according to the calculated frequency value.
In one embodiment of the present invention, referring to fig. 2, there is provided an FPGA crystal oscillator frequency measurement system, comprising: the system comprises an FPGA module, a time service module and a crystal oscillator;
the crystal oscillator is used for generating an original clock signal;
The time service module is used for providing a second pulse reference by the FPGA module. The second pulse provided by the Beidou time service module is a highly accurate time reference, keeps synchronous with UTC (coordinated universal time), has extremely small jitter error and does not accumulate with time.
The FPGA module comprises a frequency multiplier and a frequency measurement module;
The frequency multiplier is connected with the crystal oscillator and is used for multiplying the original clock signal generated by the crystal oscillator through the frequency multiplier to obtain a frequency-multiplied clock signal; the frequency multiplication factor is M, namely the frequency of the clock signal after frequency multiplication is M times of the frequency of the original crystal oscillator. The frequency multiplier can increase the frequency of the original crystal oscillator by M times so as to obtain a clock signal with higher frequency, and the clock signal after frequency multiplication has higher resolution, so that more pulses can be counted in the same time, and the measurement precision is improved.
Every time a pulse per second arrives, a counter in the FPGA is increased, and a count value C corresponding to each pulse per second is stored in a RAM of the FPGA. Over time, a series of count values C 1, C2, ..., CN may be accumulated in RAM.
The frequency measurement module is respectively connected with the frequency multiplier and the Beidou time service module, counts the second pulses from the time service module by using the clock signals after frequency multiplication, stores the count values in the memory, and calculates the frequency of the crystal oscillator by adopting a weighted average method when the stored count values reach a preset number N.
Specifically, the frequency measurement module comprises a counter and a RAM. The counter counts the second pulse from the time service module by using the frequency-doubled clock signal; storing the count value C into the RAM of the FPGA; when the stored count values reach N, N count values from C 1 to C N are provided in the RAM, and the crystal oscillator frequency is calculated after each second pulse is started, wherein the calculation method adopts a weighted average method, and the calculation method is as follows:
first calculation:
second calculation:
third calculation:
calculation of the k-th time:
In the above formula, f 1 is the first calculated crystal frequency, f 2 is the second calculated crystal frequency, f 3 is the third calculated crystal frequency, f n is the nth calculated crystal frequency, f n-1 is the n-1 th calculated crystal frequency, and f n-2 is the n-2 nd calculated crystal frequency; c 1 is the first stored count value, C 2 is the second stored count value, C N+1 is the (n+1) th stored count value, C N+2 is the (n+2) th stored count value, C k is the (k) th stored count value, and C N+k-1 is the (n+k-1) th stored count value; a. and b and c are weight coefficients used for adjusting the weight calculated each time.
After the frequency measurement module obtains a high-precision frequency value, the AD conversion signal generation module outputs a high-frequency conversion pulse to the high-speed AD according to the frequency value, so that the AD can be ensured to sample according to the accurate frequency, and the moment of each sampling point can be accurately calculated.
The above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention, and are intended to be included in the scope of the present invention.

Claims (5)

1. The method for measuring the frequency of the FPGA crystal oscillator is characterized by comprising the following steps of:
the original clock signal generated by the crystal oscillator is multiplied by a frequency multiplier to obtain a clock signal after frequency multiplication; the frequency multiplication factor is M, namely the frequency of the clock signal after frequency multiplication is M times of the frequency of the original crystal oscillator;
Counting the second pulses from the time service module by using the clock signal after frequency multiplication, storing the count value into a memory of the FPGA, and calculating the frequency of the crystal oscillator by adopting a weighted average method when the stored count value reaches a preset number N;
The method for calculating the frequency of the crystal oscillator by adopting a weighted average method specifically comprises the following steps:
f1=(CN-C1 )/[(N-1)M];
f2={af1 + b{(CN+1-C2 )/[(N-1)M] }}/(a+b);
f3={af2 + bf1+c{(CN+2-C3 )/((N-1)M}}/(a+b+c);
fn={a fn-1 + bfn-2+c{(CN+k-1-Ck )/((N-1)M}}/(a+b+c);
In the above formula, f 1 is the first calculated crystal frequency, f 2 is the second calculated crystal frequency, f 3 is the third calculated crystal frequency, f n is the nth calculated crystal frequency, f n-1 is the n-1 th calculated crystal frequency, and f n-2 is the n-2 nd calculated crystal frequency; c 1 is the first stored count value, C 2 is the second stored count value, C N+1 is the (n+1) th stored count value, C N+2 is the (n+2) th stored count value, C k is the (k) th stored count value, and C N+k-1 is the (n+k-1) th stored count value; a. and b and c are weight coefficients used for adjusting the weight calculated each time.
2. The method for measuring the frequency of the FPGA crystal oscillator according to claim 1, wherein the time service module is Beidou.
3. The method for measuring the frequency of the crystal oscillator of the FPGA according to claim 2, wherein the relation among a, b and c is as follows: a > b > c, b=2c;a=bb。
4. An FPGA crystal oscillator frequency measurement system, comprising: the system comprises an FPGA module, a time service module and a crystal oscillator;
The crystal oscillator is used for generating an original clock signal;
the time service module is connected with the FPGA module and is used for providing a second pulse reference by the FPGA module;
the FPGA module comprises a frequency multiplier and a frequency measurement module;
The frequency multiplier is connected with the crystal oscillator and is used for multiplying the original clock signal generated by the crystal oscillator through the frequency multiplier to obtain a frequency-multiplied clock signal; the frequency multiplication factor is M, namely the frequency of the clock signal after frequency multiplication is M times of the frequency of the original crystal oscillator;
the frequency measurement module is respectively connected with the frequency multiplier and the time service module and is used for counting the second pulse from the time service module by using the clock signal after frequency multiplication, storing the count value in the memory, and calculating the frequency of the crystal oscillator by adopting a weighted average method when the stored count value reaches a preset number N;
The method for calculating the frequency of the crystal oscillator by adopting a weighted average method specifically comprises the following steps:
f1=(CN-C1 )/[(N-1)M];
f2={af1 + b{(CN+1-C2 )/[(N-1)M] }}/(a+b);
f3={af2 + bf1+c{(CN+2-C3 )/((N-1)M}}/(a+b+c);
fn={a fn-1 + bfn-2+c{(CN+k-1-Ck )/((N-1)M}}/(a+b+c);
In the above formula, f 1 is the first calculated crystal frequency, f 2 is the second calculated crystal frequency, f 3 is the third calculated crystal frequency, f n is the nth calculated crystal frequency, f n-1 is the n-1 th calculated crystal frequency, and f n-2 is the n-2 nd calculated crystal frequency; c 1 is the first stored count value, C 2 is the second stored count value, C N+1 is the (n+1) th stored count value, C N+2 is the (n+2) th stored count value, C k is the (k) th stored count value, and C N+k-1 is the (n+k-1) th stored count value; a. and b and c are weight coefficients used for adjusting the weight calculated each time.
5. The FPGA crystal oscillator frequency measurement system of claim 4, wherein the relationship among a, b, c is: a > b > c, b=2c;a=bb。
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