CN111766771A - Voltage-controlled crystal oscillator taming-based time interval measuring method and system - Google Patents
Voltage-controlled crystal oscillator taming-based time interval measuring method and system Download PDFInfo
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- CN111766771A CN111766771A CN202010662647.6A CN202010662647A CN111766771A CN 111766771 A CN111766771 A CN 111766771A CN 202010662647 A CN202010662647 A CN 202010662647A CN 111766771 A CN111766771 A CN 111766771A
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- G04F—TIME-INTERVAL MEASURING
- G04F8/00—Apparatus for measuring unknown time intervals by electromechanical means
- G04F8/02—Apparatus for measuring unknown time intervals by electromechanical means using an electromechanical oscillator
Abstract
The invention discloses a time interval measuring method and a system based on voltage-controlled crystal oscillator taming, which comprises the steps of receiving an accurate pulse-per-second signal and comparing the accurate pulse-per-second signal with a measured value generated in an FPGA chip every second; generating analog voltage to continuously discipline the voltage-controlled crystal oscillator until the error between the frequency output by the voltage-controlled crystal oscillator and the standard output frequency reaches a preset value; generating a plurality of clock signals with the same frequency, different phases and fixed phase difference by utilizing a PLL (phase locked loop) technology according to the accurate 10MHz fluctuation frequency input after the voltage-controlled crystal oscillator is acclimated; receiving a clock signal, capturing and measuring the rising edge of an input time pulse signal to be measured, and solving the time interval between the time pulse signals; and transmitting the received time interval to obtain a measurement result and displaying the measurement result. The voltage-controlled crystal oscillator adopted by the invention is tamed, and has the functions of improving the precision of time interval measurement and perfecting a time interval measuring instrument.
Description
Technical Field
The invention relates to the technical field of time interval measurement, in particular to a time interval measurement method and system based on voltage-controlled crystal oscillator taming.
Background
Time is an extremely important attribute of materials, and can become a basic physical parameter for measuring a plurality of research fields, such as the communication field, the medical field, the mechanical field and the like, the higher the precision of time is, in scientific research, the easier the research in the fields can obtain better performance and more precise results, and the more the scientific progress and the application of engineering technology can be greatly promoted, thereby being convenient for people to reform and know the world.
The time interval is a value that refers to the time period between two moments, and the unit of the time interval is generally seconds(s), which is one of seven basic international units. How to know the value of the time period between two moments is an important matter, which gives people a basic idea to measure the world. In scientific research and engineering technology application, a time interval enables a certain event to be more accurate and visual, and enables many researches or applications to have repeatability and expandability, so that convenience is brought to the later researches of people.
Time interval measurements are typically measurements of periodic, constantly occurring physical events. Time interval measurement has a long history, and the measurement from the beginning of the day of the original society, the rising of the sunset, the measurement of one day, the sundial time measurement and the writing of an almanac in the built society and the measurement by electronic equipment are developed nowadays. Not only the time interval measurement method is more and more, but also the precision of the time interval measurement is continuously improved, and from the former small-scale precision to the classification, the second-scale and the present nanosecond-scale or even higher precision, the progress of the scientific technology is the most important reason for the rapid development of the time interval measurement. Due to the improvement of the requirement of each research field on the time interval measurement accuracy, for example, in the field of satellite navigation, when an error of 1ns occurs in time, an error of 3cm occurs in positioning accuracy, and if millimeter-level positioning accuracy is to be achieved, the corresponding time interval measurement error needs to be less than 33 ps. In addition, certain requirements are also placed on the aspects of multi-channel and continuous time interval measurement, the traditional method is not suitable for the research field at present, and the search for a new time interval measurement method or the improvement of the existing time interval measurement method becomes imperative.
The precision of the time interval measurement value directly reflects the performance of the time interval measurement system, so that the research of a method for improving the measurement precision of the time interval measurement system is very important. But the current time interval measurement accuracy is low.
Disclosure of Invention
The invention aims to provide a time interval measuring method and a time interval measuring system based on voltage-controlled crystal oscillator taming, and aims to solve the problem of low time interval measuring precision in the prior art.
In order to achieve the above object, in a first aspect, the present invention provides a time interval measurement method based on voltage controlled crystal oscillator taming, including:
outputting an accurate pulse per second signal;
receiving an accurate pulse per second signal, and comparing the accurate pulse per second signal with a measured value generated every second in the FPGA chip;
generating analog voltage to continuously discipline the voltage-controlled crystal oscillator until the error between the frequency output by the voltage-controlled crystal oscillator and the standard output frequency reaches a preset value;
generating a plurality of clock signals with the same frequency, different phases and fixed phase difference by utilizing a PLL (phase locked loop) technology according to the accurate 10MHz fluctuation frequency input after the voltage-controlled crystal oscillator is acclimated;
receiving a clock signal, capturing and measuring the rising edge of an input time pulse signal to be measured, and solving the time interval between the time pulse signals;
and transmitting the received time interval to obtain a measurement result and displaying the measurement result.
In one embodiment, generating an analog voltage to continuously discipline the vcxo until an error between a frequency output by the vcxo and a standard output frequency reaches a preset value specifically includes:
if the difference between the output frequency of the voltage-controlled crystal oscillator and the standard output frequency is greater than zero, reducing the output frequency of the voltage-controlled crystal oscillator;
and if the difference between the frequency output by the voltage-controlled crystal oscillator and the standard output frequency is less than zero, increasing the frequency output by the voltage-controlled crystal oscillator.
In one embodiment, generating the analog voltage to continuously discipline the vcxo until an error between a frequency output by the vcxo and a standard output frequency reaches a preset value, further includes:
and continuously and repeatedly controlling the voltage according to a voltage control voltage formula until the error between the frequency output by the voltage control crystal oscillator and the standard output frequency reaches a preset value.
In one embodiment, receiving a clock signal, performing capture measurement on the rising edge of an input time pulse signal to be measured, and obtaining the time interval between the time pulse signals includes:
setting the first pulse signal as a start signal and the second pulse signal as an end signal; after the start signal arrives, counting the register under the clock domain capturing the start signal until the end signal arrives, stopping counting, and outputting the counting result as an integer part of the time interval measurement instantaneous value; the phase difference between the clock capturing the start signal and the clock capturing the end signal is used as the decimal part of the instantaneous value of the time interval, and the two clocks are spliced together and output to the register for registering.
In a second aspect, the invention provides a time interval measuring system based on voltage-controlled crystal oscillator taming, which comprises a time interval measuring module, a clock signal generating module, a voltage-controlled crystal oscillator taming module, a serial port communication module, a display module, a receiver and an analog-to-digital conversion module; the time interval measuring module, the clock signal generating module and the voltage-controlled crystal oscillator taming module are sequentially connected, the serial port communication module is connected with the time interval measuring module and the clock signal generating module, the display module is connected with the serial port communication module, and the receiver and the analog-to-digital conversion module are connected with the voltage-controlled crystal oscillator taming module;
the receiver is used for outputting an accurate pulse per second signal;
the voltage-controlled crystal oscillator taming module is used for receiving an accurate pulse per second signal and comparing the accurate pulse per second signal with a measured value generated in the FPGA chip per second;
the analog-to-digital conversion module is used for generating analog voltage to continuously taming the voltage-controlled crystal oscillator until the error between the frequency output by the voltage-controlled crystal oscillator and the standard output frequency reaches a preset value;
the clock signal generation module is used for generating a plurality of clock signals with the same frequency, different phases and fixed phase difference by utilizing a PLL (phase locked loop) technology according to the accurate 10MHz fluctuation frequency input after the voltage-controlled crystal oscillator is acclimated;
the time interval measuring module is used for receiving a clock signal, capturing and measuring the rising edge of an input time pulse signal to be measured and solving the time interval between the time pulse signals;
the serial port communication module is used for receiving a time interval and transmitting the time interval to the display module;
and the display module is used for receiving the measurement result obtained after the time interval processing and displaying the measurement result.
According to the time interval measuring method and system based on voltage-controlled crystal oscillator discipline, the crystal oscillator is disciplined by using the standard pulse signal, so that the stability and accuracy of the voltage-controlled crystal oscillator can be effectively improved, meanwhile, the clock is disciplined by accumulating the number before the clock is disciplined, and the clock is disciplined by accurately measuring the time interval, so that the precision can be improved from one previous clock period to the measurement resolution of time interval measurement; and then, the time interval measurement with high performance and high resolution is finished by combining a PLL clock edge triggering method.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic flowchart of a time interval measurement method based on voltage-controlled crystal oscillator taming according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a time interval measurement system based on voltage controlled crystal oscillation discipline according to the present invention;
FIG. 3 is a flow chart of FPGA voltage control taming provided by the present invention;
FIG. 4 is a block diagram of the time interval measurement module design of the present invention;
FIG. 5 is a schematic diagram of clock phase interpolation;
in the figure: 100-a time interval measuring system based on voltage-controlled crystal oscillator taming, a 10-time interval measuring module, a 20-clock signal generating module, a 30-voltage-controlled crystal oscillator taming module, a 40-serial port communication module, a 50-display module, a 60-receiver and a 70-analog-to-digital conversion module.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
In a first aspect, please refer to fig. 1, fig. 1 is a schematic flowchart of a time interval measurement method based on voltage controlled crystal oscillator taming according to an embodiment of the present invention, and in particular, the time interval measurement method based on voltage controlled crystal oscillator taming may include the following steps:
s101, outputting an accurate Pulse Per Second (PPS) signal;
in the embodiment of the present invention, the receiver 60 positions and outputs an accurate PPS pulse, the receiver 60 is an ubmax receiver 60, a pulse per second (pulse per second), and the performance of the network is usually measured by using an index of throughput (throughput). PPS (i.e., sending a pulse signal every second).
S102, receiving an accurate pulse per second signal, and comparing the accurate pulse per second signal with a measured value generated in an FPGA chip per second;
in the embodiment of the present invention, the voltage-controlled crystal oscillator taming module 30 compares the received accurate PPS second pulse with a measured value obtained by PPS generated inside an FPGA chip, and measures an error between the crystal oscillator output frequency and the standard frequency according to a difference between the obtained measured values.
S103, generating an analog voltage to continuously discipline the voltage-controlled crystal oscillator until the error between the frequency output by the voltage-controlled crystal oscillator and the standard output frequency reaches a preset value;
in the embodiment of the present invention, the analog-to-digital conversion module 70 is used to generate an analog voltage to continuously discipline the voltage-controlled crystal oscillator until the error between the frequency output by the voltage-controlled crystal oscillator and the standard frequency time reaches a preset value, and the voltage-controlled discipline module of the crystal oscillator is a key for improving the measurement precision of the time interval measurement system; the model of the analog-to-digital conversion module 70 is DAC 7512. If the difference between the output frequency of the voltage-controlled crystal oscillator and the standard output frequency is greater than zero, reducing the output frequency of the voltage-controlled crystal oscillator; and if the difference between the frequency output by the voltage-controlled crystal oscillator and the standard output frequency is less than zero, increasing the frequency output by the voltage-controlled crystal oscillator. And continuously and repeatedly controlling the voltage according to a voltage control voltage formula of the voltage-controlled crystal oscillator until the error between the frequency output by the voltage-controlled crystal oscillator and the standard output frequency reaches a preset value.
Specifically, please refer to fig. 3, fig. 3 is a flow chart of the FPGA voltage-controlled taming provided by the present invention, where the voltage-controlled crystal oscillator taming module 30 utilizes a DAC7512 to implement voltage-controlled taming and taming of the crystal oscillator, the DAC7512 converts an input value into an analog voltage and applies the analog voltage to a voltage-controlled input terminal of the crystal oscillator, so as to change an output frequency of the crystal oscillator, and the output frequency of the crystal oscillator is input into the FPGA chip as a system clock for measurement, so that the output frequency of the crystal oscillator is more and more accurate by repeatedly performing voltage control;
in the FPGA chip, the rising edge of the system clock is used to capture the time pulse signal, if the output frequency of the voltage controlled crystal oscillator is used as the system clock to count the time pulse signal, when the output frequency of the voltage controlled crystal oscillator reaches the standard frequency,the standard time pulse count value should be n0；
n0＝T/T0；
Setting the actual output frequency of the voltage controlled crystal oscillator to be f1With a period of T1At this time, the count value of the system clock to the time pulse signal is n1；
n1＝T/T1；
The difference between the actual output frequency and the standard output frequency is Δ f;
Δf＝f1-f0＝(n0-n1)/T；
when the sign of the delta f is positive, the actual output frequency is higher than the standard output frequency, and the actual output frequency needs to be reduced; when the sign of Δ f is negative, it represents that the actual output frequency is lower than the standard output frequency, and the actual output frequency needs to be increased. Reflecting the actual output frequency to be changed on the voltage-controlled voltage, the value of the voltage-controlled voltage to be changed is Δ V, where VCC is the voltage-controlled voltage range, fsIs a voltage controlled frequency range;
by continuously repeating voltage control, the output frequency of the voltage-controlled crystal oscillator is controlled to be close to the standard frequency, and the aim of taming the crystal oscillator is fulfilled.
S104, generating a plurality of clock signals with the same frequency, different phases and fixed phase difference by utilizing a PLL (phase locked loop) technology according to the accurate 10MHz fluctuation frequency input after acclimation of the voltage-controlled crystal oscillator;
in the embodiment of the present invention, please refer to fig. 5, fig. 5 is a schematic diagram of a clock phase interpolation method, a type of a chip adopted in the present invention is EP4CGX150DF27C8, and a multi-phase clock circuit is implemented by using an internally integrated PLL, so as to generate a plurality of clock signals with the same frequency, different phases and a fixed phase difference, thereby obtaining a higher measurement resolution. Meanwhile, these clock signals are input to the time interval measurement module 10, and the rising edge of the input time pulse signal to be measured is captured.
S105, receiving a clock signal, capturing and measuring the rising edge of the input time pulse signal to be measured, and solving the time interval between the time pulse signals;
in the embodiment of the present invention, please refer to fig. 4, fig. 4 is a block diagram illustrating a time interval measuring module 10 according to the present invention, wherein the time interval measuring module 10 uses a verilog language to describe a clock phase interpolation method on a quartus13.0 platform by using a principle of measuring a time interval by using a phase interpolation method; setting the first pulse signal as a start signal and the second pulse signal as an end signal for testing the time interval; after the start signal arrives, counting the register under the clock domain capturing the start signal until the end signal arrives, stopping counting, and outputting the counting result as an integer part of the time interval measurement instantaneous value; the phase difference between the clock capturing the start signal and the clock capturing the end signal is used as the decimal part of the instantaneous value of the time interval, and the two clocks are spliced together and output to the register for registering.
And S106, after the transmission processing is carried out on the receiving time interval, the measurement result is obtained and displayed.
In the embodiment of the invention, the measured time interval is output to the upper computer software for displaying, and meanwhile, the measured accurate PPS is sent to the voltage-controlled crystal oscillator taming module 30 to continue taming the crystal oscillator so as to ensure that the 10MHz output by the voltage-controlled crystal oscillator is in an accurate state; the serial port communication module 40 is based on FPGA serial communication technology, and the main function of the serial port communication module 40 is to receive a control instruction from upper computer software and output a time interval measurement value to the upper computer software for display; the display module 50, that is, the upper computer software, mainly because the time interval measurement value sent by the serial port communication module 40 is not an actual time interval measurement and control value, a final result can be obtained after processing; therefore, the upper computer software is used for monitoring the output value of the time interval measuring system in real time, so that a user can conveniently use the receiving time interval to transmit and then obtain a measuring result to display, and the method comprises the following specific steps of: different pulse signals are selectively output according to different ports, the different pulse signals comprise a time interval pulse signal to be detected which is a pulse signal generated inside an FPGA chip, the time interval pulse signal to be detected is a PPS pulse signal generated by the ublox receiver 60, and the time interval pulse signal to be detected is a pulse signal input from the outside. If the input port selects the port 1, the to-be-detected time interval pulse signal is selected as a pulse signal generated in the FPGA chip; port 2 represents the selection of the time interval pulse signal to be measured as the PPS pulse signal generated by the ublox receiver 60; the port 3 represents that the pulse signal of the time interval to be measured is selected as the pulse signal input from the outside.
In a second aspect, please refer to fig. 2, fig. 2 is a schematic structural diagram of a time interval measurement system 100 based on voltage controlled crystal oscillator taming according to an embodiment of the present invention, and in particular, the time interval measurement system 100 based on voltage controlled crystal oscillator taming includes a time interval measurement module 10, a clock signal generation module 20, a voltage controlled crystal oscillator taming module 30, a serial port communication module 40, a display module 50, a receiver 60, and an analog-to-digital conversion module 70; the time interval measuring module 10, the clock signal generating module 20 and the voltage-controlled crystal oscillator taming module 30 are sequentially connected, the serial port communication module 40 is connected with the time interval measuring module 10 and the clock signal generating module 20, the display module 50 is connected with the serial port communication module 40, and the receiver 60 and the analog-to-digital conversion module 70 are connected with the voltage-controlled crystal oscillator taming module 30;
the receiver 60 is configured to output an accurate pulse per second signal;
the voltage-controlled crystal oscillator taming module 30 is used for receiving an accurate pulse per second signal and comparing the accurate pulse per second signal with a measured value generated in the FPGA chip every second; the main function is to taminate the voltage-controlled crystal oscillator used by the system, so that the output frequency of the crystal oscillator is more accurate and stable;
the analog-to-digital conversion module 70 is configured to generate an analog voltage to continuously discipline the voltage-controlled crystal oscillator until an error between a frequency output by the voltage-controlled crystal oscillator and a standard output frequency reaches a preset value;
the clock signal generating module 20 is configured to generate, by using a PLL technique, a plurality of clock signals having the same frequency, different phases, and a fixed phase difference according to the accurate 10MHz fluctuation frequency input after the voltage-controlled crystal oscillator is acclimated; a pll (phase locked loop), which is a phase locked loop or phase locked loop, and is used to integrate clock signals uniformly, so that the high-frequency device can work normally, and a stable and high-frequency clock signal can be realized;
the time interval measuring module 10 is configured to receive a clock signal, capture and measure a rising edge of an input time pulse signal to be measured, and obtain a time interval between the time pulse signals; measuring the input time pulse signals by using a plurality of clock signals with the same frequency, different phases and fixed phase difference to obtain time intervals among the time pulse signals;
the serial port communication module 40 is configured to receive a time interval and transmit the time interval to the display module 50; the main function is to communicate with the display module 50, receive the time interval measurement value transmitted by the main control module and then transmit the time interval measurement value to the display module 50 for display;
the display module 50 is upper computer software and is configured to receive the time interval processing and display a measurement result, that is, process the time interval measurement value received from the serial communication module 40, and display the processed time interval measurement result on the upper computer software.
The specific process is as follows: inputting the standard PPS of the receiver 60 into the voltage-controlled crystal oscillator taming module 30, wherein the output value of the voltage-controlled crystal oscillator taming module 30 is converted into an analog voltage through a DAC7515 voltage-controlled chip to continuously taming the voltage-controlled crystal oscillator; and then outputting 10MHz to the clock signal generation module 20 by using the successfully disciplined crystal oscillator, wherein the clock signal generation module 20 generates a plurality of clock signals by using the PLL technology, and finally, the plurality of clock signals are used for measuring the input time pulse signals, and the final measurement result is displayed on the upper computer software. The voltage-controlled crystal oscillator adopted by the invention is tamed, and has the functions of improving the precision of time interval measurement and perfecting a time interval measuring instrument. The invention proposes that firstly, the crystal oscillator is disciplined by using a standard pulse signal, so that the stability and the accuracy of the voltage-controlled crystal oscillator can be effectively improved, meanwhile, the clock is disciplined by accumulating the number before the clock is disciplined, and the clock is disciplined by accurately measuring the time interval, so that the precision can be improved from the previous one clock period to the measurement resolution of the time interval measurement; and then, the time interval measurement with high performance and high resolution is finished by combining a PLL clock edge triggering method.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (5)
1. A time interval measuring method based on voltage-controlled crystal oscillator taming is characterized by comprising the following steps:
outputting an accurate pulse per second signal;
receiving an accurate pulse per second signal, and comparing the accurate pulse per second signal with a measured value generated every second in the FPGA chip;
generating analog voltage to continuously discipline the voltage-controlled crystal oscillator until the error between the frequency output by the voltage-controlled crystal oscillator and the standard output frequency reaches a preset value;
generating a plurality of clock signals with the same frequency, different phases and fixed phase difference by utilizing a PLL (phase locked loop) technology according to the accurate 10MHz fluctuation frequency input after the voltage-controlled crystal oscillator is acclimated;
receiving a clock signal, capturing and measuring the rising edge of an input time pulse signal to be measured, and solving the time interval between the time pulse signals;
and transmitting the received time interval to obtain a measurement result and displaying the measurement result.
2. The voltage-controlled crystal oscillator taming-based time interval measurement method of claim 1, wherein generating the analog voltage to continuously taming the voltage-controlled crystal oscillator until an error between a frequency output by the voltage-controlled crystal oscillator and a standard output frequency reaches a preset value, specifically comprising:
if the difference between the output frequency of the voltage-controlled crystal oscillator and the standard output frequency is greater than zero, reducing the output frequency of the voltage-controlled crystal oscillator;
and if the difference between the frequency output by the voltage-controlled crystal oscillator and the standard output frequency is less than zero, increasing the frequency output by the voltage-controlled crystal oscillator.
3. The voltage-controlled crystal oscillator taming-based time interval measuring method of claim 2, wherein the voltage-controlled crystal oscillator is continuously taming by generating the analog voltage until the error between the frequency output by the voltage-controlled crystal oscillator and the standard output frequency reaches a preset value, further comprising:
and continuously and repeatedly controlling the voltage according to a voltage control voltage formula of the voltage-controlled crystal oscillator until the error between the frequency output by the voltage-controlled crystal oscillator and the standard output frequency reaches a preset value.
4. The voltage controlled crystal oscillator taming-based time interval measurement method of claim 3, wherein receiving a clock signal, performing capture measurement on rising edges of input time pulse signals to be measured, and obtaining time intervals between the time pulse signals comprises:
setting the first pulse signal as a start signal and the second pulse signal as an end signal; after the start signal arrives, counting the register under the clock domain capturing the start signal until the end signal arrives, stopping counting, and outputting the counting result as an integer part of the time interval measurement instantaneous value; the phase difference between the clock capturing the start signal and the clock capturing the end signal is used as the decimal part of the instantaneous value of the time interval, and the two clocks are spliced together and output to the register for registering.
5. A time interval measuring system based on voltage-controlled crystal oscillator discipline is characterized in that,
the device comprises a time interval measuring module, a clock signal generating module, a voltage-controlled crystal oscillator taming module, a serial port communication module, a display module, a receiver and an analog-to-digital conversion module; the time interval measuring module, the clock signal generating module and the voltage-controlled crystal oscillator taming module are sequentially connected, the serial port communication module is connected with the time interval measuring module and the clock signal generating module, the display module is connected with the serial port communication module, and the receiver and the analog-to-digital conversion module are connected with the voltage-controlled crystal oscillator taming module;
the receiver is used for outputting an accurate pulse per second signal;
the voltage-controlled crystal oscillator taming module is used for receiving an accurate pulse per second signal and comparing the accurate pulse per second signal with a measured value generated in the FPGA chip per second;
the analog-to-digital conversion module is used for generating analog voltage to continuously taming the voltage-controlled crystal oscillator until the error between the frequency output by the voltage-controlled crystal oscillator and the standard output frequency reaches a preset value;
the clock signal generation module is used for generating a plurality of clock signals with the same frequency, different phases and fixed phase difference by utilizing a PLL (phase locked loop) technology according to the accurate 10MHz fluctuation frequency input after the voltage-controlled crystal oscillator is acclimated;
the time interval measuring module is used for receiving a clock signal, capturing and measuring the rising edge of an input time pulse signal to be measured and solving the time interval between the time pulse signals;
the serial port communication module is used for receiving a time interval and transmitting the time interval to the display module;
and the display module is used for receiving the measurement result obtained after the time interval processing and displaying the measurement result.
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| CN112711042A (en) * | 2021-01-14 | 2021-04-27 | 福建江夏学院 | Clock adjusting circuit and method for stably capturing Beidou satellite signals |
| CN112711042B (en) * | 2021-01-14 | 2023-05-05 | 福建江夏学院 | Clock adjusting circuit and method for stable capturing of Beidou satellite signals |
| CN113419414A (en) * | 2021-07-13 | 2021-09-21 | 贵州省计量测试院 | Standard timing system with GNSS disciplining and interval time keeping capabilities |
| CN113848568A (en) * | 2021-09-24 | 2021-12-28 | 上海精密计量测试研究所 | Time correction system and method |
| CN116203823A (en) * | 2023-02-16 | 2023-06-02 | 深圳市中冀联合技术股份有限公司 | High-precision clock taming method |
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