CN118039685A - 高电子迁移率晶体管及其制作方法 - Google Patents
高电子迁移率晶体管及其制作方法 Download PDFInfo
- Publication number
- CN118039685A CN118039685A CN202410094539.1A CN202410094539A CN118039685A CN 118039685 A CN118039685 A CN 118039685A CN 202410094539 A CN202410094539 A CN 202410094539A CN 118039685 A CN118039685 A CN 118039685A
- Authority
- CN
- China
- Prior art keywords
- barrier layer
- hard mask
- layer
- forming
- type semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 15
- 230000004888 barrier function Effects 0.000 claims abstract description 105
- 238000000034 method Methods 0.000 claims abstract description 52
- 239000004065 semiconductor Substances 0.000 claims abstract description 39
- 239000000758 substrate Substances 0.000 claims abstract description 30
- 239000010410 layer Substances 0.000 claims description 186
- 229910002601 GaN Inorganic materials 0.000 claims description 14
- 229910052782 aluminium Inorganic materials 0.000 claims description 11
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 11
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 claims description 7
- 239000011241 protective layer Substances 0.000 claims description 2
- 238000000059 patterning Methods 0.000 claims 1
- 238000005229 chemical vapour deposition Methods 0.000 description 22
- 229910052751 metal Inorganic materials 0.000 description 20
- 239000002184 metal Substances 0.000 description 20
- 238000002248 hydride vapour-phase epitaxy Methods 0.000 description 18
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 7
- 238000005530 etching Methods 0.000 description 7
- 238000002955 isolation Methods 0.000 description 6
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 6
- 238000001451 molecular beam epitaxy Methods 0.000 description 6
- 238000000206 photolithography Methods 0.000 description 6
- 238000005240 physical vapour deposition Methods 0.000 description 6
- 238000007740 vapor deposition Methods 0.000 description 6
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- 238000005019 vapor deposition process Methods 0.000 description 4
- 229910002704 AlGaN Inorganic materials 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000007772 electrode material Substances 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000001012 protector Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7781—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with inverted single heterostructure, i.e. with active layer formed on top of wide bandgap layer, e.g. IHEMT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1066—Gate region of field-effect devices with PN junction gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
本发明公开一种高电子迁移率晶体管及其制作方法，其中制作高电子迁移率晶体管(high electron mobility transistor,HEMT)的方法为，首先形成一缓冲层于一基底上，然后形成一第一阻障层于该缓冲层上，形成一第一硬掩模于该第一阻障层上，去除该第一硬掩模以及该第一阻障层以形成一凹槽，形成一第二阻障层于该凹槽内，再形成一P型半导体层于该第二阻障层上。
Description
本申请是中国发明专利申请(申请号：201910953637.5，申请日：2019年10月09日，发明名称：高电子迁移率晶体管及其制作方法)的分案申请。
技术领域
本发明涉及一种高电子迁移率晶体管及其制作方法。
背景技术
以氮化镓基材料(GaN-based materials)为基础的高电子迁移率晶体管具有于电子、机械以及化学等特性上的众多优点，例如宽能隙、高击穿电压、高电子迁移率、大弹性模数(elastic modulus)、高压电与压阻系数(high piezoelectric and piezoresistivecoefficients)等与化学钝性。上述优点使氮化镓基材料可用于如高亮度发光二极管、功率开关元件、调节器、电池保护器、面板显示驱动器、通讯元件等应用的元件的制作。
发明内容
本发明一实施例揭露一种制作高电子迁移率晶体管(high electron mobilitytransistor,HEMT)的方法。首先形成一缓冲层于一基底上，然后形成一第一阻障层于该缓冲层上，形成一第一硬掩模于该第一阻障层上，去除该第一硬掩模以及该第一阻障层以形成一凹槽，形成一第二阻障层于该凹槽内，再形成一P型半导体层于该第二阻障层上。
本发明另一实施例揭露一种制作高电子迁移率晶体管(high electron mobilitytransistor,HEMT)的方法。首先形成一缓冲层于一基底上，形成一阻障层于该缓冲层上，形成一第一硬掩模于该阻障层上，形成一第二硬掩模于该第一硬掩模上，去除该第二硬掩模以及该第一硬掩模以形成一凹槽，再形成一P型半导体层于该阻障层上。
本发明又一实施例揭露一种高电子迁移率晶体管(high electron mobilitytransistor,HEMT)，其主要包含一缓冲层设于一基底上、一P型半导体层设于该阻障层上、一第一阻障层设于该阻障层及该P型半导体层之间、一第二阻障层设于该第一阻障层两侧且第一阻障层及第二阻障层包含不同厚度、一栅极电极设于该P型半导体层上以及一源极电极以及一漏极电极设于该栅极电极两侧的该阻障层上。
附图说明
图1至图5为本发明一实施例制作一高电子迁移率晶体管的方法示意图；
图6至图10为本发明一实施例制作一高电子迁移率晶体管的方法示意图。
主要元件符号说明
12 基底 14 缓冲层
16 第一阻障层 18 第一硬掩模
20 MESA区域 22 第二硬掩模
24 凹槽 26 第二阻障层
28 P型半导体层 30 保护层
32 栅极电极 34 源极电极
36 漏极电极
42 基底 44 缓冲层
46 阻障层 48 第一硬掩模
50 第二硬掩模 52 MESA区域
54 第三硬掩模 56 凹槽
58 P型半导体层 60 保护层
62 栅极电极 64 源极电极
66 漏极电极
具体实施方式
请参照图1至图5，图1至图5为本发明一实施例制作一高电子迁移率晶体管的方法示意图。如图1所示，首先提供一基底12，例如一由硅、碳化硅或氧化铝(或可称蓝宝石)所构成的基底，其中基底12可为单层基底、多层基底、梯度基底或上述的组合。依据本发明其他实施例基底12又可包含一硅覆绝缘(silicon-on-insulator,SOI)基底。
然后于基底12表面形成一缓冲层14。在一实施例中，缓冲层14包含III-V族半导体例如氮化镓，其厚度可介于0.5微米至10微米之间。在一实施例中，可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metal organic chemicalvapor deposition,MOCVD)制作工艺、化学气相沉积(chemical vapor deposition,CVD)制作工艺、氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺或上述组合于基底12上形成缓冲层14。
接着形成一第一阻障层16于缓冲层14表面。在本实施例中第一阻障层16较佳包含III-V族半导体例如氮化铝镓(AlxGa1-xN)，其中0<x<1，x较佳小于等于20％，且第一阻障层16较佳包含一由外延成长制作工艺所形成的外延层。如同上述形成缓冲层14的方式，可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metalorganic chemical vapor deposition,MOCVD)制作工艺、化学气相沉积(chemical vapordeposition,CVD)制作工艺、氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺或上述组合于缓冲层14上形成第一阻障层16。需注意的是，本实施例中第一阻障层16虽直接设置于缓冲层14表面，但依据本发明另一实施例又可选择于缓冲层14与第一阻障层16之间额外形成一金属氮化层(图未示)包含例如但不局限于氮化铝，此变化型也属本发明所涵盖的范围。随后形成一第一硬掩模18于第一阻障层16表面。在本实施例中，第一硬掩模18较佳包含氮化硅且其厚度约略5纳米，但不局限于此。
随后如图2所示，进行一平台隔离(MESA isolation)制作工艺定义出MESA区域20与主动区域，使元件之间可独立运作而不致受到彼此交互影响。在本实施例中，平台隔离制作工艺可利用一光刻暨蚀刻制作工艺图案化或以蚀刻去除部分第一硬掩模18、部分第一阻障层16以及部分缓冲层14，其中被图案化的第一硬掩模18、第一阻障层16以及缓冲层14较佳具有相同宽度且三者之间的边缘较佳相互切齐，而剩余且未被图案化的部分缓冲层14则与基底12包含相同宽度。
然后如图3所示，先全面性形成一第二硬掩模22于第一硬掩模18上，包括第一硬掩模18上表面与侧壁、第一阻障层16侧壁、缓冲层14侧壁以及设于MESA区域20两侧的缓冲层14表面，再进行一光刻暨蚀刻制作工艺去除部分第二硬掩模22、部分第一硬掩模18以及部分第一阻障层16以形成一凹槽24并同时暴露出缓冲层14表面。
如图4所示，接着形成一第二阻障层26于凹槽24内，形成一P型半导体层28于第二阻障层26上，再去除第二硬掩模22暴露出下方的第一硬掩模18。在本实施例中，第一阻障层16与第二阻障层26较佳包含不同铝浓度或更具体而言第二阻障层26的铝浓度较佳小于第一阻障层16的铝浓度。举例来说，若第一阻障层16包含III-V族半导体例如氮化铝镓(AlxGa1-xN)，则其中0<x<1，x较佳介于15～50％。第二阻障层26若同样包含III-V族半导体例如氮化铝镓(AlxGa1-xN)，则其中0<x<1，x较佳介于5～15％。P型半导体层28则较佳包含P型氮化镓。
另外，第二阻障层26厚度较佳小于第一阻障层16厚度，例如第一阻障层16厚度较佳介于15纳米至50纳米而第二阻障层26厚度则较佳介于5纳米至15纳米。如同上述形成第一阻障层16的方式，可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metal organic chemical vapor deposition,MOCVD)制作工艺、化学气相沉积(chemical vapor deposition,CVD)制作工艺、氢化物气相外延(hydride vapor phaseepitaxy,HVPE)制作工艺或上述组合于凹槽内的缓冲层14表面形成第二阻障层26及P型半导体层28。
随后如图5所示，先形成一保护层30于第一硬掩模18、P型半导体层28及MESA区域20两侧的缓冲层14表面，再形成一栅极电极32于P型半导体层28上以及源极电极34与漏极电极36于栅极电极32两侧。在本实施例中，可先进行一光刻暨蚀刻制作工艺去除P型半导体层28正上方的部分保护层30形成凹槽(图未示)，形成一栅极电极32于凹槽内，去除栅极电极32两侧的部分保护层30及部分第一硬掩模18形成二凹槽，再分别形成源极电极34与漏极电极36于栅极电极32两侧。
在本实施例中，栅极电极32、源极电极34以及漏极电极36较佳由金属所构成，其中栅极电极32较佳由萧特基金属所构成而源极电极34与漏极电极36较佳由欧姆接触金属所构成。依据本发明一实施例，栅极电极32、源极电极34及漏极电极36可各自包含金、银、铂、钛、铝、钨、钯或其组合。在一些实施例中，可利用电镀制作工艺、溅镀制作工艺、电阻加热蒸镀制作工艺、电子束蒸镀制作工艺、物理气相沉积(physical vapor deposition,PVD)制作工艺、化学气相沉积制作工艺(chemical vapor deposition,CVD)制作工艺、或上述组合于上述凹槽内形成导电材料，然后再利用单次或多次蚀刻将电极材料图案化以形成栅极电极32、源极电极34以及漏极电极36。至此即完成本发明一实施例的一高电子迁移率晶体管的制作。
请在参照图5，图5另揭露本发明一实施例的一高电子迁移率晶体管的结构示意图。如图5所示，高电子迁移率晶体管主要包含缓冲层14设于基底12上，P型半导体层28设于缓冲层14上，第一阻障层16设于P型半导体层28两侧，第二阻障层26设于缓冲层14及P型半导体层28之间，栅极电极32设于P型半导体层28上以及源极电极34以及一漏极电极36设于栅极电极32两侧的第一阻障层16上，其中P型半导体层28侧壁较佳切齐第二阻障层26侧壁。
在本实施例中，第一阻障层16与第二阻障层26较佳包含不同厚度，例如第二阻障层26厚度较佳小于第一阻障层16厚度。另外第一阻障层16与第二阻障层26较佳包含不同铝浓度或更具体而言第二阻障层26的铝浓度较佳小于第一阻障层16的铝浓度。举例来说，若第一阻障层16包含III-V族半导体例如氮化铝镓(AlxGa1-xN)，则其中0<x<1，x较佳介于15～50％。第二阻障层26若同样包含III-V族半导体例如氮化铝镓(AlxGa1-xN)，则其中0<x<1，x较佳介于5～15％。P型半导体层28则较佳包含P型氮化镓。
请参照图6至图10，图6至图10为本发明一实施例制作一高电子迁移率晶体管的方法示意图。如图6所示，首先提供一基底42，例如一由硅、碳化硅或氧化铝(或可称蓝宝石)所构成的基底，其中基底42可为单层基底、多层基底、梯度基底或上述的组合。依据本发明其他实施例基底42又可包含一硅覆绝缘(silicon-on-insulator,SOI)基底。
然后于基底42表面形成一缓冲层44。在一实施例中，缓冲层44包含III-V族半导体例如氮化镓，其厚度可介于0.5微米至10微米之间。在一实施例中，可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metal organic chemicalvapor deposition,MOCVD)制作工艺、化学气相沉积(chemical vapor deposition,CVD)制作工艺、氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺或上述组合于基底42上形成缓冲层44。
接着形成一阻障层46于缓冲层44表面。在本实施例中阻障层46较佳包含III-V族半导体例如氮化铝镓(AlxGa1-xN)，其中0<x<1，且阻障层46较佳包含一由外延成长制作工艺所形成的外延层。如同上述形成缓冲层14的方式，可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metal organic chemical vapor deposition,MOCVD)制作工艺、化学气相沉积(chemical vapor deposition,CVD)制作工艺、氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺或上述组合于缓冲层44上形成阻障层46。如同前述实施例，本实施例中阻障层46虽直接设置于缓冲层44表面，但依据本发明另一实施例又可选择于缓冲层44与阻障层46之间额外形成一金属氮化层(图未示)包含例如但不局限于氮化铝，此变化型也属本发明所涵盖的范围。
随后依序形成一第一硬掩模48以及一第二硬掩模50于阻障层46表面。在本实施例中，第一硬掩模48与第二硬掩模50较佳包含不同材料，其中第一硬掩模48较佳包含氮化硅且其厚度约略5纳米，第二硬掩模50较佳包含氧化硅，但不局限于此。
如图7所示，接着进行一平台隔离(MESA isolation)制作工艺定义出MESA区域52与主动区域，使元件之间可独立运作而不致受到彼此交互影响。在本实施例中，平台隔离制作工艺可利用一光刻暨蚀刻制作工艺图案化或以蚀刻去除部分第二硬掩模50、部分第一硬掩模48、部分阻障层46以及部分缓冲层44，其中被图案化的第二硬掩模50、第一硬掩模48、阻障层46以及缓冲层44较佳具有相同宽度且四者之间的边缘较佳切齐，而剩余且未被图案化的部分阻障层44则与基底42包含相同宽度。
如图8所示，先形成一第三硬掩模54于第二硬掩模50上，包括第二硬掩模50顶部、第二硬掩模50侧壁、第一硬掩模48侧壁、阻障层46侧壁以及缓冲层44侧壁，再进行一光刻暨蚀刻制作工艺去除部分第三硬掩模54、部分第二硬掩模50以及部分第一硬掩模48形成凹槽56暴露出阻障层46表面但不去除任何阻障层46。换句话说本实施例于形成凹槽56后凹槽56正下方的阻障层46与凹槽56两侧的阻障层46较佳具有相同厚度。在本实施例中，第三硬掩模54与第二硬掩模50较佳包含相同材料，例如两者均由氧化硅所构成，但不局限于此。
随后如图9所示，先形成一P型半导体层58于凹槽56内的阻障层46上，再去除第三硬掩模54与第二硬掩模50暴露出下方的第一硬掩模48。如同前述实施例，P型半导体层58较佳包含P型氮化镓，且如同上述形成阻障层46的方式，可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metal organic chemical vapordeposition,MOCVD)制作工艺、化学气相沉积(chemical vapor deposition,CVD)制作工艺、氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺或上述组合于凹槽56内的阻障层46表面形成P型半导体层58。
最后如图10所示，先形成一保护层60于第一硬掩模48上以及MESA区域52两侧的缓冲层44表面，再形成一栅极电极62于P型半导体层58上以及源极电极64与漏极电极66于栅极电极62两侧。在本实施例中，可先进行一光刻暨蚀刻制作工艺去除P型半导体层58正上方的部分保护层60形成凹槽，形成一栅极电极62于凹槽内，去除栅极电极62两侧的部分保护层60及部分第一硬掩模48形成二凹槽，再分别形成源极电极64与漏极电极66于栅极电极62两侧。
在本实施例中，栅极电极62、源极电极64以及漏极电极66较佳由金属所构成，其中栅极电极62较佳由萧特基金属所构成而源极电极64与漏极电极66较佳由欧姆接触金属所构成。依据本发明一实施例，栅极电极62、源极电极64及漏极电极66可各自包含金、银、铂、钛、铝、钨、钯或其组合。在一些实施例中，可利用电镀制作工艺、溅镀制作工艺、电阻加热蒸镀制作工艺、电子束蒸镀制作工艺、物理气相沉积(physical vapor deposition,PVD)制作工艺、化学气相沉积制作工艺(chemical vapor deposition,CVD)制作工艺、或上述组合于上述凹槽内形成导电材料，然后再利用单次或多次蚀刻将电极材料图案化以形成栅极电极62、源极电极64以及漏极电极66。至此即完成本发明一实施例的一高电子迁移率晶体管的制作。
综上所述，本发明主要先形成一由例如氮化硅所构成的硬掩模于AlGaN阻障层表面，去除部分硬掩模与阻障层形成凹槽，再形成P型半导体层及栅极电极于凹槽内。依据本发明的优选实施例，覆盖于AlGaN阻障层表面的硬掩模可于凹槽形成时用来保护AlGaN阻障层，避免阻障层受到蚀刻剂伤害并改善后续形成保护层后可能产生的应力损害(stressdegradation)。
以上所述仅为本发明的优选实施例，凡依本发明权利要求所做的均等变化与修饰，都应属本发明的涵盖范围。
Claims (7)
1.一种制作高电子迁移率晶体管的方法，其特征在于，包含：
形成缓冲层于基底上；
形成第一阻障层于该缓冲层上；
形成第一硬掩模于该第一阻障层上；
图案化该第一硬掩模、该第一阻障层以及该缓冲层；
形成第二硬掩模于该第一硬掩模上以及该第一阻障层及该缓冲层侧壁；
去除该第一硬掩模以及该第一阻障层以形成凹槽；
当该第一硬掩模位于该第一阻障层上时形成第二阻障层于该凹槽内，并且该第一硬掩模侧壁切齐该第二阻障层侧壁；以及
形成P型半导体层于该第二阻障层上且直接接触该第一硬掩模，其中该第一硬掩模最顶表面低于该P型半导体层顶表面。
2.如权利要求1所述的方法，另包含：
形成该第二阻障层于该凹槽内；
形成该P型半导体层于该第二阻障层上；
去除该第二硬掩模；
形成保护层于该第一硬掩模上；
形成栅极电极于该P型半导体层上；以及
形成源极电极以及漏极电极相邻于该栅极电极两侧。
3.如权利要求1所述的方法，其中该第一阻障层以及该第二阻障层包含氮化铝镓(AlxGa1-xN)。
4.如权利要求3所述的方法，其中该第一阻障层以及该第二阻障层包含不同铝浓度。
5.如权利要求3所述的方法，其中该第二阻障层的铝浓度小于该第一阻障层的铝浓度。
6.如权利要求1所述的方法，其中该第二阻障层厚度小于该第一阻障层厚度。
7.如权利要求1所述的方法，其中该P型半导体层侧壁切齐该第二阻障层侧壁。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410094539.1A CN118039685A (zh) | 2019-10-09 | 2019-10-09 | 高电子迁移率晶体管及其制作方法 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410094539.1A CN118039685A (zh) | 2019-10-09 | 2019-10-09 | 高电子迁移率晶体管及其制作方法 |
| CN201910953637.5A CN112652659B (zh) | 2019-10-09 | 2019-10-09 | 高电子迁移率晶体管及其制作方法 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910953637.5A Division CN112652659B (zh) | 2019-10-09 | 2019-10-09 | 高电子迁移率晶体管及其制作方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN118039685A true CN118039685A (zh) | 2024-05-14 |
Family
ID=75342524
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202410094539.1A Pending CN118039685A (zh) | 2019-10-09 | 2019-10-09 | 高电子迁移率晶体管及其制作方法 |
| CN201910953637.5A Active CN112652659B (zh) | 2019-10-09 | 2019-10-09 | 高电子迁移率晶体管及其制作方法 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910953637.5A Active CN112652659B (zh) | 2019-10-09 | 2019-10-09 | 高电子迁移率晶体管及其制作方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (5) | US11367779B2 (zh) |
| CN (2) | CN118039685A (zh) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112242441A (zh) * | 2019-07-16 | 2021-01-19 | 联华电子股份有限公司 | 高电子迁移率晶体管 |
| CN117438457B (zh) * | 2023-12-15 | 2024-03-22 | 浙江集迈科微电子有限公司 | 凹槽栅型GaN基HEMT器件及其制备方法 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3128601B2 (ja) * | 1992-10-06 | 2001-01-29 | 日本電信電話株式会社 | 高電子移動度トランジスタ |
| JP2006269534A (ja) * | 2005-03-22 | 2006-10-05 | Eudyna Devices Inc | 半導体装置及びその製造方法、その半導体装置製造用基板及びその製造方法並びにその半導体成長用基板 |
| JP2008306130A (ja) * | 2007-06-11 | 2008-12-18 | Sanken Electric Co Ltd | 電界効果型半導体装置及びその製造方法 |
| DE102008022630B4 (de) * | 2008-05-08 | 2015-12-31 | Bayerische Motoren Werke Aktiengesellschaft | Fahrzeugklimaanlage mit einem Filterelement mit Feuchtesensor und Verfahren zum Betreiben einer Fahrzeugklimaanlage |
| JP2010098047A (ja) * | 2008-10-15 | 2010-04-30 | Sanken Electric Co Ltd | 窒化物半導体装置 |
| JP2010103425A (ja) * | 2008-10-27 | 2010-05-06 | Sanken Electric Co Ltd | 窒化物半導体装置 |
| WO2010118092A1 (en) * | 2009-04-08 | 2010-10-14 | Efficient Power Conversion Corporation | Back diffusion suppression structures |
| US8604486B2 (en) * | 2011-06-10 | 2013-12-10 | International Rectifier Corporation | Enhancement mode group III-V high electron mobility transistor (HEMT) and method for fabrication |
| US9379191B2 (en) * | 2011-12-28 | 2016-06-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | High electron mobility transistor including an isolation region |
| US8748942B2 (en) * | 2012-07-09 | 2014-06-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | High electron mobility transistor and method of forming the same |
| US8946779B2 (en) * | 2013-02-26 | 2015-02-03 | Freescale Semiconductor, Inc. | MISHFET and Schottky device integration |
| US20140335666A1 (en) * | 2013-05-13 | 2014-11-13 | The Government Of The United States Of America, As Represented By The Secretary Of The Navy | Growth of High-Performance III-Nitride Transistor Passivation Layer for GaN Electronics |
| US9425301B2 (en) * | 2014-04-30 | 2016-08-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Sidewall passivation for HEMT devices |
| JP6817559B2 (ja) * | 2015-10-27 | 2021-01-20 | パナソニックＩｐマネジメント株式会社 | 半導体装置 |
| DE102015118440A1 (de) * | 2015-10-28 | 2017-05-04 | Infineon Technologies Austria Ag | Halbleiterbauelement |
| US10388753B1 (en) * | 2017-03-31 | 2019-08-20 | National Technology & Engineering Solutions Of Sandia, Llc | Regrowth method for fabricating wide-bandgap transistors, and devices made thereby |
-
2019
- 2019-10-09 CN CN202410094539.1A patent/CN118039685A/zh active Pending
- 2019-10-09 CN CN201910953637.5A patent/CN112652659B/zh active Active
- 2019-10-29 US US16/666,414 patent/US11367779B2/en active Active
-
2022
- 2022-05-16 US US17/745,853 patent/US20220278223A1/en not_active Abandoned
- 2022-05-16 US US17/745,841 patent/US11894441B2/en active Active
-
2023
- 2023-12-25 US US18/395,654 patent/US20240128353A1/en active Pending
- 2023-12-25 US US18/395,657 patent/US20240234539A9/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| US11367779B2 (en) | 2022-06-21 |
| US20240128353A1 (en) | 2024-04-18 |
| US20220278222A1 (en) | 2022-09-01 |
| CN112652659A (zh) | 2021-04-13 |
| US11894441B2 (en) | 2024-02-06 |
| US20210111267A1 (en) | 2021-04-15 |
| US20240136423A1 (en) | 2024-04-25 |
| CN112652659B (zh) | 2024-02-13 |
| US20240234539A9 (en) | 2024-07-11 |
| US20220278223A1 (en) | 2022-09-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN112531025B (zh) | 高电子迁移率晶体管 | |
| US12027604B2 (en) | High electron mobility transistor and method for fabricating the same | |
| US20240128353A1 (en) | High electron mobility transistor and method for fabricating the same | |
| US12040392B2 (en) | High electron mobility transistor and method for fabricating the same | |
| US12107157B2 (en) | High electron mobility transistor and method for fabricating the same | |
| US20230378314A1 (en) | High electron mobility transistor and method for fabricating the same | |
| TW202329462A (zh) | 高電子遷移率電晶體及其製作方法 | |
| EP4328976A1 (en) | High electron mobility transistor and method for fabricating the same | |
| CN117672854A (zh) | 一种制作高电子迁移率晶体管的方法 | |
| CN117198877A (zh) | 高电子迁移率晶体管及其制作方法 | |
| CN117524871A (zh) | 高电子迁移率晶体管及其制作方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |