CN117991063A - Test structure and test method - Google Patents

Abstract

A test structure and a test method, the test structure includes: the first test group and the second test group which are electrically isolated from each other comprise a plurality of identical and repeated unit devices, and part of unit devices in the second test group are used as devices to be tested; the plurality of unit device phases in the first test group are electrically connected, so that a first characteristic parameter value obtained after the first test group tests is the sum of characteristic parameter values of all the unit devices; and the rest unit devices except the device to be tested in the second test group are electrically connected, so that the second characteristic parameter value obtained after the second test group tests is the sum of the characteristic parameter values of all unit devices except the device to be tested, and the device to be tested is electrically isolated from the rest unit devices. The embodiment of the invention adopts two groups of test groups, reduces the influence of the characteristic parameter value of the single unit device on the average value, and reduces or eliminates the influence of parasitic effect on the test result, thereby improving the accuracy of the test result of the characteristic parameter value of the single unit device.

Description

Test structure and test method

Technical Field

The embodiment of the invention relates to the field of semiconductor manufacturing, in particular to a test structure and a test method.

Background

In the semiconductor field, with the update iteration of technology, devices are mostly developed towards small dimensions, and accurate characterization of device characteristic parameters is increasingly important.

For some devices, some characteristic parameters (such as device leakage, small-sized MIM capacitor) and the like have exceeded the lower test accuracy limit of the test equipment, so that accurate characteristic parameter values cannot be obtained through measurement, which presents new challenges for device testing in the semiconductor field.

Disclosure of Invention

The embodiment of the invention solves the problem of providing a test structure and a test method, and improves the accuracy of test results.

To solve the above problems, an embodiment of the present invention provides a test structure, including: the first test group and the second test group are electrically isolated from each other, each of the first test group and the second test group comprises a plurality of identical and repeated unit devices, and part of unit devices in the second test group are used as devices to be tested; in the first test group, a plurality of unit devices are electrically connected, so that a first characteristic parameter value obtained after the first test group tests is the sum of characteristic parameter values of all the unit devices; and in the second test group, the rest unit devices except the device to be tested are electrically connected, so that the second characteristic parameter value obtained after the second test group tests is the sum of the characteristic parameter values of all unit devices except the device to be tested, and the device to be tested is electrically isolated from the rest unit devices.

Optionally, each unit device includes a test end adapted to load a corresponding test signal, and each test end of the device under test is floating.

Optionally, in the first test group, a plurality of the unit devices are connected in parallel; in the second test group, the remaining unit devices except the device under test are connected in parallel.

Optionally, each unit device includes a test terminal adapted to load a corresponding test signal; in the first test group, the same test terminals of a plurality of unit devices are connected in parallel; in the second test group, the same kind of test terminals of the rest unit devices except the device to be tested are connected in parallel, and each test terminal of the device to be tested is floated.

Optionally, the unit device is a MOS device, and the test terminal includes a gate terminal, a source terminal, a drain terminal, and a body terminal.

Optionally, each unit device includes a test terminal adapted to load a corresponding test signal; the test structure further comprises: and the interconnection structure is electrically connected with corresponding testing terminals of the rest unit devices except the device to be tested, wherein the corresponding testing terminals are connected through the interconnection structure in any one of the first testing group and the second testing group.

Optionally, the interconnect structure includes one or more of a contact plug and a metal interconnect layer.

Optionally, the number of the parts is 1.

Optionally, the arrangement of the unit devices in the first test group and the second test group is the same.

Optionally, in any one or both of the first test group and the second test group, a plurality of the unit devices included are arranged in an array.

Optionally, the cell device type includes a MOS device, a capacitor device, or a resistor device.

Optionally, in any one of the first test group and the second test group, the number of unit devices satisfies: the characteristic parameter value of the whole of the plurality of parallel unit devices is larger than or equal to the lower limit of the test precision of the test equipment.

Correspondingly, the embodiment of the invention also provides a testing method, which comprises the following steps: providing the test structure of the embodiment of the invention; under the same test parameters, the first test group and the second test group are respectively tested to obtain corresponding first characteristic parameter values and second characteristic parameter values; and obtaining a difference value of the first characteristic parameter value and the second characteristic parameter value, and obtaining the characteristic parameter value of the single unit device based on the difference value, wherein the characteristic parameter value of the single unit device is equal to the ratio of the difference value to the number of the devices to be tested.

Optionally, each unit device includes a test terminal adapted to load a corresponding test signal, in the first test group, homogeneous test terminals of a plurality of unit devices are connected in parallel, in the second test group, homogeneous test terminals of the remaining unit devices except for the device to be tested are connected in parallel, and each test terminal of the device to be tested is floating, wherein the test terminal of the remaining unit devices except for the device to be tested is used as an effective test terminal; the step of testing the first test set and the second test set respectively comprises the following steps: and floating each test end of the device to be tested, and loading corresponding test signals to the effective test ends in the first test group and the second test group under the same test parameters so as to obtain corresponding first characteristic parameter values and second characteristic parameter values.

Optionally, the first test group and the second test group are tested simultaneously under the same test conditions, wherein the test conditions comprise the test parameters and the test environment.

Compared with the prior art, the technical scheme of the embodiment of the invention has the following advantages:

The test structure provided by the embodiment of the invention comprises a first test group and a second test group, wherein the first test group and the second test group both comprise a plurality of identical and repeated unit devices, a part of unit devices in the second test group are used as devices to be tested, wherein the plurality of unit devices in the first test group are electrically connected, so that a first characteristic parameter value obtained after the first test group is the sum of characteristic parameter values of all unit devices, in the second test group, the rest unit devices except the devices to be tested are electrically connected, so that a second characteristic parameter value obtained after the second test group is the sum of characteristic parameter values of all unit devices except the devices to be tested, the devices to be tested are electrically isolated from the rest unit devices, and then the first characteristic parameter value is in the first test group, and similarly, after the second test group is tested to obtain a corresponding second characteristic parameter value, the second characteristic parameter value is the characteristic parameter value of the whole device formed by the rest unit devices except the device to be tested in the second test group, so that the characteristic parameter values of the whole device corresponding to the first test group and the second test group can be larger than or equal to the lower test precision limit of the test equipment, the lower test precision limit of the test equipment can be broken through, smaller characteristic parameter values can be measured, the accuracy of the first characteristic parameter value and the second characteristic parameter value is correspondingly improved, and the characteristic parameter value of a single unit device can be obtained based on the difference value of the first characteristic parameter value and the second characteristic parameter value, the characteristic parameter value of the single unit device is equal to the ratio of the difference value to the number of the devices to be tested; compared with the scheme that only one test group is adopted and the ratio of the characteristic parameter value of the whole device of the test group to the number of unit devices is used as the characteristic parameter value of a single unit device, the embodiment of the invention adopts two groups of test groups, and part of the unit devices in the second test group are used as the devices to be tested, so that the number of the unit devices contributing to the difference value of the first characteristic parameter value and the second characteristic parameter value is smaller, the influence of the difference value on the characteristic parameter value of the individual unit device is reduced, and the influence of the characteristic parameter value of the single unit device on the average value is correspondingly reduced; in addition, the first test group and the second test group both comprise a plurality of identical and repeated unit devices, for the second test group, except that the device to be tested is electrically isolated from the rest unit devices, the rest parts are identical to the first test group, and after the difference value is calculated, the influence of parasitic effect on the test result can be reduced or eliminated; in summary, the test structure provided by the embodiment of the invention is beneficial to improving the accuracy of the test result of the characteristic parameter value of the single unit device.

In an alternative, each unit device includes a test terminal adapted to load a corresponding test signal, and the test structure further includes: the interconnection structure is electrically connected with corresponding test terminals of the rest unit devices except the device to be tested, and the corresponding test terminals are connected through the interconnection structure in any one of the first test group and the second test group; in the second test group, except that each test end of the device to be tested is not connected with the interconnection structure, the rest part is the same as the first test group, which is beneficial to minimizing the difference between the first test group and the second test group, thereby reducing the influence of other influencing factors on the final test result.

In the alternative, the number of the parts is 1, that is, the number of the devices to be tested is 1, and accordingly, the difference between the characteristic parameter values of the whole devices of the first test group and the second test group is the characteristic parameter value of the single unit device, so that the difference between the characteristic parameter values of the two test groups is not influenced by the characteristic parameter values of the individual unit devices, the influence of the characteristic parameter values of the single unit device on the characteristic parameter values of other unit devices is further reduced correspondingly, that is, the influence of the characteristic parameter values of the single unit device on the average value is eliminated, and further, the accuracy of the test result of the characteristic parameter values of the single unit device is further improved.

Drawings

FIG. 1 is a schematic illustration of a test structure;

FIG. 2 is a schematic diagram of one embodiment of a test structure of the present invention;

FIG. 3 is a flow chart of an embodiment of the testing method of the present invention.

Detailed Description

As known from the background art, for some devices, the values of some characteristic parameters (such as device leakage, small-sized MIM capacitor, etc.) are small, and the lower limit of the test accuracy of the test equipment is exceeded, so that the accurate characteristic parameter values cannot be obtained through measurement.

In order to ameliorate the problem of the characteristic parameter exceeding the lower test accuracy limit of the test equipment, a test structure is required to characterize the characteristic parameter of an individual device. Referring to fig. 1 in combination, fig. 1 is a schematic diagram of a test structure.

The test structure 50 includes a plurality of identical and repeating unit devices 55, the plurality of unit devices 55 being connected in parallel.

For example, taking the unit device 55 as an example of a MOS device, the MOS device includes a Gate (Gate) terminal, a Source (Source) terminal, a Drain (Drain) terminal, and a Bulk (Bulk) terminal, the Gate terminals of the plurality of unit devices 55 are connected in parallel, the Source terminals are connected in parallel, the Drain terminals are connected in parallel, and the Bulk terminals are also connected in parallel.

The plurality of unit devices 55 are connected in parallel so that the characteristic parameter value of the entire device of the test structure 50 can be measured, that is, the test structure 50 is tested such that the obtained characteristic parameter value is the sum of the characteristic parameter values of all the unit devices 55, so that the characteristic parameter value obtained by testing the test structure 50 can reach the lower test accuracy limit of the test apparatus. Accordingly, since the plurality of unit devices 55 are identical and repeated, the characteristic parameter value corresponding to the single unit device 55 can be obtained by dividing the characteristic parameter value obtained by testing the test structure 50 by the unit device 55.

However, since the characteristic parameter value corresponding to the single unit device 55 is a ratio of the sum value of the characteristic parameter values of all the unit devices 55 to the number thereof, in other words, the characteristic parameter value corresponding to the single unit device 55 is an average value of the characteristic parameter values of all the unit devices 55, the sum value of the characteristic parameter values is affected by the actual characteristics of any unit device 55, such as an abnormality of an individual unit device 55, which results in an abnormality of the sum value of the characteristic parameter values, and accordingly, the calculated characteristic parameter value corresponding to the single unit device 55 cannot truly reflect the actual performance of the single unit device 55, thereby resulting in lower accuracy of the test result of the characteristic parameter value of the single unit device 55.

Therefore, the accuracy of the test results on the characteristic parameter values of the individual unit devices still needs to be improved, and a new test structure is needed to be obtained, so that the characteristic parameter values of the individual devices can be more accurately represented.

In order to solve the technical problem, an embodiment of the present invention provides a test structure, including: the first test group and the second test group are electrically isolated from each other, each of the first test group and the second test group comprises a plurality of identical and repeated unit devices, and part of unit devices in the second test group are used as devices to be tested; in the first test group, a plurality of unit devices are electrically connected, so that a first characteristic parameter value obtained after the first test group tests is the sum of characteristic parameter values of all the unit devices; and in the second test group, the rest unit devices except the device to be tested are electrically connected, so that the second characteristic parameter value obtained after the second test group tests is the sum of the characteristic parameter values of all unit devices except the device to be tested, and the device to be tested is electrically isolated from the rest unit devices.

In the embodiment of the invention, the first test group and the second test group which respectively comprise a plurality of identical and repeated unit devices are beneficial to ensuring that the characteristic parameter values corresponding to the first test group and the second test group can be larger than or equal to the lower limit of the test precision of the test equipment, the lower limit of the test precision of the test equipment can be broken through, so that smaller characteristic parameter values can be measured, the accuracy of the first characteristic parameter value and the second characteristic parameter value is correspondingly improved, and the characteristic parameter value of a single unit device can be obtained based on the difference value of the first characteristic parameter value and the second characteristic parameter value, wherein the characteristic parameter value of the single unit device is equal to the ratio of the difference value to the number of the devices to be tested; in addition, compared with the scheme that only one test group is adopted and the ratio of the characteristic parameter value of the whole device of the test group to the number of unit devices is adopted as the characteristic parameter value of a single unit device, the embodiment of the invention adopts two groups of test groups, and part of the unit devices in the second test group are adopted as the devices to be tested, so that the number of the unit devices contributing to the difference value of the first characteristic parameter value and the second characteristic parameter value is smaller, the influence of the difference value on the characteristic parameter value of the individual unit device is reduced, and the influence of the characteristic parameter value of the single unit device on the average value is correspondingly reduced; in addition, the first test group and the second test group both comprise a plurality of identical and repeated unit devices, for the second test group, except that the device to be tested is electrically isolated from the rest unit devices, the rest parts are identical to the first test group, and after the difference value is calculated, the influence of parasitic effect on the test result can be reduced or eliminated; in summary, the test structure provided by the embodiment of the invention is beneficial to improving the accuracy of the test result of the characteristic parameter value of the single unit device.

In order that the above objects, features and advantages of embodiments of the invention may be readily understood, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings.

FIG. 2 is a schematic diagram of an embodiment of a test structure according to the present invention. Wherein fig. 2 (a) is a schematic diagram of an embodiment of a first test group in the test structure, and fig. 2 (b) is a schematic diagram of an embodiment of a second test group in the test structure.

The test structure comprises: a first test group 100 and a second test group 200 electrically isolated from each other, each of the first test group 100 and the second test group 200 including a plurality of identical and repeated unit devices 300, a part of the unit devices 300 in the second test group 200 being devices under test 210; wherein, in the first test group 100, a plurality of unit devices 300 are electrically connected, so that a first characteristic parameter value obtained after the first test group 100 is tested is a sum of characteristic parameter values of the respective unit devices 300; in the second test group 200, the remaining unit devices 300 except for the device under test 210 are electrically connected, so that the second characteristic parameter value obtained after the second test group 200 is the sum of the characteristic parameter values of the respective unit devices 300 except for the device under test 210, and the device under test 210 is electrically isolated from the remaining unit devices 300.

The test structure is suitable for obtaining the characteristic parameter values corresponding to the first test group and the second test group through testing so as to obtain the characteristic parameter value of the single unit device according to the ratio of the difference value of the characteristic parameter values of the first test group and the second test group to the number of the devices to be tested.

In this embodiment, the first characteristic parameter value is a characteristic parameter value of an overall device formed by all unit devices 300 in the first test group 100, and similarly, the second characteristic parameter value is a characteristic parameter value of an overall device formed by the remaining unit devices 300 except for the device under test 210 in the second test group 200, so that the characteristic parameter values corresponding to the first test group 100 and the second test group 200 can be greater than or equal to the lower limit of the test precision of the test equipment, and the accuracy of the first characteristic parameter value and the second characteristic parameter value is correspondingly improved, so that the characteristic parameter value of a single unit device 300 can be obtained based on the difference value of the first characteristic parameter value and the second characteristic parameter value, and the characteristic parameter value of the single unit device 300 is equal to the ratio of the difference value to the number of the devices under test 210.

If only one test group is adopted and the ratio of the characteristic parameter value of the whole device of the test group to the number of unit devices is used as the characteristic parameter value of a single unit device, all unit devices contribute to the characteristic parameter value of the whole device, but in this embodiment, two test groups are adopted and a part of the unit devices 300 in the second test group 200 are used as the devices under test 210, the difference between the first characteristic parameter value and the second characteristic parameter value is the characteristic parameter value of the whole device under test 210, in other words, the number of unit devices 300 contributing to the difference is smaller, so that the influence of the difference by the characteristic parameter value of the individual unit devices 300 is reduced, and the influence of the characteristic parameter value of the single unit device 300 by an average value is correspondingly reduced.

In addition, since the first test group 100 and the second test group 200 each include a plurality of identical and repeated unit devices 300, the structures of the unit devices 300 are identical, in other words, for the second test group 200, except for the electrical isolation between the device under test 210 and the remaining unit devices 300, the rest is identical to the first test group 100, and after calculating the difference, the influence of the parasitic effect on the test result can be reduced or eliminated.

In summary, the test structure provided by the embodiment of the invention is beneficial to improving the accuracy of the test result of the characteristic parameter value of the single unit device.

It should be noted that, as the device size is continuously reduced, the performance of the single unit device 300 is greatly fluctuated due to the limitation of the manufacturing process (for example, fluctuated due to the manufacturing process), so that the difference between the first characteristic parameter value and the second characteristic parameter value is used to calculate the characteristic parameter value of the single unit device 300, so that the effect of reducing the influence of the average value on the characteristic parameter value of the single unit device 300 is better.

In this embodiment, in the second test group 200, the device under test 210 is electrically isolated from the remaining unit devices 300, and after the second test group 200 is tested, the obtained second characteristic parameter value does not include the characteristic parameter value of the device under test 210, and accordingly, the difference between the first characteristic parameter value and the second characteristic parameter value is the characteristic parameter value of the whole device under test 210. That is, when the number of devices under test 210 is one, the difference is the characteristic parameter value of the devices under test 210, that is, the characteristic parameter value of the single unit device 300, and when the number of devices under test 210 is multiple, the difference is the sum of the characteristic parameter values of the multiple devices under test 210.

Therefore, in order to make the difference between the first characteristic parameter value and the second characteristic parameter value non-zero, a part of the unit devices 300 in the second test group 200 are used as the devices under test 210. It is understood that the number of portions may be one or any number less than the total number of unit devices 300 in the second test group 200.

It should be noted that the first test set 100 and the second test set 200 each include a plurality of identical and repeated unit devices 300, which facilitates subsequent calculation of the characteristic parameter values of the individual unit devices 300.

In this embodiment, the unit device 300 includes a MOS device, a capacitor device, or a resistor device according to the test requirements. It will be appreciated that in other embodiments, the unit devices may be other types of devices, depending on the actual testing requirements.

As shown in fig. 2, as an example, the unit device 300 is a MOS device, and the test terminal includes a Gate (Gate) terminal 110, a Source (Source) terminal 130, a Drain (Drain) terminal 120, and a Bulk (Bulk) terminal 140.

In this embodiment, the test structure is adapted to perform a test by using a test apparatus (e.g., WAT apparatus), so as to improve the accuracy of the characteristic parameter values of the overall devices formed by all the unit devices 300 in the first test group 100 and the characteristic parameter values of the overall devices formed by the remaining unit devices 300 except the device under test 210 in the second test group 200, the number of unit devices 300 in any one of the first test group 100 and the second test group 200 satisfies: the characteristic parameter value of the entire plurality of parallel unit devices 300 is greater than or equal to the lower test accuracy limit of the test apparatus. Wherein, the lower limit of the test precision refers to: the minimum value of the characteristic parameter values that the test apparatus can detect, that is, when the characteristic parameter value is less than the lower test accuracy limit, it is difficult for the test apparatus to detect the characteristic parameter value of the unit device 300.

It should be noted that the individual unit devices 300 generally have target values of the characteristic parameters, and therefore, the number of unit devices 300 required can be estimated by the target values and the lower limit of the test accuracy of the test apparatus.

In the present embodiment, in the first test group 100, a plurality of the unit devices 300 are connected in parallel; in the second test group 200, the remaining unit devices 300 other than the device under test 210 are connected in parallel.

The unit devices 300 of the same test group are connected in parallel, so that the first characteristic parameter value obtained after the test of the first test group 100 is the sum of the characteristic parameter values of the respective unit devices, and the second characteristic parameter value obtained after the test of the second test group is the sum of the characteristic parameter values of the respective unit devices except the device to be tested.

Note that the electrical connection method of the unit devices in the same test group is not limited to parallel connection, as long as the test data of any one test group can be made equal to the sum of the characteristic parameter values of all the electrically connected unit devices in the test group.

In this embodiment, each unit device 300 includes a test terminal adapted to load a corresponding test signal, and each test terminal of the device under test 210 is floating (floating).

The test ends of the device under test 210 are floating, so as to avoid the influence of unnecessary influence factors on the final test result, that is, eliminate the influence factors as much as possible, and further improve the accuracy of the test result of the characteristic parameter values of the single unit device 300; in addition, since the device under test 210 does not need to be electrically connected to an external circuit, each test terminal of the device under test 210 is floated, and various interconnection structures for electrically connecting to the device under test 210 are omitted, which is also beneficial to reducing the complexity of wiring.

In this embodiment, in the first test group 100, the same-kind test terminals of the plurality of unit devices 300 are connected in parallel; in the second test group 200, the same kind of test terminals of the remaining unit devices 300 except for the device under test 210 are connected in parallel.

In the same test group, the same kind of test terminals are connected in parallel, thereby realizing the parallel connection of the plurality of unit devices 300 in the same test group.

Taking the type of the unit device 300 as a MOS device as an example, the test terminals include a gate terminal 110, a source terminal 130, a drain terminal 120 and a body terminal 140, the same kind of parallel connection of the test terminals means that: the gate terminals 110 are connected in parallel, the source terminals 130 are connected in parallel, the drain terminals 120 are connected in parallel, and the body terminals 140 are connected in parallel.

In a specific embodiment, the test structure further comprises: and an interconnection structure 150 electrically connected to respective test terminals of the remaining unit devices 300 except the device under test 210, wherein a parallel connection is achieved between the respective test terminals through the interconnection structure 150 in any one of the first test group 100 and the second test group 200.

Here, in the parallel connection between the respective test terminals through the interconnect structure 150, the respective test terminals refer to: a test terminal for making an electrical connection is required. In this embodiment, since the same kind of testing terminals are connected in parallel, the corresponding testing terminal is the same kind of testing terminal.

Except for the device under test 210, the electrical property of each test terminal is led out through an interconnection structure, so that the parallel connection between the same kind of test terminals is facilitated.

In the second test group 200, the rest is the same as the first test group 100 except that the test terminals of the device under test 210 are not connected to the interconnect structure 150, which is advantageous in minimizing the difference between the first test group 100 and the second test group 200, thereby reducing the influence of other influencing factors on the final test result, and in addition, the device under test 210 does not need to be electrically connected to an external circuit, so that the interconnect structure 150 is not provided on the device under test 210, thereby avoiding the influence of the unnecessary interconnect structure 150 on the final test result, and being advantageous in saving the process cost, while reducing the complexity of the wiring.

The interconnect structure 150 includes one or more of a contact plug and a metal interconnect layer, depending on the type of device under test 210.

In this embodiment, taking the device under test 210 as an example of a MOS device, the MOS device is a device formed by a front-end-of-line (FEOL) process, and therefore, the interconnect structure 150 includes a contact plug.

The contact plugs are formed earlier than the metal interconnect layer, so that no contact plugs are provided on the device under test 210, which is advantageous in reducing the impact of the interconnect structure 150 on the final test result and maximally reducing the complexity of the wiring.

It should be noted that, in the case where the interconnect structure 150 includes a contact hole plug, a metal interconnect layer in a back-end-of-line (BEOL) process may also be connected to a contact hole plug corresponding to a corresponding test terminal (for example, the same test terminal) to be connected, so as to implement connection between the corresponding test terminals.

In this embodiment, the arrangement of the unit devices 300 in the first test group 100 and the second test group 200 is the same, so that the influence of different arrangement modes on the final test result is avoided, and in the second test group 200, the rest of the unit devices are identical to the first test group 100 except that the electrical property of the device under test 210 is not connected, which is beneficial to reducing the complexity of layout design and eliminating the influence caused by the rest of the structural differences of the first test group 100 and the second test group 200.

In the present embodiment, in the second test group 200, the number of the portions is 1, that is, the number of the devices under test 210 is 1. Accordingly, the difference between the characteristic parameter values of the respective integral devices of the first test group 100 and the second test group 200 is the characteristic parameter value of the single unit device 300, so that the difference between the characteristic parameter values of the two test groups is not affected by the characteristic parameter values of the individual unit devices, and accordingly, the influence of the characteristic parameter values of the single unit device 300 on the characteristic parameter values of other unit devices 300 is further reduced, that is, the influence of the average value on the calculated characteristic parameter values of the single unit device 300 is eliminated, and further, the accuracy of the test result of the characteristic parameter values of the single unit device 300 is further improved, and the performance of the single unit device 300 can be reflected more truly.

In this embodiment, in any one or both of the first test set 100 and the second test set 200, the plurality of unit devices 300 are arranged in an array, which makes the arrangement of each unit device 300 regular, accordingly reduces the complexity of layout design, and the arrangement in an array is beneficial to compact the arrangement of the plurality of unit devices 300, and is beneficial to saving the occupied area of the first test set 100 and the second test set 200, thereby meeting the development requirement of chip miniaturization.

As an example, the device under test 210 is located at a center position of the array corresponding to the second test set 200, but is not limited to being located at a center position. In other embodiments, the device under test may be located at other positions of the array corresponding to the second test set.

Correspondingly, the embodiment of the invention also provides a testing method. Referring to fig. 3, fig. 3 is a flowchart of an embodiment of the testing method of the present invention.

Referring to fig. 2 and 3 in combination, step S1 is performed to provide the test structure (not labeled) according to the embodiment of the present invention.

In this embodiment, the test structure includes: a first test group 100 and a second test group 200 electrically isolated from each other, each of the first test group 100 and the second test group 200 including a plurality of identical and repeated unit devices 300, a part of the unit devices 300 in the second test group 200 being the device under test 210; wherein, in the first test group 100, a plurality of unit devices 300 are electrically connected, so that a first characteristic parameter value obtained after the first test group 100 is tested is a sum of characteristic parameter values of the respective unit devices 300; in the second test group 200, the remaining unit devices 300 except for the device under test 210 are electrically connected, so that the second characteristic parameter value obtained after the test of the second test group 200 is the sum of the characteristic parameter values of the respective unit devices 300 except for the device under test 210, and the device under test 210 is electrically isolated from the remaining unit devices.

Specifically, in the first test group 100, a plurality of unit devices 300 are connected in parallel; in the second test group 200, the remaining unit devices 300 other than the device under test 210 are connected in parallel.

The specific description of the test structure may be combined with the related description of fig. 2 and the foregoing embodiment, and will not be repeated herein.

With continued reference to fig. 3, step S2 is performed to test the first test set 100 and the second test set 200 under the same test parameters, respectively, so as to obtain corresponding first characteristic parameter values and second characteristic parameter values.

The characteristic parameter values of the individual cell devices 300 are subsequently obtained based on the difference between the first characteristic parameter value and the second characteristic parameter value.

In this embodiment, the first test set 100 and the second test set 200 each include a plurality of identical and repeated unit devices 300, so that the test needs to be performed under the same test parameters to obtain the test result value of the same characteristic parameter, and this also causes the difference between the first characteristic parameter value and the second characteristic parameter value due to the difference between the number of unit devices 300 participating in the test, so that the characteristic parameter value of the single device under test 210 can be obtained by calculating the ratio of the difference to the number of the devices under test 210.

Specifically, the first test group 100 and the second test group 200 are tested using corresponding test equipment. For example, the inspection apparatus may be a WAT (WAFER ACCEPTANCE TEST ) apparatus.

By adopting the foregoing test structure, the characteristic parameter values measured by the first test group 100 and the second test group 200 respectively are increased, that is, the first characteristic parameter value is the sum of the characteristic parameter values of the plurality of unit devices 300 in the first test group 100, and the second characteristic parameter value is the sum of the characteristic parameter values of the plurality of unit devices 300 in the second test group 200, so that the characteristic parameter values corresponding to the first test group and the second test group can be greater than or equal to the lower test precision limit of the test device, the lower test precision limit of the test device can be broken through, and therefore smaller characteristic parameter values can be measured, and the accuracy of the first characteristic parameter value and the second characteristic parameter value is correspondingly improved.

In this embodiment, the first test set 100 and the second test set 200 are electrically isolated from each other, and thus, the first characteristic parameter value and the second characteristic parameter value corresponding to each of the first test set 100 and the second test set 200 can be obtained.

In the present embodiment, a test on a specific characteristic parameter is performed according to the type of the unit device 300. Taking the unit device 300 as an example of a MOS device, the specific characteristic parameter may be leakage current.

In other embodiments, when the unit device is a capacitive device, the specific characteristic parameter may also be capacitance. For example, the capacitive device may be a MIM (Metal Insulator Metal, metal-insulator-metal) capacitor.

In this embodiment, each unit device 300 includes a test terminal adapted to load a corresponding test signal, in the first test group 100, identical test terminals of a plurality of unit devices 300 are connected in parallel, in the second test group 200, identical test terminals of the remaining unit devices 300 except for the device under test 210 are connected in parallel, and each test terminal of the device under test 210 is floating (floating), where the test terminal of the remaining unit devices 300 except for the device under test 210 is used as an effective test terminal. Accordingly, the steps of testing the first test set 100 and the second test set 200 respectively include: each test end of the device under test 210 is floated, and under the same test parameters, corresponding test signals are loaded to the effective test ends in the first test set 100 and the second test set 200 respectively, so as to obtain corresponding first characteristic parameter values and second characteristic parameter values.

Taking the type of the unit device 300 as a MOS device as an example, the test terminals include a gate terminal 110, a source terminal 130, a drain terminal 120 and a body terminal 140, and accordingly, the same test signal is loaded on each gate terminal 110, the same test signal is loaded on each source terminal 130, the same test signal is loaded on each drain terminal 120 and the same test signal is loaded on each body terminal 140, so that each unit device 300 participating in the test is tested under the same test parameters.

For example, taking the test leakage current as an example, the power supply Voltage (VDD) signal is applied to each drain terminal 120, the zero potential signal is applied to each gate terminal 110, the zero potential signal is applied to each source terminal 130, and the zero potential signal is applied to each body terminal 140.

In one embodiment, to eliminate as much as possible the effect of the difference in test conditions on the test results, the first test set 100 and the second test set 200 are tested simultaneously under the same test conditions, including test parameters and test environments.

For example, the test parameter may be a loaded electrical signal, or other type of test parameter. Wherein the loading electrical signal can be voltage or current.

For example, the test environment may include one or more of an ambient temperature and an ambient humidity, and may also include other types of parameters of the test environment.

With continued reference to fig. 3, step S3 is performed to obtain a difference between the first characteristic parameter value and the second characteristic parameter value, and obtain a characteristic parameter value of a single unit device 300 based on the difference, where the characteristic parameter value of the single unit device 300 is equal to a ratio of the difference to the number of devices under test 210.

Compared with the scheme that only one test group is adopted and the ratio of the characteristic parameter value of the whole device of the test group to the number of unit devices is adopted as the characteristic parameter value of a single unit device, the embodiment adopts two test groups, wherein the difference between the two test groups is only that the number of unit devices 300 participating in the test is different, thereby reducing the influence of the difference between the first characteristic parameter value and the second characteristic parameter value on the characteristic parameter value of the individual unit device 300 and correspondingly reducing the influence of the average value on the characteristic parameter value of the single unit device 300; in addition, the first test group 100 and the second test group 200 each include a plurality of identical and repeated unit devices 300, and for the second test group 200, the rest of the unit devices to be tested 210 are completely identical to the first test group 100 except for the rest of the unit devices 300, so that after calculating the difference, the influence of the parasitic effect on the test result can be reduced or eliminated, and therefore, the test structure is tested, which is beneficial to improving the accuracy of the test result of the characteristic parameter value of the single unit device 300.

In this embodiment, in the second test group 200, the number of devices under test 210 is 1; accordingly, in the step of obtaining the characteristic parameter value of the single unit device 300 based on the difference value, the difference value is taken as the characteristic parameter value of the single unit device.

The difference between the characteristic parameter values of the respective integral devices of the first test group 100 and the second test group 200 is the characteristic parameter value of the single unit device 300, so that the difference between the characteristic parameter values of the two test groups is not affected by the characteristic parameter values of the individual unit devices 300, thereby eliminating the influence of the average value on the characteristic parameter values of the single unit device 300 obtained by calculation, further improving the accuracy of the test result of the characteristic parameter values of the single unit device 300, and being capable of reflecting the performance of the single unit device 300 more truly.

Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.

Claims (15)

1. A test structure, comprising:

The first test group and the second test group are electrically isolated from each other, each of the first test group and the second test group comprises a plurality of identical and repeated unit devices, and part of unit devices in the second test group are used as devices to be tested; wherein,

In the first test group, a plurality of unit devices are electrically connected, so that a first characteristic parameter value obtained after the first test group is tested is the sum of characteristic parameter values of all the unit devices;

And in the second test group, the rest unit devices except the device to be tested are electrically connected, so that the second characteristic parameter value obtained after the second test group tests is the sum of the characteristic parameter values of all unit devices except the device to be tested, and the device to be tested is electrically isolated from the rest unit devices.

2. The test structure of claim 1, wherein each of said unit devices includes a test terminal adapted to load a corresponding test signal, each test terminal of said device under test being floating.

3. The test structure of claim 1, wherein in said first test group, a plurality of said unit devices are connected in parallel;

in the second test group, the remaining unit devices except the device under test are connected in parallel.

4. A test structure as claimed in claim 3, wherein each of said unit devices comprises a test terminal adapted to load a respective test signal;

In the first test group, the same test terminals of a plurality of unit devices are connected in parallel;

In the second test group, the same kind of test terminals of the rest unit devices except the device to be tested are connected in parallel, and each test terminal of the device to be tested is floated.

5. The test structure of claim 4, wherein the cell device is of the type MOS device and the test terminal comprises a gate terminal, a source terminal, a drain terminal, and a body terminal.

6. A test structure as claimed in claim 1 or 4, wherein each of said unit devices comprises a test terminal adapted to load a respective test signal;

The test structure further comprises: and the interconnection structure is electrically connected with corresponding testing terminals of the rest unit devices except the device to be tested, wherein the corresponding testing terminals are connected through the interconnection structure in any one of the first testing group and the second testing group.

7. The test structure of claim 6, wherein the interconnect structure comprises one or more of a contact hole plug and a metal interconnect layer.

8. The test structure of claim 1, wherein the number of portions is 1.

9. The test structure of claim 1, wherein the arrangement of unit devices in the first test group and the second test group are identical.

10. The test structure of claim 1, wherein a plurality of the unit devices included in either or both of the first test group and the second test group are arranged in an array.

11. The test structure of claim 1, wherein the type of cell device comprises a MOS device, a capacitive device, or a resistive device.

12. The test structure of claim 1, wherein in any one of the first test group and the second test group, the number of unit devices satisfies: the characteristic parameter value of the whole of the plurality of parallel unit devices is larger than or equal to the lower limit of the test precision of the test equipment.

13. A method of testing, comprising:

Providing a test structure according to any one of claims 1 to 12;

Testing the first test group and the second test group under the same test parameters to obtain corresponding first characteristic parameter values and second characteristic parameter values;

And obtaining a difference value of the first characteristic parameter value and the second characteristic parameter value, and obtaining the characteristic parameter value of the single unit device based on the difference value, wherein the characteristic parameter value of the single unit device is equal to the ratio of the difference value to the number of the devices to be tested.

14. The test method according to claim 13, wherein each of the unit devices includes a test terminal adapted to load a corresponding test signal, the same test terminals of a plurality of the unit devices are connected in parallel in the first test group, the same test terminals of the remaining unit devices other than the device under test are connected in parallel in the second test group, the test terminals of the device under test are floated, and wherein the test terminals of the remaining unit devices other than the device under test are effective test terminals;

The step of testing the first test set and the second test set respectively comprises the following steps: and floating each test end of the device to be tested, and loading corresponding test signals to the effective test ends in the first test group and the second test group under the same test parameters so as to obtain corresponding first characteristic parameter values and second characteristic parameter values.

15. The test method of claim 13, wherein the first test set and the second test set are tested simultaneously under the same test conditions, the test conditions including the test parameters and test environments.