CN117877407A - Display device - Google Patents

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Publication number
CN117877407A
CN117877407A CN202410054715.9A CN202410054715A CN117877407A CN 117877407 A CN117877407 A CN 117877407A CN 202410054715 A CN202410054715 A CN 202410054715A CN 117877407 A CN117877407 A CN 117877407A
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CN
China
Prior art keywords
start voltage
voltage
data transmission
data
display device
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CN202410054715.9A
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Chinese (zh)
Inventor
丁乐文
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TCL China Star Optoelectronics Technology Co Ltd
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TCL China Star Optoelectronics Technology Co Ltd
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Priority to CN202410054715.9A priority Critical patent/CN117877407A/en
Publication of CN117877407A publication Critical patent/CN117877407A/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The application discloses a display device, including data line, grid drive circuit, a plurality of pixel and source drive circuit, source drive circuit includes a plurality of data transmission ends and a first initial voltage output end, first initial voltage output end and data transmission end electricity are connected, the data transmission end is configured and receives first initial voltage from first initial voltage output end in blanking interval, and export first initial voltage to the data line, and export the data signal of source drive circuit to a plurality of data lines in scanning time, the polarity of the first initial voltage that data transmission end exported to the data line in the blanking interval between N scanning time and N+1th scanning time is the same with the polarity of the data signal that source drive circuit transmitted to same data line in N+1th scanning time, the absolute value of the gray scale value that first initial voltage corresponds is greater than 0, N is positive integer. The method and the device can improve the charging rate of the display device.

Description

Display device
Technical Field
The application relates to the technical field of display, in particular to a display device.
Background
In the existing high-resolution display device, because more display data need to be transmitted, each row of pixels need to be charged in a shorter time, and the resistance-capacitance load (RC-loading) of a data line in a shorter scanning time is larger, so that the problem of insufficient charging of the pixels is caused, and the picture display of the display device is affected.
Therefore, a new solution is needed to solve the above-mentioned problems.
Disclosure of Invention
An object of the present application is to provide a display device to increase the charging rate of pixels, thereby avoiding the undercharging of pixels.
In order to solve the problems, the technical scheme of the application is as follows:
the application proposes a display device comprising:
a plurality of data lines;
a plurality of pixels arranged in an array, the plurality of pixels being electrically connected to the corresponding data lines; and
the source driving circuit is electrically connected with the plurality of data lines and comprises a plurality of data transmission ends and a first starting voltage output end, the plurality of data transmission ends are electrically connected with the plurality of data lines, the first starting voltage output end is electrically connected with the data transmission end, the data transmission end is configured to receive a first starting voltage from the first starting voltage output end in a blanking time period and output the first starting voltage to the data lines, and a data signal of the source driving circuit is output to the plurality of data lines in a scanning time period, the polarity of the first starting voltage output to the data lines by the data transmission end in the blanking time period between an N scanning time period and an N+1 scanning time period is the same as the polarity of the data signal transmitted to the same data line by the source driving circuit in the N+1 scanning time period, and the absolute value of a gray value corresponding to the first starting voltage is larger than 0, wherein N is a positive integer.
Optionally, in some embodiments of the present application, the absolute values of the gray scale values corresponding to the first starting voltages of the two adjacent blanking periods are the same.
Optionally, in some embodiments of the present application, an absolute value of the gray scale value corresponding to the first starting voltage is equal to a median value of the maximum gray scale value and the minimum positive integer gray scale value of the display device.
Optionally, in some embodiments of the present application, the source driving circuit further includes a second start voltage output terminal, the second start voltage output terminal is electrically connected to the data transmission terminal, the data transmission terminal is configured to receive a second start voltage from the second start voltage output terminal in the blanking period, and output the second start voltage to the data line, the first start voltage is opposite to the second start voltage in polarity, and in one blanking period, a voltage received by one data transmission terminal is the first start voltage or the second start voltage.
Optionally, in some embodiments of the present application, in a blanking period between an nth scan time and an n+1th scan time, a voltage received by one of the data transmission terminals is the first start voltage, and in a blanking period between an n+1th scan time and an n+2th scan time, a voltage received by the same data transmission terminal is the second start voltage.
Optionally, in some embodiments of the present application, the source driving circuit further includes a second start voltage output terminal, the second start voltage output terminal is electrically connected to the plurality of data transmission terminals, the second start voltage output terminal and the first start voltage output terminal are respectively electrically connected to two adjacent data transmission terminals, the data transmission terminal electrically connected to the second start voltage output terminal is configured to receive a second start voltage from the second start voltage output terminal in a blanking period, and output the second start voltage to the data line, and the polarity of the first start voltage is opposite to that of the second start voltage.
Optionally, in some embodiments of the present application, an absolute value of the gray scale value corresponding to the first starting voltage is the same as an absolute value of the gray scale value corresponding to the second starting voltage.
Optionally, in some embodiments of the present application, the source driving circuit further includes a plurality of redundant output terminals, and the first starting voltage output terminal is selected from at least one of the plurality of redundant output terminals.
Optionally, in some embodiments of the present application, the source driving circuit further includes a start voltage control module electrically connected to the first start voltage output terminal, the start voltage control module being configured to stop supplying the first start voltage to the first start voltage output terminal during a scan time, and to supply the first start voltage to the first start voltage output terminal during a blanking period.
Optionally, in some embodiments of the present application, an end time of the first start voltage is the same as a start time of the data signal.
In the application, the first starting voltage output end is set to transmit the first starting voltage to the data transmission end in advance in the blanking time period, so that the data line takes the first starting voltage as the reference voltage before formally transmitting the target data signal to the pixel, and the polarity of the first starting voltage is the same as that of the target data signal, and the absolute value of the gray level value corresponding to the first starting voltage is larger than 0, so that the first starting voltage is closer to the voltage of the target data signal than the voltage of 0 gray level, and the data transmission end can be directly switched from the first starting voltage to the gray level voltage of the target data signal when formally transmitting the target data signal to the pixel in the scanning time period, thereby reducing the lifting span of the voltage of the pixel in the charging period, improving the charging rate of the pixel and avoiding the condition of insufficient charging of the pixel.
Drawings
Fig. 1 is a schematic view of a display device according to a first embodiment of the present application;
FIG. 2 is a timing diagram of voltages of data lines of the present application;
FIG. 3 is a timing diagram of the voltage of a prior art data line;
FIG. 4 is a graph comparing voltage changes of the data line shown in FIG. 2 when charging the pixel in one scan time with voltage changes of the data line of the prior art when charging the pixel in one scan time;
FIG. 5 is a circuit diagram of the display device shown in FIG. 1;
fig. 6 is a circuit diagram of a display device according to a second embodiment of the present application;
fig. 7 is a circuit diagram of a display device of a third embodiment of the present application.
Detailed Description
The meaning of the terms used in the specification and claims corresponds to the meaning commonly understood by one of ordinary skill in the art to which the present application pertains. The terms used in the specification and claims are used for descriptive and understanding purposes only and are not intended to limit the application to the narrow interpretation of the specific terms used in the specification and claims.
Referring to fig. 1 to 2 and fig. 3 to 7, fig. 2 is a timing chart of a data signal sent by the source driving circuit 120 to a pixel. As shown in fig. 1 and 2, when the display device 100 displays an image, the gate driving circuit 110 (not shown) scans pixels in the display device 100 line by line, wherein a scanning interval between two adjacent lines of pixels is called a blanking (Horizontal Blanking, HBK) period. That is, the blanking period HBK is a very short period of time in which no data exists between the nth scanning time NGate and the (n+1) th scanning time n+1gate, N being a positive integer. The timing controller transmits display data, such as Red Green Blue (RGB) data, corresponding to each row of pixels to the source driving circuit 120 in an effective data period during each scan time Gate.
In the present application, the display gray scale number of the display device may be 64, 128, 256, 512 or 1024.
In the embodiment of the present application, 256 display gray levels of the display device are taken as an example to describe the technical scheme of the present application. In the present application, one gray level (-255 gray levels to +255 gray levels) corresponds to one gray level voltage, and the absolute value of one gray level corresponds to two gray level voltages having the same absolute value and opposite polarities. For example, -255 gray-scale voltage (-L255), that is, voltage corresponding to 255 gray-scale of negative polarity, -255 gray-scale voltage, the absolute value of gray-scale value corresponding to 255; a positive voltage corresponding to a positive 255 gray scale, which is a +255 gray scale voltage (+l255), and an absolute value of a gray scale value corresponding to the +255 gray scale voltage is 255; the absolute value of the gray scale value corresponding to the-127 gray scale voltage (-L127), namely the negative 127 gray scale voltage, -127 gray scale voltage is 127, the +127 gray scale voltage (+127) corresponds to the positive 127 gray scale, and the absolute value of the gray scale value corresponding to the +127 gray scale voltage is 127.
As shown in fig. 1 to 5, an embodiment of the present application provides a display device 100, where the display device 100 includes a plurality of data lines, a plurality of pixels arranged in an array, and a source driving circuit 120 electrically connected to the plurality of data lines.
The source driving circuit 120 includes a plurality of data transmission terminals electrically connected to the plurality of data lines and a first start voltage output terminal 966ch electrically connected to the data transmission terminals, the data transmission terminals configured to receive the first start voltage L from the first start voltage output terminal 966ch in a blanking period HBK H And the first starting voltage L H The data transmission end outputs a first start voltage L to the data lines in a blanking period NHBK between an N-th scan time NGate and an N+1th scan time N+1gate H The polarity of the data signal L transmitted to the same data line by the source driving circuit 120 in the (n+1) th scan time N+1Gate P Is the same in polarity and the first start voltage L H The absolute value of the corresponding gray scale value is larger than 0, wherein N is a positive integer. During a blanking period, a first start voltage L H A first start voltage (+L) of positive polarity H ) Or a first onset voltage of negative polarity (-L) H ) First starting voltage L H L of target data signal transmitted with data line P The polarity of (2) is the same.
As shown in fig. 1, in this embodiment, the display panel further includes a plurality of scan lines arranged along a first direction Y, and a gate driving circuit 110 electrically connected to the plurality of scan lines, the plurality of data lines being arranged along a second direction X intersecting the first direction Y, wherein one row of pixels is electrically connected to one scan line, one column of pixels is electrically connected to one data line, and the gate driving circuit 110 is configured to control the plurality of scan lines to sequentially output scan signals in a preset order during one frame to turn on the pixels row by row.
In this embodiment, n scan lines are arranged along the first direction Y, n is a positive integer greater than 4, m data lines are arranged along the second direction X, and m is a positive integer greater than 4.
Specifically, the source driving circuit 120 includes a plurality of output terminals 1ch to 966ch, wherein a part of the output terminals are data transmission terminals, and a part of the first start voltage output terminals 966ch. For example, in the present embodiment, 1ch to 960ch are data transmission terminals, 966ch is a first start voltage output terminal 966ch. Alternatively, in other embodiments, 6ch to 966ch may be the data transmission terminal, and 1ch may be the first start voltage output terminal 966ch.
Specifically, taking the first output end 1ch as a data transmission end and the ninth hundred sixty six output ends 966ch as first voltage output ends as examples, in describing the specific embodiment of the present application, the connection mode and the working mode of the other data transmission ends 2ch to 960ch are similar to those of the data transmission end 1 ch.
The data transmission terminal 1ch is electrically connected to a column of pixels, and the source driving circuit 120 outputs a data signal to the data line during the scan time Gate through the data transmission terminal. In the prior art, as shown in fig. 3, the data transmission terminal 1ch does not have a data signal in the blanking period HBK, the voltage of the data line is 0 gray scale voltage, and the data transmission terminal 1ch starts to cut from 0 gray scale voltage to the target gray scale voltage Lp of the pixel in the scan period Gate. As shown in fig. 2, the data transmission terminal 1ch of the present application is electrically connected to the first start voltage output terminal 966ch, and the first start voltage L is transmitted to the data transmission terminal 1ch in advance in the blanking period HBK H And a first start voltage L H The absolute value of the corresponding gray scale value is larger than 0, the voltage of the data transmission end before the start of the scanning time period Gate is the initial voltage L0 with the absolute value of the gray scale value larger than 0, the voltage of the data line is kept as L H Until the scan period Gate starts. When the scan period Gate starts, the Gate driving circuit 110 outputs a scan signal to the scan lines, the gates of one row of pixels are turned on, and the voltage of the data transmission terminal is equal to the first start voltage L H Is switched to the target gray-scale voltage Lp of the pixel.
The data transmission end changes the voltage of the data line into the first initial voltage L before the formal charge, i.e. before the scanning line of a row of pixels to be charged is opened H First starting voltage L H The corresponding gray level value is greater than 0, so the first threshold voltage L H Closer to the target of the pixel to be charged than the 0 gray scale voltage L0The gray scale voltage reduces the switching amplitude of the data line from the initial voltage to the target gray scale voltage, thereby improving the charging rate of the pixel.
Fig. 4 is a schematic diagram comparing the charging rate of the present application with that of the prior art, taking the absolute value of the target gray level value of the pixel as 255, the target gray level voltage of the pixel as +l255, the absolute value of the gray level value corresponding to the first starting voltage as 127, and the first starting voltage as +l127 as an example. As shown in fig. 4, in the conventional high-resolution display panel, the transmission amount of the data signal is large, and each row of pixels needs to be charged in a shorter time when the requirement of high refresh rate is satisfied, and the charging process of the pixels needs to pull up or pull down the voltage of the data line from the 0 gray scale voltage L0 to the target gray scale voltage (e.g., +l255) of the pixel during one frame, and the span between the target gray scale voltage of the pixel and the 0 gray scale voltage L0 is large when the target gray scale voltage of the pixel is large, so that the pixels will have a problem of charging shortage in a shorter scan time Gate.
The first start voltage L is transmitted to the data transmission terminal in advance in the blanking period HBK through the first start voltage output terminal 966ch H The data line is made to take the first start voltage +L127 as the reference voltage before formally transmitting the data signal to the pixel (i.e. the gate of the scanning line is opened), and the first start voltage L H The corresponding preset gray value is larger than 0, so that the reference voltage +L127 of the data line is closer to the voltage of the target data signal than the voltage L0 of 0 gray scale, the data transmission end can be directly switched from the first starting voltage +L127 to the gray scale voltage +L255 of the target data signal when formally transmitting the target data signal to the pixel in the scanning time Gate, the rising and falling span of the voltage of the pixel in the charging period is reduced, the charging rate of the pixel is improved, the shadow part in fig. 4 is the charging rate of the pixel improved by the application, the condition of insufficient charging of the pixel is avoided, the voltage of the data line is closer to the target gray scale voltage of the follow-up formal charging in the blanking time period, the data signal is charged into the pixel again in the formal charging period (namely at the beginning of the scanning time period Gate), and the wrong charging problem of the pixel can be effectively avoided.
In this embodiment, one data transmission terminal outputs data signals to one column of pixels through one data line, or one data transmission terminal may also be connected to a plurality of data lines through a demultiplexing circuit (Demux) to output data signals to a plurality of columns of pixels.
As shown in fig. 5, in the embodiment of the present application, the source driving circuit 120 includes a plurality of data transmission terminals 1ch to 960ch and a first start voltage output terminal 966ch, the plurality of data transmission terminals 1ch to 960ch are electrically connected to the same first start voltage output terminal 966ch, and the first start voltage output terminal 966ch outputs the same first start voltage L to the plurality of data transmission terminals 1ch to 960ch within one scan time Gate H 。
Or, the plurality of data transmission terminals 1ch to 960ch are respectively electrically connected to the plurality of first start voltage output terminals, and the plurality of first start voltage output terminals respectively supply the same or different first start voltages to the plurality of data transmission terminals 1ch to 960 ch.
In the present embodiment, the first threshold voltage L H The absolute value of the corresponding gray scale value is larger than 0 and smaller than the maximum target gray scale value of the pixel in the (n+1) th scanning time period.
In the present embodiment, the first threshold voltage L H The absolute value of the corresponding gray scale value is equal to the median value of the maximum gray scale value and the minimum positive integer gray scale value of the display device. When the display gray-scale number of the display device is 256, the maximum gray-scale value of the display device is 255, the minimum positive integer gray-scale value of the display device is 1, and the first starting voltage L H The absolute value of the corresponding gray-scale value is 127. When the display gray scale number of the display device is 64, the maximum gray scale value of the display device is 63, the minimum positive integer gray scale value of the display device is 1, and the first starting voltage L H The absolute value of the corresponding gray-scale value is 31. When the display gray scale number of the display device is 512, the maximum gray scale value of the display device is 511, the minimum positive integer gray scale value of the display device is 1, and the first starting voltage L H The absolute value of the corresponding gray-scale value is 255.
In this embodiment, the display gray scale number of the display device is 256, and the first start voltage L H Is 127 gray-scale voltage +L127 of positive polarity or 127 gray-scale voltage-L127 of negative polarity.
Specifically, when the data line transmits the data signal L to the data line within the (n+1) th scan time (n+1) Gate P When the positive gray scale voltage is applied, the first start voltage output terminal 966ch outputs the positive 127 gray scale voltage to the data transmission terminal, and the data signal L is transmitted from the data line to the data line within the n+1th scan time n+1gate P When the gray scale voltage is negative, the first start voltage output terminal 966ch outputs 127 gray scale voltages of negative polarity to the data transmission terminal.
First starting voltage L H The absolute value of the corresponding gray scale value is equal to the median value of the maximum gray scale value and the minimum positive integer gray scale value of the display device, namely the first starting voltage L H The corresponding gray scale value is the median of all the gray scale values (1 to 255) of the display device 100, and the first start voltage L can not be changed during the whole display period H Under the condition of (1), the method can adapt to the gray-scale voltage of the maximum gray-scale value and the gray-scale voltage of the minimum positive integer gray-scale value, thereby achieving the effect of better improving the charging rate.
In the present embodiment, the first start voltage L of two adjacent blanking periods H The corresponding gray scale value is kept unchanged, so that the operation pressure of the control chip of the display device 100 can be reduced, and the charging rate of the display device 100 can be improved only by arranging a first starting voltage output end 966ch on the display device 100, so that the problem of excessive wiring of the display device 100 is avoided.
In the present embodiment, the first start voltage L of two adjacent blanking periods H The polarity of (2) is the same, the display device 100 performs polarity inversion by adopting a frame-by-frame inversion method, and the data signals L of all pixels are within the same frame period P The polarity of the data signal LP of all pixels is the same as that of the data signal L of the previous frame in the next frame period P The number of first start voltage output terminals 966ch is reduced.
Or the data transmission end outputs the first start voltage L to the data line in the blanking period NHBK between the Nth scanning time NGate and the (n+1) th scanning time N+1Gate H Polarity of (3)The corresponding gray-scale value is an upward rounding or a downward rounding of the median of the maximum gray-scale value and the minimum gray-scale value of all the target gray-scale values output to one row of pixels by the source driving circuit 120 in the n+1th scan time n+1gate. Specifically, for example, the source driving circuit 120 needs to transmit positive 10 gray-scale voltages, 100 gray-scale voltages and 255 gray-scale voltages to 3 data lines electrically connected to one row of pixels at the third scan time Gate, and the first start voltage output end 966ch outputs positive 100 gray-scale voltages to the data transmission end during the blanking period HBK between the second scan time Gate and the third scan time Gate, and the 3 data lines receive positive 100 gray-scale voltages respectively to make the first start voltage L of the 3 data lines H All of the voltages are positive 100 gray scale voltages +L100, so that the Gate driving circuit 110 controls the third scan line to be turned on during the third scan time Gate, the gray scale voltages of the 3 scan lines are changed from positive 100 gray scale voltages +L100 to positive 10 gray scale voltages +L10, positive 100 gray scale voltages +L100, and positive 255 gray scale voltages +L255, respectively. By applying a first starting voltage L H The pixel gray voltage is set to be the median of the pixel gray voltage in formal charging, which is rounded downwards or upwards, so that the pixel charging device can adapt to the change of gray voltages with different sizes in each row of pixels, and achieves the effect of better improving the charging rate. This mode is applicable to a display device 100 in which the polarity inversion mode employs phase inversion by line, or a display device 100 in which the polarity inversion mode employs phase inversion by frame.
In this embodiment, the source driving circuit further includes a plurality of redundancy output terminals, and the first start voltage output terminal 966ch is selected from at least one of the plurality of redundancy output terminals. Specifically, the plurality of redundant output terminals of the source driving circuit 120 are output terminals that do not output the data signal of the effective display screen during the scan time Gate. In the conventional source driving circuit 120, the last five output terminals 962ch, 963ch, 964ch, 965ch and 966ch generally do not output valid pictures, and in this application, the redundant output terminal (dummy pin) of the source driving circuit 120 is used as the first start voltage output terminal 966ch, and no additional output pins are required.
In this embodiment, the first voltage output end 966ch is selected from the redundancy output end 966ch of the source driving circuit 120, the first voltage output end 966ch is shorted with the data transmission end 1ch, the first voltage output end 966ch is shorted with the data transmission end 2ch, the first voltage output end 966ch is shorted with the data transmission end 3ch, the first voltage output end 966ch is shorted with the data transmission end 4ch, the first voltage output end 966ch is shorted with the data transmission end 5ch, and so on, the first voltage output end 966ch is shorted with the data transmission end 960ch to prevent the output pins of the plurality of data transmission ends 1ch to 960ch from interfering with each other.
In this embodiment, the source driving circuit 120 includes a data output module 122, where the data output module 122 includes a shift register, a data latch, a level shifter, a digital-to-analog converter, and an output buffer, the output end of the shift register is electrically connected to the input end of the data register, the input end of the data register is electrically connected to the output end of the data latch, the output end of the data latch is electrically connected to the input end of the level shifter, the output end of the level shifter is electrically connected to the input end of the digital-to-analog converter, the output end of the digital-to-analog converter is electrically connected to the input end of the output buffer, and the output buffer outputs data signals to the data line through a plurality of data transmission ends.
In this embodiment, the source driving circuit 120 further includes a start voltage control module 121, the start voltage control module 121 is electrically connected to the data output module 122, the start voltage control module 121 is electrically connected to a first start voltage output end 966ch, the start voltage control module 121 is configured to disconnect the first start voltage output end 966ch from the data transmission end during the scan time Gate, and to conduct the first start voltage output end 966ch from the data transmission end during the blanking time period HBK to avoid the first start voltage L H Interfere with the data signal L during formal charge p . The start voltage control module 121 is a code or an operation instruction that can be preset in the source driving circuit 120, and the start voltage control module 121 is configured to control the first start voltage output terminal 966ch according to the data output condition of the data output module 122And outputting a first starting voltage.
In the present embodiment, the first threshold voltage L H The end time of (a) is the same as the start time of the data signal, i.e. the data signal is from the first start voltage L H The end time of (1) is changed to the data signal LP, so that the voltage variation amplitude of the data signal LP can be reduced in the scan time Gate.
As shown in fig. 6, in the second embodiment of the present application, the second embodiment is similar to the first embodiment, and the second embodiment and the first embodiment can be combined, and the second embodiment is different from the first embodiment in that:
the source driving circuit 120 further includes a second start voltage output terminal 965ch, the second start voltage output terminal 965ch being electrically connected to a data transmission terminal configured to receive the second start voltage L from the second start voltage output terminal 965ch in the blanking period HBK H2 And outputting a second start voltage to the data line, a first start voltage L H1 And a second initial voltage L H2 A data transmission terminal receives a first start voltage L in a blanking period HBK H1 Or the second initial voltage L H2 。
Specifically, one data transmission end is electrically connected to the first start voltage output end 966ch and the second start voltage output end 965ch, but in a blanking period HBK, one data transmission end receives the first start voltage L from the first start voltage output end 966ch H21 Or receives the second start voltage L from the second start voltage output end 965ch H2 That is, the same data line only transmits the first start voltage L within the same blanking period HBK H1 And a second initial voltage L H2 One of them.
Compared with the first embodiment, the second start voltage output end 965ch is added to enable the second start voltage output end 965ch to transmit the same voltage as the first start voltage L to the data transmission end H1 A second start voltage L of opposite polarity H2 The first and second start voltage output terminals 966ch and 965ch are coupled to each other, so that the polarity inversion method of the display device 100 can be adapted. For example, when displayingWhen the polarity inversion of the device 100 is a frame-by-frame inversion, the first voltage L is outputted from the first voltage output terminal 966ch during one frame period H1 The second start voltage output terminal 965ch does not output, and during the next frame, the first start voltage output terminal 966ch does not output, and the second start voltage output terminal 965ch outputs the second start voltage L H2 。
When the polarity inversion mode of the display device 100 is the phase alternating line, the first start voltage L is outputted from the first start voltage output terminal 966ch in a blanking period HBK H1 The second start voltage output terminal 965ch does not output, the first start voltage output terminal 966ch does not output, and the second start voltage output terminal 965ch outputs the second start voltage L in the next blanking period HBK H2 . That is, one data transmission terminal receives the first start voltage L in the blanking period NHBK between the N-th scan time NGate and the n+1th scan time n+1gate H1 And receives the second start voltage L in a blanking period N+1HBK between the (n+1) th scan time N+1Gate and the (n+2) th scan time Gate H2 。
When the polarity inversion mode of the display device 100 is the point-by-point inversion, the first start voltage output terminal 966ch outputs the first start voltage L in one blanking period NHBK H1 With a first start voltage L output in a next blanking period N+1HBK H1 The second start voltage output terminal 965ch outputs the second start voltage L in one blanking period NHBK H2 And the second start voltage L output in the next blanking period N+1HBK H2 Is opposite in polarity.
In the present embodiment, the first threshold voltage L H1 Corresponding gray scale value and second initial voltage L H2 The corresponding gray scale values are the same, so that the higher charging rate can be ensured when the gray scale voltage of the pixel is positive and negative.
As shown in fig. 7, in the third embodiment of the present application, the third embodiment is similar to the first embodiment, and the third embodiment is combined with the first embodiment, and the third embodiment is different from the first embodiment in that:
the source driving circuit 120 further includesA second start voltage output end 965ch, the second start voltage output end 965ch being electrically connected to the plurality of data transmission ends, the second start voltage output end 965ch and the first start voltage output end 966ch being respectively electrically connected to the adjacent two data transmission ends, the data transmission end electrically connected to the second start voltage output end 965ch being configured to receive the second start voltage L from the second start voltage output end 965ch in the blanking period HBK H2 And outputting a second start voltage to the data line, a first start voltage L H1 And a second initial voltage L H2 Is opposite in polarity.
In the present embodiment, the first threshold voltage L H1 And a second initial voltage L H2 The first start voltage output terminal 966ch and the second start voltage terminal are respectively electrically connected to two adjacent data transmission terminals, so that the polarities of the start voltages of the data lines electrically connected to the first start voltage output terminal are identical when the polarity inversion mode of the display device 100 is the phase alternating column.
Specifically, the data transmission terminal 1ch is electrically connected to the first initial voltage output terminal 966ch, the data transmission terminal 2ch is electrically connected to the second initial voltage output terminal 965ch, the first initial voltage output terminal 966ch outputs a positive gray-scale voltage, the second initial voltage output terminal 965 outputs a negative gray-scale voltage in a blanking period HBK between the second scan time Gate and a third scan time Gate, the source driving circuit 120 turns off the outputs of the first initial voltage output terminal 966ch and the second initial voltage output terminal 965ch, the source driving circuit 120 transmits a positive data signal LP to the data transmission terminal 1ch, and transmits a negative data signal L to the data transmission terminal 2ch P 。
The present embodiment can also be applied to a point-by-point inversion display device, the principle of which is similar to that of the embodiment.
In this embodiment, the first start voltage output terminal 966ch and the second start voltage output terminal 965ch are at least one of the redundant output terminals (dummy pins) of the source driving circuit 120, and no additional output terminals are required.
The foregoing has described in detail the specific embodiments of the present application. The above-described embodiments of the present disclosure are merely preferred embodiments of the present disclosure, and many variations and modifications may be made by those of ordinary skill in the art without departing from the spirit of the disclosure. Such variations and modifications are intended to fall within the scope of the present application as defined in the claims.

Claims (10)

1. A display device, comprising:
a plurality of data lines;
a plurality of pixels arranged in an array, the plurality of pixels being electrically connected to the corresponding data lines; and
the source driving circuit is electrically connected with the plurality of data lines and comprises a plurality of data transmission ends and a first starting voltage output end, the plurality of data transmission ends are electrically connected with the plurality of data lines, the first starting voltage output end is electrically connected with the data transmission end, the data transmission end is configured to receive a first starting voltage from the first starting voltage output end in a blanking time period and output the first starting voltage to the data lines, and a data signal of the source driving circuit is output to the plurality of data lines in a scanning time period, the polarity of the first starting voltage output to the data lines by the data transmission end in the blanking time period between an N scanning time period and an N+1 scanning time period is the same as the polarity of the data signal transmitted to the same data line by the source driving circuit in the N+1 scanning time period, and the absolute value of a gray value corresponding to the first starting voltage is larger than 0, wherein N is a positive integer.
2. The display device according to claim 1, wherein the absolute values of the gray scale values corresponding to the first start voltages of the adjacent two blanking periods are the same.
3. The display device according to claim 2, wherein an absolute value of the gray-scale value corresponding to the first start voltage is equal to a median value of the maximum gray-scale value and the minimum positive integer gray-scale value of the display device.
4. The display device according to claim 1, wherein the source driving circuit further includes a second start voltage output terminal electrically connected to the data transmission terminal, the data transmission terminal configured to receive a second start voltage from the second start voltage output terminal during the blanking period and output the second start voltage to the data line, the first start voltage having a polarity opposite to that of the second start voltage, and a voltage received by one of the data transmission terminals during one of the blanking periods is the first start voltage or the second start voltage.
5. The display device according to claim 4, wherein in a blanking period between an nth scan time and an n+1th scan time, a voltage received by one of the data transmission terminals is the first start voltage, and in a blanking period between an n+1th scan time and an n+2th scan time, a voltage received by the same data transmission terminal is the second start voltage.
6. The display device according to claim 1, wherein the source driving circuit further includes a second start voltage output terminal electrically connected to the plurality of data transmission terminals, the second start voltage output terminal and the first start voltage output terminal are electrically connected to adjacent two of the data transmission terminals, respectively, the data transmission terminal electrically connected to the second start voltage output terminal is configured to receive a second start voltage from the second start voltage output terminal during a blanking period and output the second start voltage to the data line, the first start voltage and the second start voltage having polarities opposite to each other.
7. The display device according to any one of claims 4 to 6, wherein an absolute value of a gray-scale value corresponding to the first start voltage is the same as an absolute value of a gray-scale value corresponding to the second start voltage.
8. The display device of claim 1, wherein the source driver circuit further comprises a plurality of redundant outputs, the first starting voltage output being selected from at least one of the plurality of redundant outputs.
9. The display device of claim 1, wherein the source drive circuit further comprises a start voltage control module electrically connected to the first start voltage output, the start voltage control module configured to stop providing the first start voltage to the first start voltage output for a scan time and to provide the first start voltage to the first start voltage output for a blanking time period.
10. The display device according to claim 1, wherein an end time of the first start voltage is the same as a start time of the data signal.
CN202410054715.9A 2024-01-12 2024-01-12 Display device Pending CN117877407A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202410054715.9A CN117877407A (en) 2024-01-12 2024-01-12 Display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202410054715.9A CN117877407A (en) 2024-01-12 2024-01-12 Display device

Publications (1)

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CN117877407A true CN117877407A (en) 2024-04-12

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202410054715.9A Pending CN117877407A (en) 2024-01-12 2024-01-12 Display device

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