KR100764047B1 - Liquid cystal display device and method for driving thereof - Google Patents

Abstract

In the liquid crystal display (LCD) module disclosed herein, two data lines adjacent to one output terminal of the data drive IC are commonly connected. The switching circuit sequentially connects the pixels connected to the group of data lines among the data lines and the pixels connected to the other group of data lines to the gate line in response to the first and second switching control signals. The data drive IC sequentially outputs data for providing to the group of data lines and data for providing to the other group of data lines while a predetermined gate line is activated by the gate drive IC. Such a data drive IC can drive two data lines through one output terminal. Therefore, the data drive IC required in the LCD module is reduced to 1/2 compared to the conventional one. This reduces the production cost of the LCD module.

Description

Liquid crystal display device and its driving method {LIQUID CYSTAL DISPLAY DEVICE AND METHOD FOR DRIVING THEREOF}

1 is a diagram for showing a general relationship between a host system and a TFT-LCD module;

2 is a detailed block diagram of a data drive IC;

3 is a diagram representing the configuration of an LCD panel in an equivalent circuit;

4 is a view showing the configuration of an LCD module according to a preferred embodiment of the present invention;

5 is a view showing the configuration of a liquid crystal display module according to another embodiment of the present invention;

6 is a timing diagram showing the operation of the LCD module according to the preferred embodiment of the present invention;

7 is a flowchart showing how a data drive IC provides data to data lines for displaying a color image; And

8A through 8D are exemplary views illustrating a method of scanning a data line.                 

* Description of the symbols for the main parts of the drawings *

100: LCD module

110A: Gate Drive IC

120A: Data Drive ICs

130: LCD panel

140: switching unit

T1: thin film transistor

C _LC : Liquid Crystal Capacitor

C _ST : Auxiliary Capacitor

D _i , D _{i + 1} : Data drive IC output

G _j to G _{j + 3} : Gate line

D _ai , D _bi , D _{ai + 1} , D _{bi + 1} : data lines

The present invention relates to a liquid crystal display (LCD) module, and more particularly, to a liquid crystal display module and a method of driving the same that can reduce the number of data drive ICs for driving the liquid crystal display module.

FIG. 1 is a diagram illustrating a general relationship between a host system and a thin film transistor liquid crystal display (TFT-LCD) module. Referring to FIG. 1, the LCD module 20 includes color data Red; R, Green; G, Blue; B, horizontal sync signal Hsync, and vertical provided from the graphics controller 12 of the host system 10. A color image is displayed on the LCD panel 40 by receiving the synchronization signal Vsync and the dot clock signal DCLK.

The LCD module 20 includes a gray voltage generator 22, a timing controller 24, a plurality of gate drive integrated circuits 26A to 26C, and data drive ICs. drive Integrated Circuits; 28A to 28D), and an LCD panel 40.

The timing controller 24 stores the color data R, G, and B provided by the graphic controller 12 of the host system 10 in the gate drive ICs 26A to 26C and the data drive ICs 28A to 28D. Adjust the output to meet the timing required by the controller. The timing controller 24 also controls signals (eg, start horizontal signal, load signal, gate clock for controlling the gate drive ICs 26A to 26C and the data drive ICs 28A to 28D). A start vertical signal, a line inversion signal, a gate on enable signal, and the like.

The gray voltage generator 22 provides voltages V1 to Vm corresponding to m-gradations to the data drive ICs 28A to 28D. For example, when each of the color data R, G, and B provided from the graphics controller 12 of the host system 10 is 6-bit, the LCD panel 40 has 64-gradations corresponding to 2 ⁶ . In this case, the gray voltage generator 22 should generate voltages V1 to V64 corresponding to 64-gradations.

The gate drive IC 26A outputs voltages for sequentially activating the gate lines one by one in response to a control signal provided from the timing controller 24. After activating the gate lines connected thereto, the gate drive IC 26A generates a carry signal GC1 to control the next gate drive IC 26B to start operation. In this way, all the gate lines of the LCD panel 40 are activated one by one in sequence.

A detailed block diagram of the data drive IC 28A is shown in FIG. Referring to FIG. 2, the data drive IC 28A includes a shift register 30, a digital to analog converter 32, and an output buffer 34.

The shift register 30 shifts and stores the color data R, G, and B provided from the timing controller 24 in order. The digital / analog converter 32 outputs an analog voltage corresponding to each digital data stored in the shift register 30 among the analog voltages V0 to Vm provided from the gray voltage generator 22. The output buffer 34 latches the data D0 to Dn provided from the digital / analog converter 32 and provides the data lines of the LCD panel 40 in response to the load signal TP.

1 and 2, when data is filled in the shift register 30 in the data drive IC 28A, the shift register 30 outputs a carry signal SC1 to the next data drive IC 28B. to provide. Next, the data drive IC 28B performs a data shift operation when the carry signal SC1 is input. In this way, when all the data drive ICs 28A to 28D are filled with data, the digital / analog converters included in each data drive IC perform a conversion operation. When the load signal TP is input after the digital / analog conversion operation is completed, the data drive ICs 28A to 28D simultaneously provide data to data lines. In this way, the data lines of the LCD panel 30 are driven.

In the LCD panel 30, in response to respective pixel signal voltages input from the gate drive IC 10 and the data drive IC 20, white plane light incident from a backlight unit (not shown) is pixels. It controls the light transmitted to the color image.

3 is a diagram illustrating the configuration of an LCD panel in an equivalent circuit.

Referring to FIG. 3, the gate lines G _j to G _{j + 3} and the data lines D _i to D _{i + 3} are arranged to cross each other in a lattice form. One pixel is connected to the gate line and the data line, respectively, and includes a thin film transistor (T1), a storage capacitor C _ST , and a liquid crystal capacitor C _LC . The gate of the thin film transistor T1 is connected with the gate line, and its source is connected with the data line. One end of the storage capacitor C _ST and the liquid crystal capacitor C _LC is connected to the drain terminal of the thin film transistor T1, and the other ends thereof are connected to the common electrode voltage V _COM .

When the thin film transistor T1 is turned on in response to a gate drive signal input from the gate drive IC 26A, an applied voltage input from the data drive IC 28A through a data line is applied to the storage capacitor C. _ST ) and the liquid crystal capacitor C _LC . Subsequently, when the thin film transistor T1 is turned off, the charge accumulated in the storage capacitor C _ST and the liquid crystal capacitor C _LC maintains the charged charge for one frame. Since the storage capacitor C _ST is difficult to maintain the charged charge for one frame only with the liquid crystal capacitor C _LC , the storage capacitor C _ST serves to store the charge. As described above, as the turn-on / off of the thin film transistor T1 is repeated, a desired data voltage is transferred to the storage capacitor C _ST and the liquid crystal capacitor C _LC to express a color image.

In the liquid crystal display module having the above-described configuration, the data drive IC 28A transfers data corresponding to the gate line activated by the gate drive IC 26A to the data lines D _i to D _{i + 3} . By providing at the same time a color image is represented. For example, a liquid crystal display device employing an extended graphics array (XGA) display mode has 1024 * 768 pixels, so that a total of 1024 data lines are required, and a plurality of data drive ICs for driving these data lines are required. .

In general, the data drive IC accounts for about 50% of the total cost of producing TFT-LCD modules. Therefore, if the number of data drive ICs included in one TFT-LCD module is reduced, the production cost of the TFT-LCD module will be significantly reduced. Therefore, there is a need for a data line driving method and apparatus capable of reducing the number of data drive ICs provided in a TFT-LCD module.

Accordingly, an object of the present invention is to solve the above-mentioned problems, and to provide a liquid crystal display module having a reduced number of data drive ICs and a method of driving the same.

According to an aspect of the present invention for achieving the object of the present invention as described above, the liquid crystal display module comprises: a plurality of data lines and gate lines arranged in a lattice form, the data lines and the gate lines Each correspondingly, and comprises an array of pixels connected with a corresponding data line. A gate drive IC sequentially activates the gate lines, and the data drive IC provides data for displaying a color image to pixels connected to the gate line activated by the gate drive IC. One pair of adjacent data lines of the data lines is commonly connected to a corresponding output terminal of the data drive IC. A switching circuit is provided for sequentially connecting pixels connected to a group of data lines and pixels connected to another group of data lines with the gate lines in response to first and second switching signals. .

While a predetermined gate line is activated by the gate drive IC, the data drive IC sequentially outputs data for providing to the group of data lines and data for providing to the other group of data lines.

In an exemplary embodiment, the switching circuit may correspond to pixels connected to the group of data lines, and connect pixels connected to the group of data lines to the gate lines in response to the first switching signal. A second array corresponding to the array of first transistors and the pixels connected to the data lines of the other group and connecting the pixels connected to the data lines of the other group to the gate lines in response to the second switching signal. It consists of an array of transistors.

In this embodiment, each of the first transistors is controlled by a drain connected to a corresponding gate line, a source connected to a corresponding pixel among pixels connected to the group of data lines, and the first switching signal. Has a gate. Each of the second transistors has a drain connected to a corresponding gate line, a source connected to a corresponding pixel among pixels connected to the other data lines, and a gate controlled by the second switching signal.

The liquid crystal display device may include first sub gate lines respectively corresponding to the gate lines and connected to pixels connected to the group of data lines, and corresponding data lines of the other group. And second sub-gate lines connected to the pixels connected to each other.

In this embodiment, the switching circuit comprises a drain connected with a corresponding gate line, a source connected with a corresponding first sub gate line, an array of third transistors controlled by the first switching signal, and a corresponding gate line; A connected drain, a source connected with a corresponding second sub-gate line, and an array of fourth transistors controlled by the second switching signal.

According to another feature of the present invention, a liquid crystal includes a plurality of data lines and gate lines arranged in a lattice form, and an array of pixels corresponding to the data lines and gate lines, respectively, and connected to the corresponding data lines. Provided is a method for driving the liquid crystal display device while a predetermined gate line is activated in the display device. First, pixels connected to a group of data lines among the data lines are connected to the gate lines, and then data is provided to the group of data lines. Next, pixels connected to other data lines among the data lines are connected to the gate lines, and then data is provided to the group of data lines.

 According to the present invention, two data lines can be driven through one output terminal of the data drive IC. Therefore, the number of data drive ICs configured in the LCD module is reduced, thereby reducing the production cost of the LCD module.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 4 to 8.

In the novel liquid crystal display module of the present invention, two data lines adjacent to one output terminal of the data drive IC are connected in common. The switching circuit sequentially connects the pixels connected to the group of data lines among the data lines and the pixels connected to the other group of data lines to the gate line in response to the first and second switching control signals. The data drive IC sequentially outputs data for providing to the group of data lines and data for providing to the other group of data lines while a predetermined gate line is activated by the gate drive IC. Such a data drive IC can drive two data lines through one output terminal. Therefore, the data drive IC required in the LCD module is reduced to 1/2 compared to the conventional one.

4 is a view showing the configuration of an LCD module according to a preferred embodiment of the present invention. Referring to FIG. 4, the LCD panel 130 is connected to gate lines Gj to Gj + 3 and data lines Di to Di + 3, which are arranged to cross each other in a lattice form, and is connected to the gate line and the data line. An array of pixels and switching transistors (200-230)-(203-233).

One pixel is connected to a gate line and a data line, respectively, and includes a thin film transistor (T1), a storage capacitor C _ST , and a liquid crystal capacitor C _LC . The gate of the thin film transistor T1 is connected to the gate line, and its data is connected to the data line. One end of the storage capacitor C _ST and the liquid crystal capacitor C _LC is connected to the drain terminal of the thin film transistor T1, and the other ends thereof are connected to the common electrode voltage V _COM .

Data lines (Di, Di + 1) and (Di + 2, Di + 3) adjacent to each other among the data lines Di to Di + 3 are commonly connected to each other to output an output terminal of the data drive IC 120A. To OUTk and OUTk + 1, respectively.

The switching transistors 200 to 230 to 203 to 233 respectively correspond to pixels in the liquid crystal panel 130. The arrays of first switching transistors 200 to 230 and 202 to 232 may receive a group of data lines Di among the data lines Di to Di + 3 in response to the first switching signal EVEN. , Di + 2) is provided to connect the pixels connected to the gate lines Gj to Gj + 3. The arrays of the second switching transistors 201 to 231 and 203 to 233 may select pixels connected to other data lines Di + 1 and Di + 3 in response to the second switching signal ODM. It is provided to connect to the gate lines Gj to Gj + 3.

In detail, each of the first switching transistors 200 to 230 and 202 to 232 may include a drain connected to a corresponding gate line and a corresponding pixel (thin film transistor) among pixels connected to the group of data lines. A source connected to the gate of T1), and a gate controlled by the first switching signal EVEN. Each of the second switching transistors 201 to 231 and 203 to 233 may have a drain connected to a corresponding gate line and a corresponding pixel among the pixels connected to the group of data lines (the thin film transistor T1). Gate) and a gate controlled by the second switching signal (ODD).

The LCD module of the present invention having the configuration as described above may drive two data lines through one output terminal of the data drive IC 120A.

Subsequently, a driving method of the LCD module shown in FIG. 4 will be described with reference to FIG. 6.

6 is a timing diagram showing the operation of the LCD module according to the preferred embodiment of the present invention.

4 and 6, the gate drive IC 110A sequentially activates the gate lines G _j to G _{j + 3} one by one. The data drive IC 120A may display data for displaying a color image on pixels connected to the activated gate line while the predetermined gate line G _j is activated (H). 3) to provide.

7 is a flowchart illustrating a method of providing data for displaying color images to the data lines Di to Di + 3 by the data drive IC 120A.

6 and 7, as the predetermined gate line Gj is activated, the first switching signal EVEN is activated at a high level, and the second switching signal ODM is deactivated at a low level. The first and second switching signals EVEN and ODD are repeatedly inverted with a predetermined pulse width as complementary signals. In response to the high level first switching signal EVEN and the low level second switching signal ODM, both of the first transistors 200 to 230 and 202 to 232 are turned on. The second transistors 201 to 231 and 203 to 233 are all turned off. Therefore, gates of the thin film transistors connected to the group of data lines Di and Di + 2 are connected to the gate lines Gj to Gj + 3 through the first transistors 200 to 230 and 202 to 232. It is connected to (step S210).

In step S220, the data drive IC 120A outputs data for driving the group of data lines Di and Di + 2 through the output terminals OUTk and OUTk + 1 during the H / 2 period. The group of data lines Di and Di + 2 are driven by data provided from the data drive IC 120A.

Subsequently, in step S230, the first and second switching signals EVEN and ODD are inverted at the H / 2 point of the interval in which the gate line is activated. That is, the first switching signal EVEN transitions from a high level to a low level, and the second switching signal ODM transitions from a low level to a high level. In response to the low level first switching signal EVEN and the high level second switching signal ODM, all of the first transistors 200 to 230 and 202 to 232 are turned off, and the second The transistors 201 to 231 and 203 to 233 are all turned on. Therefore, other data lines Di + 1 and Di + 3 are connected to gate lines Gj to Gj + 3 through second transistors 201 to 231 and 203 to 233.

In step S240, the data drive IC 120A outputs data for driving the data lines Di + 1 and Di + 3 of the other group through the output terminals OUTk and OUTk + 1. Other data lines Di + 1 and Di + 3 are driven by data provided from the data drive IC 120A.

The LCD panel 130 with switching transistors operating as described above operates as follows. First, the thin film transistors connected to the gate line Gj are turned on in response to the gate drive signal input from the gate drive IC 110A. All of the first transistors 200 to 230 and 202 to 232 are turned on so that the group of data lines Di and Di + 2 are connected to the gate lines Gj to Gj + 3. The data voltage provided from the data drive IC 120A is charged in the storage capacitor C _ST and the liquid crystal capacitor C _LC of the pixels connected to the group of data lines Di and Di + 2. Subsequently, when all of the first transistors 200 to 230 and 202 to 232 are turned off at a half of the time when the gate line is activated, the storage capacitor C _ST and the liquid crystal capacitor C are turned off. The charge accumulated in _LC ) retains the charged charge for the remainder of the frame. Meanwhile, when all of the second transistors 201 to 231 and 203 to 233 are turned on at the H / 2 point, other data lines Di + 1 and Di + 3 are connected to the gate lines Gj. ~ Gj + 3). The data voltage provided from the data drive IC 120A is charged in the storage capacitor C _ST and the liquid crystal capacitor C _LC of even pixels. That is, a color image is represented by sequentially transferring a desired data voltage to a storage capacitor C _ST and a liquid crystal capacitor C _LC of one group of pixels and another group of pixels connected to an activated gate line.

As described above, when two data lines are sequentially driven to one output terminal of the data drive IC 120A, the number of data drive ICs required in the entire LCD module is reduced to 1/2 compared with the related art. Therefore, the production cost of the LCD module is significantly reduced.

5 is a diagram illustrating a configuration of a liquid crystal display module according to another embodiment of the present invention.

Unlike FIG. 4, the liquid crystal display module illustrated in FIG. 5 includes two sub gate lines connected to one gate line and a switching circuit 140 connecting the gate line and the sub gate lines.

In detail, first sub-gate lines 321 ˜ 327 correspond to the gate lines Gj ˜ Gj + 3, respectively, and gates of thin film transistors connected to the group of data lines Di and Di + 2. Are connected to each other. Second sub-gate lines 322 to 328 respectively correspond to the gate lines Gj to Gj + 3, and gates of the thin film transistors connected to the other data lines Di + 1 and Di + 3. Are each connected to.

The switching circuit 140 includes an array of third transistors 301 ˜ to have a drain connected to a corresponding gate line, a source connected to a corresponding first sub gate line, and a gate controlled by the first switching signal EVEN. 307, an array of fourth transistors having a drain connected to a corresponding gate line, a source connected to a corresponding second sub gate line, and a gate controlled by the second switching signal (ODD). 208).

Accordingly, the pixels connected to the group of data lines Di and Di + 2 and the pixels connected to the other group of data lines Di + 1 and Di + 3 are sequentially in the gate lines Gj to Gj +. Connected with 3). Therefore, two data lines can be driven through one output terminal of the data drive IC similarly to the LCD module shown in FIG. 4.

8A through 8D are exemplary views illustrating a method of scanning a data line.

In particular, FIG. 8A shows a scanning method according to the timing shown in FIG. 6 and the flowchart shown in FIG. 7. As shown in FIGS. 8A to 8D, a group of data lines and another group of data lines may be sequentially scanned, but the scanning order may be variously modified.

Also, in this embodiment, two data lines arranged on the LCD panel are commonly tied to one output terminal of the data drive IC, but three or more data lines are connected to one output terminal of the data drive IC. Connecting and driving can be easily understood from the embodiments of the present invention for those skilled in the art. When driving three data lines with one output stage, the number of data drive ICs required by the LCD module is reduced by one third compared to the conventional method.

According to the present invention as described above, the number of data drive ICs configured in the LCD module is reduced. Therefore, the production cost of the LCD module is reduced.

Claims (3)

In the liquid crystal display device: A plurality of gate lines for transmitting a scan signal, a plurality of data lines for transmitting an image signal intersecting the gate lines, and an area surrounded by the gate lines and the data lines, respectively, for each of the gate lines and the data lines. A liquid crystal including a thin film transistor connected to the thin film transistor connected to the gate line, and a plurality of switching elements configured to store image data according to a plurality of switching signals including first and second switching signals from the outside. A panel; A gate driver unit for sequentially activating the gate line; And A data driver unit for providing image data to a pixel formed at an intersection point of the gate line and the data line, The switching device includes a first switching device group receiving the first switching signal and connected to a pixel of an odd data line, and a second switching device group receiving the second switching signal and connected to a pixel of an even data line. It includes; The data lines are commonly connected to data lines adjacent to each other, and the common connected data line is connected to one output terminal of the data driver unit. And the gate lines are connected to a drain of the switching element. The method of claim 1, The first and second switching device group, Drains of the first and second switching element groups are connected to the gate lines, gates of the first and second switching element groups are connected to terminals to which the first and second switching signals from the outside are input, And the source of the first and second switching element groups is connected to a gate of the thin film transistor. In a method of driving a liquid crystal display device: Applying a gate driving signal; Applying a first switching signal from a first group of switching elements connected to pixels of an odd data line; Applying a data driving signal together with the gate driving signal and the first switching signal to store image data in a corresponding pixel; Applying a second switching signal from a second group of switching elements connected to pixels of an even data line; And applying a data driving signal together with the gate driving signal and the second switching signal to store image data in a corresponding pixel.

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