CN117855065A - 半导体封装件制造方法、该半导体封装件以及电子系统 - Google Patents

半导体封装件制造方法、该半导体封装件以及电子系统 Download PDF

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CN117855065A
CN117855065A CN202311262387.3A CN202311262387A CN117855065A CN 117855065 A CN117855065 A CN 117855065A CN 202311262387 A CN202311262387 A CN 202311262387A CN 117855065 A CN117855065 A CN 117855065A
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semiconductor package
bottom side
semiconductor
terminal
semiconductor die
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雷格纳斯·赫尔曼努斯·波尔玛
王伟文
蒂姆·伯切尔
汉斯-于尔根·芬克
詹尼克·恩特林格
张月强
C·N·陈
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Nexperia BV
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Nexperia BV
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Abstract

半导体封装件制造方法、半导体封装件和电子系统。半导体封装件具有与至少一个导电端子连接的至少一个半导体管芯，半导体封装件具有上侧和底侧且至少一个端子至少部分地位于底侧，方法包括：提供具有用于建立外部电连接的多个端子的引线框架；提供至少一个半导体管芯并将其电和机械附接至引线框架的至少部分地位于底侧的至少一个端子；在半导体管芯和端子上提供包封材料而留下至少一个端子的至少部分暴露出来，在底侧上包封材料设有使半导体管芯至少部分暴露的至少一个开口；清洁半导体封装件底侧；在底侧部分地镀覆导电层从而经由至少一个开口将半导体管芯与至少一个端子的从包封材料暴露的部分电连接；及将半导体封装件从引线框架上切单下来。

Description

半导体封装件制造方法、该半导体封装件以及电子系统
技术领域
本发明的公开涉及半导体封装件制造方法、这种半导体封装件以及包括PCB元件和至少这种半导体封装件的电子系统。
背景技术
专利文献US9303327B2中公开了一种制造半导体器件的已知方法。US9303327B2进一步公开了一种系统、一种封装部件以及一种用于制造封装部件的方法。在US9303327B2的实施例中，一种系统包括部件承载件、布置在部件承载件上的部件以及布置在部件承载件或部件中的至少一者的导电表面上的绝缘层，其中，绝缘层包括聚合物和无机材料，无机材料包括等于或大于15ac-kV/mm的介电强度以及等于或大于15W/m*K的热导率。公开了在底侧处对封装部件的镀覆。然而，所得部件在管芯与引线(端子)中的一者之间不具有金属镀覆的互连部。
专利文献US9218987B2中公开了一种半导体器件，更准确地说是一种具有层叠互连板的顶侧冷却半导体封装件。该半导体封装件包括：带有端子引线的电路基板、在电路基板上面的半导体管芯、用于将半导体管芯的顶部接触区域与电路基板键合并互连的低热阻紧密互连板、在紧密互连板上面的用于顶侧冷却的低热阻层叠互连板、以及用于除了使层叠互连板的顶表面露出以维持有效的顶侧冷却之外将封装件包封起来的模制包封材料。层叠互连板的顶部部分可以包括在紧密互连板上方的外周悬垂部。该外周悬垂部允许将最大化的暴露顶表面区域用于散热，而与适用于紧密互连板的其它区域约束无关。层叠互连板可以被部分蚀刻或三维地形成以产生外周悬垂部。US9218987B2所公开的器件依赖于3D形成的夹片结构(clip structure)，该夹片结构需要组装并且需要附加的部件以向外界形成散热。
因此，本发明的公开的目的是提供一种具有集成的散热器和电连接特征的改进的半导体器件。
发明内容
根据本发明的公开的第一实例，提出一种半导体封装件的制造方法，该半导体封装件具有与至少一个导电端子连接的至少一个半导体管芯。半导体封装件具有上侧和底侧，其中至少一个端子至少部分地位于底侧上。特别地，根据本发明的公开的方法包括以下步骤：
a)提供具有用于外部电连接的多个端子的引线框架；
b)提供至少一个半导体管芯，并将至少一个半导体管芯电地和机械地附接至引线框架的至少部分地位于底侧上的至少一个端子；
c)在半导体管芯和多个端子上提供包封材料，而留下至少一个端子的至少一部分暴露出来，其中，包封材料在底侧上设置有至少一个开口，该至少一个开口至少部分地使半导体管芯暴露出来；以及
d)清洁半导体封装件的底侧，接着
e)在底侧上部分地镀覆导电层，从而经由至少一个开口将半导体管芯与至少一个端子的从包封材料暴露出来的一部分电连接。
最后，该方法包括以下步骤：
f)将半导体封装件从引线框架上切单下来。
在根据本发明的公开的方法的有利实例中，在步骤b)中，使用共晶键合(eutecticbonding)，优选CuSn共晶体、含Ag粘合剂或Ag烧结材料，将半导体管芯附接至端子。这些键合是无铅(Pb)连接方法，其使得完成的半导体封装件RoHS兼容(限制危险材料)。
另外，步骤b)可以进一步实施为如下步骤：在该步骤中，半导体管芯设置有从底侧突出的金属或聚合物的凸块或膜。
在根据本发明的公开的方法的另外两个优选步骤中，在包封工艺期间形成包封材料中的开口，或者使用激光切割工艺形成包封材料中的开口。
另外，步骤e)可以包括应用水电镀工艺或应用无电镀工艺、或溅射或沉积导电材料的任何其它方式。
此外，在该方法的实例中，通过切除半导体封装件的具有引线端子的一部分来修调半导体封装件，该修调步骤在步骤f)之前执行。作为替代方案，在步骤f)之后，通过切除半导体封装件的具有端子的一部分来修调半导体封装件。
本发明的公开还涉及一种根据本发明的公开的方法制造的半导体封装件，其中半导体封装件具有与导电端子中的至少一个连接的半导体管芯，其中半导体封装件具有上侧和底侧，并且其中至少一个端子至少部分地位于底侧上。
本发明的公开还涉及一种电子系统，其包括设置有焊料焊盘的PCB元件以及根据本发明的公开的方法制造的至少一个半导体封装件，其中半导体封装件利用端子经由焊料焊盘附接至PCB元件。
附图说明
现在将参考附图讨论本发明的公开，附图中：
图1示出了根据本发明公开实例的半导体封装件的示意性截面图。
图2示出了根据本发明公开实例的具有开口8的半导体封装件的示意性3D视图。
图3示出了根据本发明公开实例的半导体系统的示意性截面图。
图4a示出了在利用所示的切割线进行修调(trimming)之前的半导体封装件的示意性截面图，图4b示出了根据本发明公开实例的在修调之后的半导体封装件的示意性截面图。
图5示出了根据本发明公开实例的具有管芯元件的半导体封装件的示意性截面图，该管芯元件具有从上侧4突出的凸块10。
图6示出了根据本发明公开实例的具有两个管芯元件的半导体封装件的示意性截面图。
具体实施方式
为了正确理解本发明的公开，在下面的详细描述中，本发明的公开的相应元件或部分将在附图中用相同的附图标记表示。
参考图1，本发明的公开的第一实例涉及一种半导体封装件1的制造方法，该半导体封装件1具有一个半导体管芯2。在集成电路的背景下，半导体管芯2是上面制造有给定功能电路的小块半导体材料。通常，通过诸如光刻等工艺在电子级硅(EGS)或其它半导体材料(诸如GaAs)的单个晶圆上大批量地生产集成电路。
为了进一步用于PCB(印刷电路板)或其它电子电路中，半导体管芯2与多个导电端子3连接。这些端子3在任何期望的方向上突出到半导体封装件1的外部，从而允许将封装件1安装在PCB上并建立与各种端子3的电连接。
在另一实例中，一些端子3以这样的方式布置，即，端子3的所有部分都没有突出到半导体封装件1的外部，而是端子3的金属(能够焊接的)部分是暴露的而没有被包封材料7覆盖并因此适于使用焊接合金连接到PCB。
在该申请中，短语“端子”用于半导体封装件1外部的任何导电层的含义，该导电层形成适于将半导体封装件1的某个部分与电子电路的其它部分(例如，PCB)电连接的电流或信号的路径。端子3也可以称为电极。当导电层9连接到端子3或管芯2的至少一部分时，导电层9也可以被称为端子3。
半导体封装件1具有上侧4和底侧5。然而，这些侧仅是为了便于参考和说明而命名，因为半导体封装件1可以以与这里描述的方式不同的方式安装到PCB。
在图1的半导体封装件1的该实例中，端子3位于底侧5上，并且根据包括以下步骤的方法制造而成：
a)提供具有多个端子3的引线框架6。引线框架6是适于卷到卷工艺(reel-to-reelprocess)的金属网，但是在另一实例中，它可以是金属片的形式。引线框架被预切割以形成不同形状的端子3，一些端子3具有较大尺寸(例如，以匹配管芯2的尺寸或更大的尺寸，从而为管芯2的安装工艺要求留下一些额外的空间)。
适于安装管芯2的端子3有时被称为具有较宽端部的桨状物(paddle)。在该实例中，适于附接管芯元件2的端子3朝向上侧4弯曲，使得在进一步的附接步骤期间，管芯元件2的底表面匹配(或几乎匹配)另一端子3的表面的高度。
在接下来的步骤b)中，提供半导体管芯2并将其电地和机械地附接至引线框架6的位于底侧5上的端子3。在某些实例中，可以使用导电粘合剂、或Cu基合金(例如，CuSn共晶合金)、或Ag基胶、或合金、或任何其它已知材料将管芯2附接至端子3，只要所使用的材料适于提供管芯元件2和相应端子3之间的机械和电连接即可。
在进一步的步骤c)中，在半导体管芯2和端子3上提供包封材料7，其中留下端子3的一部分暴露出来。端子3的暴露部分用作焊点，以建立最终半导体封装件1和PCB的焊接接头(或导电胶接头)。包封材料7可以在底侧5上设置有开口8，使得半导体管芯2部分地暴露。该开口形成用于沉积金属层的部位，该金属层连接到管芯2。
开口8可以形成在管芯2上用于连接端子3的特定部位。在另一实例中，可以提供多于一个的开口8。在该实例中，包封材料7是使用传递模制(transfer molding)技术设置在管芯2上的热塑性聚合物，并且开口8可以在注塑模具的成形期间产生。可以实施其它模制技术作为替代制造技术，诸如压缩模制或注射模制。
注射形式被成形为使得所有注射的包封材料7不能覆盖整个管芯元件2。因此，在包封材料7的注射过程中，留下一些部位未覆盖并因此形成开口8，如图2所示。
根据本发明的公开的方法的进一步步骤d)，涉及在湿法工艺或干法工艺中清洁半导体封装件的底侧5。清洁工艺还可以包含或包括用于沉积另外的金属层的表面准备步骤。该工艺也可以包括表面活化剂材料或溶液的应用。
根据本发明的公开的方法还实施了步骤e)，在底侧5上部分地镀覆导电层9，以便提供半导体管芯2经由开口8与端子3的暴露部分的电连接，该暴露部分是端子3从包封材料7暴露出来的部分。
最后，该方法包括切单步骤f)，其中将半导体封装件1与引线框架6分离。在该步骤中，将引线框架和端子的一些部分去除(例如，通过修调)，并且获得与正确标准匹配的最终半导体封装件1。一些标准留下从半导体封装件1突出的端子(例如，标准SOD123W、SOD323、SOD323F)，并且一些标准修调掉所有突出的端子3，仅留下端子3的暴露出来因此未被包封材料7覆盖的一些部分(例如，标准SOD882)。
在本发明的公开的另一实例中，在步骤b)中，半导体管芯2设置有从底侧5突出的至少一个金属凸块10。这也在图1中示出。然而，半导体管芯2可以安装有从上侧4突出的金属凸块10，根据本发明的公开的该实例在图5中示出。从底侧5突出的至少一个金属凸块10可以与导电端子3接触，或两者都接触。
在替代实例中，在步骤c)期间，包封材料7完整地形成(例如，通过传递模制)在管芯元件2上而不留下任何开口8。在根据本发明的公开的方法的该实例中，工艺需要另一步骤来形成开口8，例如，通过使用激光切割工艺。激光装置在管芯部件2上的特定部位处去除、切穿或烧除包封材料7，以在底侧5形成开口8。
在本发明的公开的又一实例中，在步骤e)中，通过在端子3、开口8上以及其间的包封材料9的一部分上沉积金属层，将先前未连接到管芯元件2的端子3经由开口8与管芯元件2连接。该步骤可以通过沉积金属层的任何已知方法来进行，包括水电镀工艺(galvanicplating process)或无电镀工艺(electroless plating process)。
在本发明的公开的替代实例中，应用点镀Cu种子层工艺。该工艺提供了厚度高达300nm的Cu种子层，在该Cu种子层上可以沉积具有较大厚度的水电镀层。在另一替代实例中，此步骤应用溅射掩模Cu层沉积工艺。该工艺提供了厚度高达3μm的Cu种子层，在其上可以沉积具有较大厚度的水电镀层。也可以使用任何已知的技术在整个底侧5上提供种子层，并且随后使用掩模Cu蚀刻工艺去除种子层的若干部分。
在优选实例中，通过切除半导体封装件1的具有引线端子的一部分来修调半导体封装件1，从而得到具有减小尺寸的半导体封装件1，如图4a和图4b所示。该工艺可以在切单步骤f)之前或之后应用而无需任何修改。
本发明的公开还涉及一种半导体封装件1，其具有与一对导电端子3连接的半导体管芯2。半导体封装件1具有上侧4和底侧5，其中一个端子3部分地位于底侧5上。根据如上所述的本发明的公开的方法的工艺步骤制造半导体封装件1。
在另一实例中，可以有两个或更多个半导体管芯2附接到端子3，实现多个管芯2的该实例在图6中示出。
利用根据本发明的公开的方法制造的半导体封装件1可以是电子系统11(电子器件)中的元件。电子系统11可以包括设置有焊料焊盘13的PCB元件12以及至少一个根据本发明的公开的半导体封装件1，其中半导体封装件1利用端子3经由焊料焊盘被附接到PCB元件12。PCB元件12可以设置有散热元件，该散热元件(例如，金属片)被放置在开口8附近或该散热元件(例如，经由导热焊盘或过孔)形成在开口8附近，用于改善将任何热量从管芯元件2传递到半导体封装件1外部。
附图标记列表
1 半导体封装件
2 半导体管芯
3 端子
4 封装件的上侧
5 封装件的底侧
6 引线框架
7 包封材料
8 开口
9 导电层
10 凸块
11 电子系统
12PCB
13 焊料焊盘
14 焊接合金

Claims (11)

1.一种半导体封装件(1)的制造方法，所述半导体封装件具有与导电的至少一个端子(3)连接的至少一个半导体管芯(2)，其中，所述半导体封装件(1)具有上侧(4)和底侧(5)，并且其中，所述至少一个端子(3)至少部分地位于所述底侧(5)上，所述方法包括以下步骤：
a)提供具有用于建立外部电连接的多个端子(3)的引线框架(6)；
b)提供所述至少一个半导体管芯(2)，并且将所述至少一个半导体管芯电地和机械地附接至所述引线框架(6)的至少部分地位于所述底侧(5)上的所述至少一个端子(3)；
c)在所述半导体管芯(2)和所述多个端子(3)上提供包封材料(7)，而留下至少一个端子(3)的至少一部分暴露出来，其中，所述包封材料(7)在所述底侧(5)上设置有至少一个开口(8)，所述至少一个开口(8)至少部分地使所述半导体管芯(2)暴露出来；以及
d)清洁所述半导体封装件的所述底侧(5)；
e)在所述包封材料(7)的底侧(5)上部分地镀覆导电层(9)，从而经由所述至少一个开口(8)将所述半导体管芯(2)与至少一个端子(3)的从所述包封材料(7)暴露出来并且在所述半导体封装件(1)外部的部分电连接，以及；
f)将所述半导体封装件(1)从所述引线框架(6)上切单下来。
2.根据权利要求1所述的方法，其中，在步骤b)中，使用共晶键合，优选CuSn共晶体或含Ag粘合剂或Ag烧结材料，将所述半导体管芯(2)附接至所述端子(3)。
3.根据权利要求1或2所述的方法，其中，在步骤b)中，所述半导体管芯(2)设置有从所述底侧(5)突出的至少一个金属凸块(10)。
4.根据权利要求1、2或3所述的方法，其中，在包封工艺期间形成所述包封材料(7)中的所述开口(8)。
5.根据权利要求1、2或3所述的方法，其中，使用激光切割工艺形成所述包封材料(7)中的所述开口(8)。
6.根据前述权利要求1至5中任一项所述的方法，其中，在所述步骤e)中应用水电镀工艺。
7.根据前述权利要求1至5中任一项所述的方法，其中，在所述步骤e)中应用无电镀工艺。
8.根据前述权利要求1至7中任一项所述的方法，其中，在步骤f)之前，通过切除所述半导体封装件的具有引线端子的一部分来修调所述半导体封装件(1)。
9.根据前述权利要求1至7中任一项所述的方法，其中，在步骤f)之后，通过切除所述半导体封装件(1)的具有端子(3)的一部分来修调所述半导体封装件(1)。
10.一种半导体封装件(1)，包括至少一个半导体管芯(2)，所述至少一个半导体管芯(2)与由包封材料(7)包围的至少一个第一导电端子(3)连接，其中，所述半导体封装件(1)具有上侧(4)和底侧(5)并且在所述底侧(5)上进一步包括将所述半导体管芯(2)与至少一个第二导电端子(3)连接的导电板(9)。
11.一种电子系统(11)，包括设置有焊料焊盘(13)的PCB元件(12)以及根据权利要求10所述的至少一个半导体封装件(1)，其中，所述至少一个半导体封装件(1)利用所述至少一个第一端子和所述至少一个第二端子(3)经由所述焊料焊盘附接至所述PCB元件(12)。
CN202311262387.3A 2022-10-06 2023-09-27 半导体封装件制造方法、该半导体封装件以及电子系统 Pending CN117855065A (zh)

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