CN117747702A - Boron diffusion method for N-TOPCON battery, preparation method, battery and battery assembly - Google Patents
Boron diffusion method for N-TOPCON battery, preparation method, battery and battery assembly Download PDFInfo
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- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 title claims abstract description 70
- 238000009792 diffusion process Methods 0.000 title claims abstract description 42
- 238000002360 preparation method Methods 0.000 title abstract description 15
- 238000000151 deposition Methods 0.000 claims abstract description 86
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 82
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims abstract description 35
- 238000000034 method Methods 0.000 claims abstract description 30
- 239000000126 substance Substances 0.000 claims abstract description 28
- 230000008569 process Effects 0.000 claims abstract description 26
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- 229920005591 polysilicon Polymers 0.000 claims description 44
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 36
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 20
- 239000002002 slurry Substances 0.000 claims description 20
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 18
- 229910052757 nitrogen Inorganic materials 0.000 claims description 18
- 239000001301 oxygen Substances 0.000 claims description 18
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- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 13
- 229910052698 phosphorus Inorganic materials 0.000 claims description 13
- 239000011574 phosphorus Substances 0.000 claims description 13
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Abstract
The invention discloses a boron diffusion method and a preparation method of an N-TOPCON battery, a battery and a battery component, and belongs to the technical field of TOPCON batteries and components, wherein a POLY layer is deposited on the front side of a cleaned silicon wafer by adopting a PECVD (plasma enhanced chemical vapor deposition) process, and BH (electro-thermal deposition) is introduced into the silicon wafer 3 The boron ions capture electrons to form boron simple substances which are uniformly distributed in the POLY layer, and then the front surface is selectively textured. The invention has the beneficial effects that: performing front POLY layer deposition on the cleaned silicon wafer and simultaneously depositing boron sheetMass, BH 3 Forming high-energy electrons and boron ions under the initiation of radio frequency energy, wherein the boron ions capture electrons to form boron simple substances, and uniformly distributing the boron simple substances in the POLY layer to form doping; the condition of amplifying the defects in the silicon substrate by high-temperature environment excitation is avoided, and meanwhile, the low-temperature process is adopted, so that energy sources are saved.
Description
Technical Field
The invention relates to the technical field of TOPCON batteries and components, in particular to a boron diffusion method and a preparation method of an N-TOPCON battery, a battery and a battery component.
Background
The TOPCON battery is a high-efficiency solar battery technology based on selective carrier principle and with a tunneling oxide passivation contact, the battery structure is an N-type silicon substrate battery, an ultrathin silicon oxide layer is prepared on the back of the battery, and then a doped silicon thin layer is deposited, so that a passivation contact structure is formed by the ultrathin silicon oxide layer and the doped silicon thin layer, and surface recombination and metal contact recombination are effectively reduced.
In the boron diffusion process, BCl is currently commonly used 3 And a means for generating a boron simple substance by thermal decomposition and diffusing from the Cz-Si surface to the Cz-Si interior in the case of a concentration difference. The problem with this approach is as follows:
(1) The solid solubility of boron in silicon is far lower than that of phosphorus, so that the chamber temperature and diffusion time required by boron in silicon are far longer than those required by phosphorus in silicon, and the silicon wafer is exposed in a high-temperature environment for a long time, so that internal defect amplification is easier to induce, defect centers are formed, recombination is enlarged, and short-circuit current and open-circuit voltage are severely lower.
(2)BCl 3 Thermal decomposition to intermediate B 2 O 3 At normal process temperature, B 2 O 3 When in a liquid state, the silicon wafer can not only corrode quartz devices such as furnace tubes and air tubes, but also corrode the surface of the silicon wafer, so that the doping degree of the surface of the silicon wafer is uneven;
(3) Due to boron in Si/SiO 2 Interfacial separation coefficient of less than 1, and boron simple substance more tends to diffuse from silicon to SiO 2 In this case, a large amount of boron is concentrated on the silicon surface to form a boron-rich layer, which is likely to cause not only a low efficiency but also defects such as blackening of EL.
In view of this, the present inventors have conducted intensive studies in response to this need, and have made the present invention.
Disclosure of Invention
To overcome the problem of the prior art that the boron diffusion process of the TOPCO battery adopts BCl 3 The boron simple substance generated by thermal decomposition is easy to induce the amplification of internal defects to form defect centers; corrosion silicon wafer meterSurface, the surface doping degree of the silicon wafer is uneven; the invention provides a boron diffusion method of an N-TOPCON battery, which comprises the following steps:
depositing a POLY layer on the front surface of the cleaned silicon wafer by adopting a PECVD process, and introducing BH 3 The boron ions capture electrons to form boron simple substances which are uniformly distributed in the POLY layer, and then the front surface is selectively textured.
Performing front POLY layer deposition on the cleaned silicon wafer and simultaneously depositing boron simple substance and BH (boron-hydrogen bonding) 3 Forming high-energy electrons and boron ions under the initiation of radio frequency energy, wherein the boron ions capture electrons to form boron simple substances, and uniformly distributing the boron simple substances in the POLY layer to form doping; the condition of amplifying the defects in the silicon substrate by high-temperature environment excitation is avoided, and meanwhile, the low-temperature process is adopted, so that energy sources are saved.
The flat surface of the silicon wafer is reserved in the grid line printing area, so that the plasticity of the silver grid line electrode is facilitated, the high-width ratio with better cost performance is obtained, the resistance of the silver grid line can be reduced by the proper high-width ratio, and the short-circuit current is facilitated to be improved; and a suede is formed in the light absorption area, so that the light absorption efficiency is improved, and the current is further improved.
Preferably, when the POLY layer is deposited on the front surface, the deposition temperature is controlled to be 500-620 ℃, the pressure is controlled to be 150-350 mttor, the deposition thickness is controlled to be 200-300 nm, and the doping concentration of boron is 1E 18-1E 19cm -3 。
Preferably, the selective texturing adopts the steps of keeping the flatness of the silicon wafer in a grid line printing area and forming a textured surface in a light absorption area.
Preferably, laser selective texturing is adopted, wherein the laser pulse repetition frequency is 50-200 kHz, the laser wavelength is 1064nm, and the laser pulse width is 20-200 ns.
Preferably, before the POLY layer is deposited on the front surface of the silicon wafer, hydrogen peroxide is used for cleaning to remove oil stains, organic matters and impurities on the surface of the silicon wafer, and meanwhile, the surface damage layer is removed.
Preferably, the reaction time is 50-250S during cleaning, the reaction temperature is 57-73 ℃, and the silicon wafer to be cleaned is placed into a water tank for water washing after the reaction is completed.
Preferably, the surface is oxidized after the front surface is selectively roughened. After the texturing is finished, an oxidation process is carried out, an oxide layer is formed on the surface, and the PN junction on the front side is protected from being etched in the subsequent process.
Preferably, a thermal oxidation treatment is employed, wherein the flow rate of oxygen is 50-1000 sccm, the flow rate of nitrogen is 50-3000 sccm, and the ratio of the flow rate of nitrogen to the flow rate of oxygen is (1-2): 1, the temperature of the thermal oxidation treatment is 300-1500 ℃.
The invention also provides a preparation method of the N-TOPCON battery, which adopts the boron diffusion method and comprises the following steps:
step one, cleaning;
performing boron diffusion while depositing a POLY layer on the front side by adopting a PECVD process, depositing the POLY layer on the front side, and introducing BH 3 The boron ions capture electrons to form boron simple substances which are uniformly distributed in the POLY layer;
step three, selectively texturing;
and step four, thermal oxidation.
Etching to remove the back BSG layer, and removing the edge PN junction by alkali polishing;
step six, depositing a tunneling oxide layer and a polysilicon layer on the back surface, and carrying out phosphorus diffusion doping on the polysilicon layer;
step seven, single-sided HF etching is carried out, and PSG layers on the front surface and the edge of the diffused polysilicon are plated around; removing the winding plating polysilicon layer by adopting an alkali solution etching mode, and cleaning and removing the BSG on the front side and the PSG on the back side by adopting hydrofluoric acid;
step eight, depositing a layer of compact AlOx film on the front surface of the substrate in an ALD atomic layer deposition mode;
step nine, depositing one or more laminated films of silicon nitride and silicon oxynitride on the front surface of the substrate in a PECVD mode; depositing one or more laminated films of silicon nitride and silicon oxynitride on the back surface of the substrate in a PECVD mode;
step ten, electrode Ag/Al slurry is printed on the front surface, and electrode Ag slurry is printed on the back surface; co-sintering to form good ohmic contact; light injection repairs cell body internal and surface defects.
The invention also provides an N-TOPCON battery which is prepared by adopting the preparation method.
The invention further provides a battery assembly, which comprises a plurality of N-TOPCON batteries, specifically comprises a plurality of N-TOPCON batteries with the same gear and the same efficiency, and is bonded at the head end and the tail end of the N-TOPCON batteries by adopting a conductive material with bonding property, and the positive electrode and the negative electrode of the adjacent two N-TOPCON batteries are connected.
The technical scheme of the invention has the following beneficial effects:
(1) Performing front POLY layer deposition on the cleaned silicon wafer and simultaneously depositing boron simple substance and BH (boron-hydrogen bonding) 3 Forming high-energy electrons and boron ions under the initiation of radio frequency energy, wherein the boron ions capture electrons to form boron simple substances, and uniformly distributing the boron simple substances in the POLY layer to form doping; the condition of amplifying the defects in the silicon substrate by high-temperature environment excitation is avoided, and meanwhile, the low-temperature process is adopted, so that energy sources are saved.
(2) The flat surface of the silicon wafer is reserved in the grid line printing area, so that the plasticity of the silver grid line electrode is facilitated, the high-width ratio with better cost performance is obtained, the resistance of the silver grid line can be reduced by the proper high-width ratio, and the short-circuit current is facilitated to be improved; and a suede is formed in the light absorption area, so that the light absorption efficiency is improved, and the current is further improved.
(3) After the texturing is finished, an oxidation process is carried out, an oxide layer is formed on the surface, and the PN junction on the front side is protected from being etched in the subsequent process.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some examples of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a preferred N-TOPCO battery process of the present invention;
fig. 2 is a diagram of the structure of a preferred N-TOPCON battery layer of the present invention.
In the figure, a 1, N-type matrix; 2. a P-type doped layer; 21. a P++ layer; 3. a passivation layer; 4. a front side antireflection layer; 5. a front metal electrode; 6. tunneling oxide layer; 7. a polysilicon layer; 8. a doped polysilicon layer; 9. a back side antireflection layer; 10. and a back metal electrode.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments. Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, based on the embodiments of the invention, which are apparent to those of ordinary skill in the art without inventive faculty, are intended to be within the scope of the invention.
In the embodiment, the front POLY layer deposition is carried out on the cleaned silicon wafer, and meanwhile, the boron simple substance and BH are deposited 3 Forming high-energy electrons and boron ions under the initiation of radio frequency energy, wherein the boron ions capture electrons to form boron simple substances, and uniformly distributing the boron simple substances in the POLY layer to form doping; the condition of amplifying the defects in the silicon substrate by high-temperature environment excitation is avoided, and meanwhile, the low-temperature process is adopted, so that energy sources are saved. The specific implementation mode is as follows:
a method of boron diffusion in an N-TOPCon cell comprising:
depositing a POLY layer on the front surface of the cleaned silicon wafer by adopting a PECVD process, and introducing BH 3 The boron ions capture electrons to form boron simple substances which are uniformly distributed in the POLY layer, and then the front surface is selectively textured.
The flat surface of the silicon wafer is reserved in the grid line printing area, so that the plasticity of the silver grid line electrode is facilitated, the high-width ratio with better cost performance is obtained, the resistance of the silver grid line can be reduced by the proper high-width ratio, and the short-circuit current is facilitated to be improved; and a suede is formed in the light absorption area, so that the light absorption efficiency is improved, and the current is further improved.
As a preferred embodiment, when the POLY layer is deposited on the front surface, the deposition temperature is controlled to be 500-620 ℃, the pressure is controlled to be 150-350 mttor, the deposition thickness is controlled to be 200-300 nm, and the doping concentration of boron is 1E 18-1E 19cm -3 。
As a preferred embodiment, the selective texturing is performed by keeping the flatness of the silicon wafer in the grid line printing area and forming the textured surface in the light absorption area.
As a preferred embodiment, laser selective texturing is used, wherein the laser pulse repetition frequency is 50-200 kHz, the laser wavelength is 1064nm, and the laser pulse width is 20-200 ns.
As a preferred embodiment, before the POLY layer is deposited on the front surface of the silicon wafer, hydrogen peroxide is used for cleaning to remove greasy dirt, organic matters and impurities on the surface of the silicon wafer, and meanwhile, a surface damage layer is removed, wherein the damage layer is derived from defects such as dislocation and the like generated during cutting of the silicon wafer.
As a preferred embodiment, the reaction time is 50-250S during cleaning, the reaction temperature is 57-73 ℃, and the silicon wafer to be cleaned is placed in a water tank for water washing after the reaction is completed.
As a preferred embodiment, the surface is subjected to an oxidation treatment after the front surface is selectively roughened. After the texturing is finished, an oxidation process is carried out, an oxide layer is formed on the surface, and the PN junction on the front side is protected from being etched in the subsequent process.
As a preferred embodiment, a thermal oxidation treatment is employed in which the flow rate of oxygen is 50 to 1000sccm, the flow rate of nitrogen is 50 to 3000sccm, and the ratio of the flow rate of nitrogen to the flow rate of oxygen is (1-2): 1, the temperature of the thermal oxidation treatment is 300-1500 ℃.
The embodiment also provides a preparation method of the N-TOPCON battery, which adopts the boron diffusion method, as shown in figure 1, and comprises the following steps:
step S101, silicon wafer inspection and cleaning, wherein incoming material inspection mainly comprises verticality, line marks, unfilled corners, hidden cracks, resistivity, warpage, O content, minority carrier lifetime, C content and the like;
step S102, performing boron diffusion while depositing a POLY layer on the front side by adopting a PECVD process, depositing the POLY layer on the front side, and introducing BH 3 The boron ions capture electrons to form boron simple substances which are uniformly distributed in the POLY layer; PECVD is a thin film growth technique that utilizes plasma to deposit at lower temperatures, which is based on a vacuum process, at pressures less than 0.1Torr, allowing relatively low substrate temperatures, from room temperature to 350 ℃, by powering the deposition reactions with the plasma rather than heating the substrate to very high temperatures. Because the PECVD deposition temperature is lower, the deposited film has smaller stress and stronger binding force. In a vacuum environment, the radio frequency energy initiates the raw material gas (SiH 4) to form plasma, and the plasma consists of high-energy electrons and silicon ions. The silicon ions capture electrons to form silicon atoms which are deposited on the surface of the silicon wafer, so that a uniform and compact amorphous silicon film is formed. While depositing POLY, introducing BH 3 (borane), BH3 is also affected by radio frequency energy to form high-energy electrons and boron ions, and the boron ions capture electrons to form boron simple substances, and uniformly distribute in the POLY layer to form preliminary doping. Depositing POLY layers on the front side further reduces the carrier recombination rate at the cell surface and reduces contact resistance, thereby further improving cell efficiency.
Step S103, selectively texturing; the anisotropic corrosion property of silicon in low-concentration alkali solution is utilized, namely the corrosion rate of silicon on the (110) crystal face and the (100) crystal face is far greater than that of the (111) crystal face. After a certain time of corrosion, four pyramids formed by (111) faces are left on the surface of the monocrystalline silicon piece; the selective texturing adopts the steps that the flatness of the silicon wafer is kept in a grid line printing area, and the texturing is formed in a light absorption area. Namely, a P++ layer is formed in the grid line printing area, and a P-type doped layer is formed in the light absorption area.
Step S104, thermal oxidation; an oxide layer is produced on the surface in a thermal oxidation mode, and the front PN junction is protected from being etched in the subsequent process.
Step S105, etching to remove the back BSG layer, and alkali polishing to remove the edge PN junction;
step S106, depositing a tunneling oxide layer and a polysilicon layer on the back surface, and performing phosphorus diffusion doping on the polysilicon layer;
step S107, single-sided HF etching is carried out, and PSG layers on the front surface and the edge of the diffused polysilicon surface are plated around; removing the winding plating polysilicon layer by adopting an alkali solution etching mode, and cleaning and removing the BSG on the front side and the PSG on the back side by adopting hydrofluoric acid;
step S108, depositing a layer of compact AlOx film on the front surface of the substrate in an ALD atomic layer deposition mode;
step S109, depositing one or more laminated films of silicon nitride and silicon oxynitride on the front surface of the substrate in a PECVD mode; depositing one or more laminated films of silicon nitride and silicon oxynitride on the back surface of the substrate in a PECVD mode;
step S110, electrode Ag/Al slurry is printed on the front surface, and electrode Ag slurry is printed on the back surface; co-sintering to form good ohmic contact; light injection repairs cell body internal and surface defects.
The embodiment also provides an N-TOPCON battery, which is prepared by the preparation method, and the layer structure of the N-TOPCON battery is shown in fig. 2, and the N-TOPCON battery structure comprises an N-type substrate 1, a P-type doped layer 2, a passivation layer 3, a front anti-reflection layer 4 and a front metal electrode 5 which are sequentially arranged on the front surface of the N-type substrate 1, and a tunneling oxide layer 6, a polysilicon layer 7, a doped polysilicon layer 8, a back anti-reflection layer 9 and a back metal electrode 10 which are sequentially arranged on the back surface of the N-type substrate 1, wherein the gate line printing area on the P-type doped layer 2 is a p++ layer 21.
The present embodiment also provides a battery assembly, which includes a plurality of N-TOPCON batteries, specifically, the N-TOPCON batteries with the same gear and the same efficiency, and the N-TOPCON batteries are bonded at the front end and the rear end of each N-TOPCON battery by adopting a conductive material with bonding property, and the positive and negative electrodes of two adjacent N-TOPCON batteries are connected.
The beneficial effects of the boron diffusion method of the N-TOPCON cell of this embodiment are further reviewed below by way of several sets of examples and comparative examples.
Example 1:
the preparation method of the N-TOPCON battery in the embodiment comprises the following steps:
step S101, checking and cleaning a silicon wafer;
step S102, performing boron diffusion while depositing a POLY layer on the front side by adopting a PECVD process, depositing the POLY layer on the front side, and introducing BH 3 The boron ions capture electrons to form boron simple substances which are uniformly distributed in the POLY layer;
when the POLY layer is deposited on the front surface, the deposition temperature is controlled at 550 ℃, the pressure is controlled at 200mttor, the deposition thickness is controlled at 250nm, and the doping concentration of boron is 1E 18-1E 19cm -3 。
Step S103, selectively texturing; laser is adopted for selective texturing, wherein the repetition frequency of laser pulse is 100kHz, the laser wavelength is 1064nm, the pulse width of laser is 100ns, the flatness of the silicon wafer is reserved in a grid line printing area, and the texturing is formed in a light absorption area.
Step S104, thermal oxidation; wherein the flow of oxygen is 400sccm, the flow of nitrogen is 1000sccm, and the ratio of the flow of nitrogen to the flow of oxygen is 1:1, the temperature of the thermal oxidation treatment is 1000 ℃;
step S105, etching to remove the back BSG layer, and alkali polishing to remove the edge PN junction;
step S106, depositing a tunneling oxide layer and a polysilicon layer on the back surface, and performing phosphorus diffusion doping on the polysilicon layer;
step S107, single-sided HF etching is carried out, and PSG layers on the front surface and the edge of the diffused polysilicon surface are plated around; removing the winding plating polysilicon layer by adopting an alkali solution etching mode, and cleaning and removing the BSG on the front side and the PSG on the back side by adopting hydrofluoric acid;
step S108, depositing a layer of compact AlOx film on the front surface of the substrate in an ALD atomic layer deposition mode;
step S109, depositing one or more laminated films of silicon nitride and silicon oxynitride on the front surface of the substrate in a PECVD mode; depositing one or more laminated films of silicon nitride and silicon oxynitride on the back surface of the substrate in a PECVD mode;
step S110, electrode Ag/Al slurry is printed on the front surface, and electrode Ag slurry is printed on the back surface; co-sintering to form good ohmic contact; light injection repairs cell body internal and surface defects.
Example 2:
the preparation method of the N-TOPCON battery in the embodiment comprises the following steps:
step S101, checking and cleaning a silicon wafer;
step S102, performing boron diffusion while depositing a POLY layer on the front side by adopting a PECVD process, depositing the POLY layer on the front side, and introducing BH 3 The boron ions capture electrons to form boron simple substances which are uniformly distributed in the POLY layer;
when the POLY layer is deposited on the front surface, the deposition temperature is controlled to 500 ℃, the pressure is controlled to 340mttor, the deposition thickness is controlled to 300nm, and the doping concentration of boron is 1E 18-1E 19cm -3 。
Step S103, selectively texturing; laser is adopted for selective texturing, wherein the repetition frequency of laser pulse is 150kHz, the laser wavelength is 1064nm, the pulse width of laser is 150ns, the flatness of the silicon wafer is reserved in a grid line printing area, and the texturing is formed in a light absorption area.
Step S104, thermal oxidation; wherein the flow of oxygen is 800sccm, the flow of nitrogen is 2000sccm, and the ratio of the flow of nitrogen to the flow of oxygen is 2:1, the temperature of the thermal oxidation treatment is 500 ℃;
step S105, etching to remove the back BSG layer, and alkali polishing to remove the edge PN junction;
step S106, depositing a tunneling oxide layer and a polysilicon layer on the back surface, and performing phosphorus diffusion doping on the polysilicon layer;
step S107, single-sided HF etching is carried out, and PSG layers on the front surface and the edge of the diffused polysilicon surface are plated around; removing the winding plating polysilicon layer by adopting an alkali solution etching mode, and cleaning and removing the BSG on the front side and the PSG on the back side by adopting hydrofluoric acid;
step S108, depositing a layer of compact AlOx film on the front surface of the substrate in an ALD atomic layer deposition mode;
step S109, depositing one or more laminated films of silicon nitride and silicon oxynitride on the front surface of the substrate in a PECVD mode; depositing one or more laminated films of silicon nitride and silicon oxynitride on the back surface of the substrate in a PECVD mode;
step S110, electrode Ag/Al slurry is printed on the front surface, and electrode Ag slurry is printed on the back surface; co-sintering to form good ohmic contact; light injection repairs cell body internal and surface defects.
Example 3:
the preparation method of the N-TOPCON battery in the embodiment comprises the following steps:
step S101, checking and cleaning a silicon wafer;
step S102, performing boron diffusion while depositing a POLY layer on the front side by adopting a PECVD process, depositing the POLY layer on the front side, and introducing BH 3 The boron ions capture electrons to form boron simple substances which are uniformly distributed in the POLY layer;
when the POLY layer is deposited on the front surface, the deposition temperature is controlled at 600 ℃, the pressure is controlled at 150mttor, the deposition thickness is controlled at 250nm, and the doping concentration of boron is 1E 18-1E 19cm -3 。
Step S103, selectively texturing; laser is adopted for selective texturing, wherein the repetition frequency of laser pulse is 100kHz, the laser wavelength is 1064nm, the pulse width of laser is 50ns, the flatness of the silicon wafer is reserved in a grid line printing area, and the texturing is formed in a light absorption area.
Step S104, thermal oxidation; wherein the flow of oxygen is 400sccm, the flow of nitrogen is 300sccm, and the ratio of the flow of nitrogen to the flow of oxygen is 1:1, the temperature of the thermal oxidation treatment is 800 ℃;
step S105, etching to remove the back BSG layer, and alkali polishing to remove the edge PN junction;
step S106, depositing a tunneling oxide layer and a polysilicon layer on the back surface, and performing phosphorus diffusion doping on the polysilicon layer;
step S107, single-sided HF etching is carried out, and PSG layers on the front surface and the edge of the diffused polysilicon surface are plated around; removing the winding plating polysilicon layer by adopting an alkali solution etching mode, and cleaning and removing the BSG on the front side and the PSG on the back side by adopting hydrofluoric acid;
step S108, depositing a layer of compact AlOx film on the front surface of the substrate in an ALD atomic layer deposition mode;
step S109, depositing one or more laminated films of silicon nitride and silicon oxynitride on the front surface of the substrate in a PECVD mode; depositing one or more laminated films of silicon nitride and silicon oxynitride on the back surface of the substrate in a PECVD mode;
step S110, electrode Ag/Al slurry is printed on the front surface, and electrode Ag slurry is printed on the back surface; co-sintering to form good ohmic contact; light injection repairs cell body internal and surface defects.
Comparative example 1:
the preparation method of the N-TOPCON battery in the comparative example comprises the following steps:
step S101, checking and cleaning a silicon wafer;
step S102, performing boron diffusion while depositing a POLY layer on the front side by adopting a PECVD process, depositing the POLY layer on the front side, and introducing BH 3 The boron ions capture electrons to form boron simple substances which are uniformly distributed in the POLY layer;
when the POLY layer is deposited on the front surface, the deposition temperature is controlled at 550 ℃, the pressure is controlled at 200mttor, the deposition thickness is controlled at 250nm, and the doping concentration of boron is 1E 18-1E 19cm -3 。
Step S103, texturing; laser texturing is adopted, wherein the repetition frequency of laser pulse is 100kHz, the laser wavelength is 1064nm, and the pulse width of laser is 100ns.
Step S104, thermal oxidation; wherein the flow of oxygen is 400sccm, the flow of nitrogen is 1000sccm, and the ratio of the flow of nitrogen to the flow of oxygen is 1:1, the temperature of the thermal oxidation treatment is 1000 ℃;
step S105, etching to remove the back BSG layer, and alkali polishing to remove the edge PN junction;
step S106, depositing a tunneling oxide layer and a polysilicon layer on the back surface, and performing phosphorus diffusion doping on the polysilicon layer;
step S107, single-sided HF etching is carried out, and PSG layers on the front surface and the edge of the diffused polysilicon surface are plated around; removing the winding plating polysilicon layer by adopting an alkali solution etching mode, and cleaning and removing the BSG on the front side and the PSG on the back side by adopting hydrofluoric acid;
step S108, depositing a layer of compact AlOx film on the front surface of the substrate in an ALD atomic layer deposition mode;
step S109, depositing one or more laminated films of silicon nitride and silicon oxynitride on the front surface of the substrate in a PECVD mode; depositing one or more laminated films of silicon nitride and silicon oxynitride on the back surface of the substrate in a PECVD mode;
step S110, electrode Ag/Al slurry is printed on the front surface, and electrode Ag slurry is printed on the back surface; co-sintering to form good ohmic contact; light injection repairs cell body internal and surface defects.
Comparative example 2:
the preparation method of the N-TOPCON battery in the comparative example comprises the following steps:
step S101, checking and cleaning a silicon wafer;
step S102, selectively texturing; adopting laser to selectively texture, wherein the repetition frequency of laser pulse is 100kHz, the laser wavelength is 1064nm, the pulse width of laser is 100ns, the flatness of the silicon wafer is reserved in a grid line printing area, and the texture is formed in a light absorption area;
step S103, performing boron diffusion while depositing the POLY layer on the front surface by adopting a PECVD process, depositing the POLY layer on the front surface, and introducing BH 3 The boron ions capture electrons to form boron simple substances which are uniformly distributed in the POLY layer;
when the POLY layer is deposited on the front surface, the deposition temperature is controlled at 550 ℃, the pressure is controlled at 200mttor, the deposition thickness is controlled at 250nm, and the doping concentration of boron is 1E 18-1E 19cm -3 。
Step S104, thermal oxidation; wherein the flow of oxygen is 400sccm, the flow of nitrogen is 1000sccm, and the ratio of the flow of nitrogen to the flow of oxygen is 1:1, the temperature of the thermal oxidation treatment is 1000 ℃;
step S105, etching to remove the back BSG layer, and alkali polishing to remove the edge PN junction;
step S106, depositing a tunneling oxide layer and a polysilicon layer on the back surface, and performing phosphorus diffusion doping on the polysilicon layer;
step S107, single-sided HF etching is carried out, and PSG layers on the front surface and the edge of the diffused polysilicon surface are plated around; removing the winding plating polysilicon layer by adopting an alkali solution etching mode, and cleaning and removing the BSG on the front side and the PSG on the back side by adopting hydrofluoric acid;
step S108, depositing a layer of compact AlOx film on the front surface of the substrate in an ALD atomic layer deposition mode;
step S109, depositing one or more laminated films of silicon nitride and silicon oxynitride on the front surface of the substrate in a PECVD mode; depositing one or more laminated films of silicon nitride and silicon oxynitride on the back surface of the substrate in a PECVD mode;
step S110, electrode Ag/Al slurry is printed on the front surface, and electrode Ag slurry is printed on the back surface; co-sintering to form good ohmic contact; light injection repairs cell body internal and surface defects.
Comparative example 3:
the preparation method of the N-TOPCON battery in the comparative example comprises the following steps:
step S101, checking and cleaning a silicon wafer;
step S102, boron diffusion is carried out to form a front PN junction;
step S103, selectively texturing; laser is adopted for selective texturing, wherein the repetition frequency of laser pulse is 100kHz, the laser wavelength is 1064nm, the pulse width of laser is 100ns, the flatness of the silicon wafer is reserved in a grid line printing area, and the texturing is formed in a light absorption area.
Step S104, thermal oxidation; wherein the flow of oxygen is 400sccm, the flow of nitrogen is 1000sccm, and the ratio of the flow of nitrogen to the flow of oxygen is 1:1, the temperature of the thermal oxidation treatment is 1000 ℃;
step S105, etching to remove the back BSG layer, and alkali polishing to remove the edge PN junction;
step S106, depositing a tunneling oxide layer and a polysilicon layer on the back surface, and performing phosphorus diffusion doping on the polysilicon layer;
step S107, single-sided HF etching is carried out, and PSG layers on the front surface and the edge of the diffused polysilicon surface are plated around; removing the winding plating polysilicon layer by adopting an alkali solution etching mode, and cleaning and removing the BSG on the front side and the PSG on the back side by adopting hydrofluoric acid;
step S108, depositing a layer of compact AlOx film on the front surface of the substrate in an ALD atomic layer deposition mode;
step S109, depositing one or more laminated films of silicon nitride and silicon oxynitride on the front surface of the substrate in a PECVD mode; depositing one or more laminated films of silicon nitride and silicon oxynitride on the back surface of the substrate in a PECVD mode;
step S110, electrode Ag/Al slurry is printed on the front surface, and electrode Ag slurry is printed on the back surface; co-sintering to form good ohmic contact; light injection repairs cell body internal and surface defects.
Comparative example 4:
the preparation method of the N-TOPCON battery in the comparative example comprises the following steps:
step S101, texturing, namely eliminating organic contamination and metal impurities on the surface of a silicon wafer by using acid-base chemicals, forming a surface texture on the surface of the silicon wafer, increasing the absorption of sunlight and reducing reflection;
step S102, boron diffusion is carried out to form a front PN junction;
step S103, single-sided HF etching is carried out to remove the back BSG layer;
step S104, back etching is carried out to remove PN junctions formed by parasitic diffusion on the back, so that edge leakage is prevented;
step S105, adopting LPCVD technology, generating tunneling oxide layer by in-situ oxidation, and depositing polysilicon layer;
step S106, phosphorus diffusion is carried out, and phosphorus diffusion doping is carried out on the back polysilicon;
step S107, single-sided HF etching is carried out, and PSG layers on the front surface and the edge of the diffused polysilicon surface are plated around; removing the winding plating polysilicon layer by adopting an alkali solution etching mode, and cleaning and removing the BSG on the front side and the PSG on the back side by adopting hydrofluoric acid;
step S108, depositing a layer of compact AlOx film on the front surface of the substrate in an ALD atomic layer deposition mode;
step S109, depositing one or more laminated films of silicon nitride and silicon oxynitride on the front surface of the substrate in a PECVD mode; depositing one or more laminated films of silicon nitride and silicon oxynitride on the back surface of the substrate in a PECVD mode;
step S110, electrode Ag/Al slurry is printed on the front surface, and electrode Ag slurry is printed on the back surface; co-sintering to form good ohmic contact; light injection repairs cell body internal and surface defects.
The batteries obtained in examples 1to 3 and comparative examples 1to 4 were subjected to the test under the same conditions, and the test results are shown in Table 1.
Table 1 example and comparative example battery test results
| Category(s) | Opening pressure (mV) | Short flow (A) | Filling (%) | eta(％) | String resistor rs (mΩ) | And block rsh | irev2 |
| Example 1 | 725.1 | 13.693 | 85.06 | 25.58 | 0.966 | 1788.2 | 0.093 |
| Example 2 | 725.3 | 13.688 | 85.05 | 25.58 | 0.960 | 1782.2 | 0.078 |
| Example 3 | 725.1 | 13.691 | 85.04 | 25.57 | 0.962 | 1793.2 | 0.085 |
| Comparative example 1 | 725.3 | 13.661 | 85.03 | 25.52 | 0.963 | 1778.5 | 0.068 |
| Comparative example 2 | 724.9 | 13.669 | 85.03 | 25.52 | 0.961 | 1767.9 | 0.085 |
| Comparative example 3 | 725.7 | 13.662 | 85.01 | 25.53 | 0.972 | 1799.4 | 0.085 |
| Comparative example 4 | 725.9 | 13.655 | 85.03 | 25.53 | 0.961 | 1812.6 | 0.067 |
As shown in table 1, the charge and discharge efficiency eta, the short-circuit current Isc, and the fill factor FF of the batteries in examples 1to 3 were significantly improved relative to comparative examples 1to 4.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, and various modifications and variations may be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
- The boron diffusion method of the N-TOPCON battery is characterized by comprising the following steps of:depositing a POLY layer on the front surface of the cleaned silicon wafer by adopting a PECVD process, and introducing BH 3 The boron ions capture electrons to form boron simple substances which are uniformly distributed in the POLY layer, and then the front surface is selectively textured.
- 2. The boron diffusion method of an N-TOPCon cell according to claim 1, wherein when the POLY layer is deposited on the front side, the deposition temperature is controlled to be 500-620 ℃, the pressure is controlled to be 150-350 mttor, the deposition thickness is controlled to be 200-300 nm, and the doping concentration of boron is 1E 18-1E 19cm -3 。
- 3. The boron diffusion method of the N-TOPCon cell according to claim 1, wherein the selective texturing is performed by keeping the flatness of the silicon wafer in the gate line printing area and forming the textured surface in the light absorbing area.
- 4. The boron diffusion method of an N-TOPCon cell according to claim 3, wherein the selective texturing is performed by using a laser, wherein the laser pulse repetition frequency is 50-200 kHz, the laser wavelength is 1064nm, and the pulse width of the laser is 20-200 ns.
- 5. The boron diffusion method of the N-TOPCon battery according to claim 1, wherein before the POLY layer is deposited on the front surface of the silicon wafer, the surface oil stain, organic matters and impurities on the surface of the silicon wafer are removed by adopting hydrogen peroxide in a cleaning way, and meanwhile, the surface damage layer is removed;the reaction time is 50-250S during cleaning, the reaction temperature is 57-73 ℃, and the silicon wafer to be cleaned is placed into a water tank for water washing after the reaction is completed.
- 6. The boron diffusion method of the N-TOPCon battery according to claim 1, wherein the surface is subjected to oxidation treatment after the front surface is selectively textured.
- 7. The boron diffusion method of an N-TOPCon battery according to claim 6, wherein a thermal oxidation treatment is employed, wherein the flow rate of oxygen is 50 to 1000sccm, the flow rate of nitrogen is 50 to 3000sccm, and the ratio of the flow rate of nitrogen to the flow rate of oxygen is (1-2): 1, the temperature of the thermal oxidation treatment is 300-1500 ℃.
- A method of preparing an n-TOPCon cell using the boron diffusion method of any one of claims 1-7, comprising the steps of:step one, cleaning;performing boron diffusion while depositing a POLY layer on the front side by adopting a PECVD process, depositing the POLY layer on the front side, and introducing BH 3 The boron ions capture electrons to form boron simple substances which are uniformly distributed in the POLY layer;step three, selectively texturing;and step four, thermal oxidation.Etching to remove the back BSG layer, and removing the edge PN junction by alkali polishing;step six, depositing a tunneling oxide layer and a polysilicon layer on the back surface, and carrying out phosphorus diffusion doping on the polysilicon layer;step seven, single-sided HF etching is carried out, and PSG layers on the front surface and the edge of the diffused polysilicon are plated around; removing the winding plating polysilicon layer by adopting an alkali solution etching mode, and cleaning and removing the BSG on the front side and the PSG on the back side by adopting hydrofluoric acid;step eight, depositing a layer of compact AlOx film on the front surface of the substrate in an ALD atomic layer deposition mode;step nine, depositing one or more laminated films of silicon nitride and silicon oxynitride on the front surface of the substrate in a PECVD mode; depositing one or more laminated films of silicon nitride and silicon oxynitride on the back surface of the substrate in a PECVD mode;step ten, electrode Ag/Al slurry is printed on the front surface, and electrode Ag slurry is printed on the back surface; co-sintering to form good ohmic contact; light injection repairs cell body internal and surface defects.
- 9. A battery prepared by the method of claim 8.
- 10. A battery assembly comprising a plurality of batteries according to claim 9.
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