CN111987182A - TOPCon solar cell and manufacturing method thereof - Google Patents
TOPCon solar cell and manufacturing method thereof Download PDFInfo
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- CN111987182A CN111987182A CN202010874903.8A CN202010874903A CN111987182A CN 111987182 A CN111987182 A CN 111987182A CN 202010874903 A CN202010874903 A CN 202010874903A CN 111987182 A CN111987182 A CN 111987182A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 15
- 229910021424 microcrystalline silicon Inorganic materials 0.000 claims abstract description 71
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 60
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 60
- 239000010703 silicon Substances 0.000 claims abstract description 60
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 40
- 238000006243 chemical reaction Methods 0.000 claims abstract description 36
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 31
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 30
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 29
- 238000000137 annealing Methods 0.000 claims abstract description 23
- 238000002161 passivation Methods 0.000 claims abstract description 23
- 239000013078 crystal Substances 0.000 claims abstract description 15
- 238000000034 method Methods 0.000 claims description 52
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 22
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical group [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 21
- 229910052739 hydrogen Inorganic materials 0.000 claims description 21
- 239000001257 hydrogen Substances 0.000 claims description 21
- 229910000077 silane Inorganic materials 0.000 claims description 21
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 claims description 17
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 claims description 16
- 238000002425 crystallisation Methods 0.000 claims description 15
- 230000008025 crystallization Effects 0.000 claims description 15
- 229920005591 polysilicon Polymers 0.000 claims description 14
- 239000012495 reaction gas Substances 0.000 claims description 13
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- 238000000151 deposition Methods 0.000 claims description 12
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- 238000009792 diffusion process Methods 0.000 description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
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- 238000007650 screen-printing Methods 0.000 description 4
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- 230000003667 anti-reflective effect Effects 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 3
- 239000011259 mixed solution Substances 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 239000000243 solution Substances 0.000 description 3
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 230000002378 acidificating effect Effects 0.000 description 2
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- 238000007517 polishing process Methods 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- -1 silver aluminum Chemical compound 0.000 description 2
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- 239000010453 quartz Substances 0.000 description 1
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- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
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- H—ELECTRICITY
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- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
- H01L31/0264—Inorganic materials
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- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
- H01L31/0368—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors
- H01L31/03682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors including only elements of Group IV of the Periodic System
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- H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
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- H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic System
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- Y02E10/547—Monocrystalline silicon PV cells
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Abstract
The invention provides a TOPCon solar cell and a manufacturing method thereof. The manufacturing method comprises the following steps: (a) providing an N-type silicon wafer for a TOPCon solar cell; (b) texturing the silicon wafer and diffusing the silicon wafer on the first surface to form a PN junction; (c) sequentially forming a silicon oxide layer, a microcrystalline silicon seed crystal layer, an amorphous-doped silicon layer or a microcrystalline-doped silicon layer on a second surface of the silicon wafer, which is opposite to the first surface; (d) crystallizing and annealing the silicon wafer to crystallize microcrystalline silicon and/or amorphous silicon into polycrystalline silicon; (e) forming a first antireflection passivation film and a second antireflection passivation film on the first surface and the second surface of the silicon wafer respectively; forming a first electrode and a second electrode on the first surface and the second surface of the silicon wafer, respectively. The invention can effectively solve the problem that the doped amorphous silicon layer or the doped microcrystalline silicon layer explodes when reaching a certain thickness, can effectively reduce leakage current, and is beneficial to improving the open-circuit voltage, the filling factor and the conversion efficiency of the TOPCon battery.
Description
Technical Field
The invention relates to the field of solar cell manufacturing, in particular to a TOPCon solar cell and a manufacturing method thereof.
Background
The concept of TOPCon solar cells was first proposed by Fraunhofer ISE on 2013 at 28 th EU PVSEC using an ultra-thin silicon oxide layer with doped amorphous silicon to passivate the back side of the cell. The structure provides good surface passivation for the back of the battery, the ultrathin silicon oxide layer can enable multi-electron tunneling to enter the polycrystalline silicon layer and simultaneously block minority hole recombination, and then electrons are transversely transmitted in the polycrystalline silicon layer and collected by metal, so that metal contact recombination current is greatly reduced, and open-circuit voltage and short-circuit current of the battery are improved.
In the prior art, Deposition of a passivation layer on the back surface of a TOPCon solar cell by a furnace-tube Low Pressure Chemical Vapor Deposition (LPCVD) technique specifically includes the following steps: firstly, depositing a silicon oxide layer and amorphous silicon at the temperature of 500-650 ℃ (DEG C); then, in order to solve the problem of the plating-around of the liquid source, the amorphous silicon is doped by using ion implantation equipment to form doped amorphous silicon.
The process for forming the passivation layer on the back surface of the TOPCon battery by adopting the furnace tube type LPCVD has the following problems: firstly, the temperature for depositing the silicon oxide layer and the amorphous silicon is too high; secondly, additional ion implantation equipment is required, which increases the complexity of the manufacturing process; thirdly, the amorphous silicon is doped by ion implantation, so that the problems of uniformity and concentric circles exist; fourth, the quartz tube of the tube furnace is expensive, is a consumable item, and needs to be replaced frequently.
Therefore, how to provide a TOPCon solar cell and a method for manufacturing the same to improve various performances of the cell and avoid the occurrence of film explosion when amorphous silicon is crystallized at high temperature has become a technical problem to be solved in the industry.
Disclosure of Invention
In view of the above problems of the prior art, the present invention provides a method for manufacturing a TOPCon solar cell, the method comprising the steps of: (a) providing an N-type silicon wafer for a TOPCon solar cell; (b) texturing the silicon wafer and diffusing the silicon wafer on the first surface to form a PN junction; (c) sequentially forming a silicon oxide layer, a microcrystalline silicon seed crystal layer and an amorphous-doped silicon layer or a microcrystalline-doped silicon layer on a second surface of the silicon wafer, which is opposite to the first surface; (d) crystallizing and annealing the silicon wafer to crystallize microcrystalline silicon and/or amorphous silicon into polycrystalline silicon; (e) forming a first anti-reflection passivation film and a second anti-reflection passivation film on the first surface and the second surface of the silicon wafer respectively; forming a first electrode and a second electrode on the first side and the second side of the silicon wafer, respectively.
In one embodiment, the reaction gas for forming the silicon oxide layer in step (c) is laughing gas (N)20) Or ozone (O)3) The reaction pressure is 0.2-5 millibar (mbar), the reaction temperature is 160-300 ℃ and the thickness of the generated silicon oxide layer is 0.5-5 nanometers (nm).
In one embodiment, the microcrystalline silicon seed layer is formed in the step (c) through a Plasma Enhanced Chemical Vapor Deposition (PECVD) process, the formed microcrystalline silicon seed layer is composed of one seed layer or a plurality of seed layers, the reaction gas for forming the deposited microcrystalline silicon seed layer is silane and hydrogen, the volume ratio of silane to hydrogen is 1 (10-500), the reaction pressure is 0.25-5 mbar, the reaction temperature is 150-250 ℃, and the thickness of the generated microcrystalline silicon seed layer is 0.5-5 nm.
In one embodiment, the flow rate of silane during the deposition of the microcrystalline silicon seed layer in step (c) is 80 to 100 standard liters per hour (lph), the flow rate of hydrogen is 6000 to 8000 standard liters per hour, the reaction pressure is 0.25 to 5 mbar, the reaction temperature is 190 ℃, and the reaction time is 10 to 15 seconds.
In one embodiment, the doped amorphous silicon layer is formed in the step (c) through a plasma enhanced chemical vapor deposition process, wherein the reaction gas for forming the doped amorphous silicon layer is phosphine, silane and hydrogen, the volume ratio of the phosphine to the silane to the hydrogen is (0.01-0.1): 1- (1-20), the reaction pressure is 0.25-5 mbar, the reaction temperature is 150-250 ℃, and the thickness of the generated doped amorphous silicon layer is 50-250 nm.
In one embodiment, the doped microcrystalline silicon layer is formed in the step (c) through a plasma enhanced chemical vapor deposition process, wherein reaction gases for forming the doped microcrystalline silicon layer are phosphane, silane and hydrogen, the volume ratio of the phosphane to the silane to the hydrogen is (0.01-0.1): 1 (10-500), the reaction pressure is 0.25-5 mbar, the reaction temperature is 150-350 ℃, and the thickness of the formed doped microcrystalline silicon layer is 50-250 nm.
In one embodiment, the temperature of the crystallization annealing treatment in the step (d) is 600 to 950 ℃, and the annealing time is 20 to 60 minutes.
In one embodiment, the silicon oxide layer, the microcrystalline silicon seed layer, and the doped amorphous silicon layer or the doped microcrystalline silicon layer are sequentially formed in the same PECVD apparatus in step (c).
The invention also provides a TOPCon solar cell made by the method of any of the above embodiments, comprising: an N-type silicon wafer having opposing first and second surfaces; the P-type doping layer, the first anti-reflection passivation film and the first electrode are sequentially stacked on the first surface of the silicon wafer, and the P-type doping layer and the N-type silicon wafer form a PN junction; the silicon oxide layer, the first polycrystalline silicon layer, the second anti-reflection passivation film and the second electrode are sequentially stacked on the second surface of the silicon wafer; the first polycrystalline silicon layer and the second polycrystalline silicon layer are respectively and correspondingly formed by carrying out crystallization annealing treatment on the microcrystalline silicon seed crystal layer and the doped amorphous silicon layer or the doped microcrystalline silicon layer.
In one embodiment, the second polysilicon layer is formed by performing a crystallization annealing process on the N-type doped amorphous silicon layer or the N-type doped microcrystalline silicon layer.
Compared with the prior art, the invention has the following beneficial effects:
firstly, the silicon oxide layer, the microcrystalline silicon seed crystal layer, the doped amorphous silicon layer or the doped microcrystalline silicon layer are sequentially formed on the second surface of the silicon wafer, the microcrystalline silicon seed crystal layer is introduced, so that the film stress of the doped amorphous silicon layer or the doped microcrystalline silicon layer can be greatly reduced, good film adhesion can be still ensured after the silicon wafer is annealed into polycrystalline silicon, and the problem that the doped amorphous silicon layer or the doped microcrystalline silicon layer explodes when reaching a certain thickness can be solved.
Secondly, the microcrystalline silicon seed crystal layer is introduced, so that the film forming quality of the doped amorphous silicon layer or the doped microcrystalline silicon layer can be improved, the open voltage, the filling factor and the conversion efficiency of the TOPCon battery can be improved, and the leakage current can be effectively reduced.
Thirdly, the silicon oxide layer, the microcrystalline silicon seed crystal layer, the doped amorphous silicon layer or the doped microcrystalline silicon layer can be formed in the same PECVD device in sequence, so that the device and the process can be simplified, the diffusion uniformity can be improved, and the requirements of basically no easily-consumed and easily-damaged part, no cavity maintenance and convenience for self-cleaning of the device can be realized.
Fourthly, the reaction gas for forming the silicon oxide layer is laughing gas or ozone, so that the thickness of the generated silicon oxide layer does not exceed a preset range, and the TOPCon battery is very suitable for passivation and tunneling requirements of TOPCon batteries.
Drawings
The above features and advantages of the present disclosure will be better understood upon reading the detailed description of embodiments of the disclosure in conjunction with the following drawings. In the drawings, components are not necessarily drawn to scale, and components having similar relative characteristics or features may have the same or similar reference numerals.
Fig. 1 is a schematic structural diagram of a topocon solar cell according to an embodiment of the present invention;
fig. 2 is a schematic flow chart of a method for manufacturing a TOPCon solar cell according to a first embodiment of the present invention; and
fig. 3 is a schematic flow chart of a second embodiment of the method for manufacturing a TOPCon solar cell according to the present invention.
Detailed description of the preferred embodiments
The invention will be described in detail below with reference to the accompanying drawings and specific embodiments so that the objects, features and advantages of the invention can be more clearly understood. It should be understood that the aspects described below in connection with the figures and the specific embodiments are exemplary only, and should not be construed as limiting the scope of the invention in any way. The singular forms "a", "an" and "the" include plural referents unless the context clearly dictates otherwise.
Referring to fig. 1, which shows a schematic structural diagram of a TOPCon solar cell 1 according to an embodiment of the present invention, the TOPCon solar cell 1 includes an N-type silicon wafer 10, a P-type diffusion layer 11 sequentially stacked on a first surface (i.e., a front surface or a light receiving surface) S1 of the N-type silicon wafer 10, a first anti-reflection passivation film 12, and a first electrode 13 forming an ohmic contact with the P-type diffusion layer 11. The P-type diffusion layer 11 and the N-type silicon wafer 10 form a PN junction. The first surface S1 of the silicon wafer 10 may have a pyramid-like texture surface formed by an alkali solution texturing process, and the first anti-reflective passivation film 12 may be a silicon nitride film, which not only has an anti-reflective effect, but also has a passivation effect.
The topocon solar cell 1 further has a silicon oxide layer 14, a first polysilicon layer 15, a second polysilicon layer 16, a second anti-passivation film 17, and a second electrode 18 forming an ohmic contact with the second polysilicon layer 16, which may include a silicon nitride film, sequentially stacked on the second surface (i.e., the back surface) S2 thereof. The second side S2 of the silicon wafer 10 may be polished by an alkaline solution such as sodium hydroxide or potassium hydroxide (or an acidic mixed solution of nitric acid and hydrofluoric acid).
The thickness of the silicon oxide layer 14 is 0.5 to 5 nanometers (nm), and the reaction gas for forming the silicon oxide layer 14 is laughing gas N20 or ozone O3Etc., when the reaction gas is laughing gas, the silicon oxide layer 14 may be formed by a PECVD process in a plasma enhanced chemical vapor deposition (i.e., PECVD) apparatus.
The first polycrystalline silicon layer 15 is formed by performing crystallization annealing treatment on a microcrystalline silicon seed layer, the microcrystalline silicon seed layer is an undoped microcrystalline silicon layer, and the microcrystalline silicon seed layer can be composed of one seed crystal layer or a plurality of seed crystal layers; the second polysilicon layer 16 is formed by performing crystallization annealing on a doped amorphous silicon layer, which is an N-type amorphous silicon layer, or a doped microcrystalline silicon layer, which is an N-type microcrystalline silicon layer. The temperature of the crystallization annealing treatment can be 600-950 ℃, and the annealing time can be 20-60 minutes.
The thickness of the first polysilicon layer 15 is 0.5-5 nm, and the thickness of the second polysilicon layer 16 is 50-250 nm.
The first electrode 13 may be formed by screen printing and sintering of silver paste commonly used in the art, and the second electrode 18 may be formed by screen printing and sintering of silver paste or silver aluminum paste commonly used in the art. The specific thicknesses and characteristics of the other components of the TOPCon solar cell 1 are known to those skilled in the art and will not be described in detail herein.
Referring to fig. 2, a first embodiment of the method of fabricating the TOPCon solar cell of the present invention is shown. The method 20 shown in fig. 2 first proceeds to step S200, where an N-type silicon wafer for a TOPCon solar cell is provided. The N-type silicon wafer can be an N-type monocrystalline silicon wafer with the current or future common size of 125mm multiplied by 125mm, 156mm multiplied by 156mm, 166mm multiplied by 166mm or 210mm multiplied by 210mm and the like.
The method 20 then proceeds to step S210, where the silicon wafer is textured and diffused on its first side S1 to form a PN junction. In this embodiment, the solution (e.g., sodium hydroxide solution, isopropyl alcohol, and Na) may be etched by alkali in step S2102SiO3Mixed solution of (b) to remove a damage layer and form a pyramid-like textured surface on the single crystal silicon wafer, and to perform P-type diffusion on the first surface S1 to form a PN junction with the N-type silicon wafer 10.
The method 20 then proceeds to step S220 where a silicon oxide layer 14 is formed on a second side S2 of the silicon wafer opposite the first side S1. The reaction gas for forming the silicon oxide layer 14 in step S220 may be laughing gas N20 or ozone O3The reaction pressure can be 0.2-5 mbar, the reaction temperature can be 160-300 ℃, and the thickness of the formed silicon oxide layer 14 can be 0.5-5 nm. In the present embodiment, the reaction gas for forming the silicon oxide layer 14 in step S220 is laughing gas N20, which may be deposited by a PECVD process in a PECVD apparatus.
The method 20 then proceeds to step S230, where a microcrystalline silicon seed layer is deposited on the silicon oxide layer 14 by a PECVD process. The reaction gas for depositing the microcrystalline silicon seed crystal layer in the step S230 is silane and hydrogen, the volume ratio of the silane to the hydrogen can be 1 (10-500), the reaction pressure can be 0.25-5 mbar, the reaction temperature can be 150-250 ℃, and the thickness of the formed microcrystalline silicon seed crystal layer can be 0.5-5 nm; the microcrystalline silicon seed layer formed may consist of one seed layer or multiple seed layers, and the PECVD process for forming each seed layer may be different.
In this embodiment, the flow rate of silane for depositing the microcrystalline silicon seed layer in step S230 is 80 to 100 standard liters per hour (lph), the flow rate of hydrogen is 6000 to 8000 standard liters per hour (lph), the reaction pressure is 0.5 to 3 millibars (mbar), the reaction temperature is 190 ℃, and the reaction time is 10 to 15 seconds.
The method 20 then proceeds to step S240, where a doped amorphous silicon layer is deposited on the microcrystalline silicon seed layer by a PECVD process. In this embodiment, the reaction gas for depositing the doped amorphous silicon layer in step S240 is phosphane, silane and hydrogen, the volume ratio of the phosphane, the silane and the hydrogen is (0.01-0.1): 1 (1-20), the reaction pressure is 0.25-5 mbar, the reaction temperature is 150-250 ℃, and the thickness of the generated doped amorphous silicon layer is 50-250 nm.
The Radio Frequency (RF) frequency of the PECVD process in steps S230 and S240 may be 13.56MHz or 40MHz, and the formation of the silicon oxide layer in step S220, the deposition of the microcrystalline silicon seed layer in step S230, and the deposition of the doped amorphous silicon layer or the doped microcrystalline silicon layer in step S240 may be performed in the same PECVD apparatus, so that the apparatus and the process can be simplified, the diffusion uniformity can be improved, and substantially no consumable parts can be realized, the maintenance of an open cavity is avoided, and the self-cleaning of the apparatus is facilitated.
The method 20 then proceeds to step S250, where the silicon wafer is crystallized and annealed to crystallize the microcrystalline silicon seed layer and the doped amorphous silicon layer into polysilicon, where the crystallization and annealing causes the microcrystalline silicon seed layer to form the first polysilicon layer 15 and the doped amorphous silicon layer to form the second polysilicon layer 16, the temperature of the crystallization and annealing may be 600-950 ℃, and the annealing time may be 20-60 minutes.
The method 20 then proceeds to step S260, where a first anti-passivation film 12 and a second anti-passivation film 17 are deposited on the first surface and the second surface of the silicon wafer, respectively. Both the first and second anti-reflective passivation films 12 and 17 may be silicon nitride.
The method 20 then proceeds to step S270 to form a first electrode 13 and a second electrode 18 on the first side S1 and the second side S2, respectively, of the silicon wafer. The first electrode 13 may be formed by screen printing and sintering of silver paste commonly used in the art, and the second electrode 18 may be formed by screen printing and sintering of silver paste or silver aluminum paste commonly used in the art.
The method 20 may further include, before the step S220, a step of polishing the second side S2, wherein the polishing process may be performed by an alkaline solution such as sodium hydroxide or potassium hydroxide (or an acidic mixed solution of nitric acid and hydrofluoric acid, and the pyramidal texture on the second side S2 is substantially completely removed by etching after the polishing process.
Referring to fig. 3, a second embodiment of the method of fabricating a TOPCon solar cell of the present invention is shown. The method 30 shown in fig. 3 has the same steps as the corresponding steps of the method 20 except that steps S340 and S350 are different from steps S240 and S250 of the method 20. The same points of the two embodiments of the method are not described herein again.
After the step S230 is completed, the method 30 performs a step S340, and a doped microcrystalline silicon layer is deposited on the microcrystalline silicon seed crystal layer through a PECVD process, wherein the reaction gas for depositing the doped microcrystalline silicon layer is phosphine, silane and hydrogen, the volume ratio of the phosphine to the silane to the hydrogen is (0.01-0.1): 1 (10-500), the reaction pressure is 1-5 mbar, the reaction temperature is 150-350 ℃, and the thickness of the generated doped microcrystalline silicon layer is 50-250 nm.
The method 30 proceeds to step S350 after step S340, and performs a crystallization annealing process on the silicon wafer to crystallize the microcrystalline silicon seed layer and the doped microcrystalline silicon layer into a polysilicon layer, wherein the crystallization annealing process causes the microcrystalline silicon seed layer to form the first polysilicon layer 15 and causes the doped microcrystalline silicon layer to form the second polysilicon layer 16, the temperature of the crystallization annealing process may be 600-950 ℃, and the annealing time may be 20-60 minutes.
The TOPCon solar cell and the manufacturing method thereof firstly provide an N-type silicon wafer for the TOPCon solar cell; then, texturing the silicon wafer and diffusing the silicon wafer on the first surface to form a PN junction; sequentially forming a silicon oxide layer, a microcrystalline silicon seed crystal layer, an amorphous-doped silicon layer or a microcrystalline-doped silicon layer on a second surface of the silicon wafer, which is opposite to the first surface, by using plasma enhanced chemical vapor deposition equipment; then, carrying out crystallization annealing treatment on the silicon wafer to crystallize microcrystalline silicon and/or amorphous silicon into polycrystalline silicon; depositing a first antireflection passivation film and a second antireflection passivation film on the first surface and the second surface of the silicon wafer respectively; and finally, forming a first electrode and a second electrode on the first surface and the second surface of the silicon wafer respectively. The invention can greatly reduce the film stress of the doped amorphous silicon layer or the doped microcrystalline silicon layer, can still ensure good film adhesion after the film is annealed into polycrystalline silicon, and can solve the problem that the doped amorphous silicon layer or the doped microcrystalline silicon layer explodes when reaching a certain thickness. The invention can also improve the film forming quality of the doped amorphous silicon layer or the doped microcrystalline silicon layer, is beneficial to effectively reducing leakage current, and can improve the open voltage, the filling factor and the conversion efficiency of the TOPCon battery.
The embodiments described above are provided to enable persons skilled in the art to make or use the invention and that modifications or variations can be made to the embodiments described above by persons skilled in the art without departing from the inventive concept of the present invention, so that the scope of protection of the present invention is not limited by the embodiments described above but should be accorded the widest scope consistent with the innovative features set forth in the claims.
Claims (10)
1. A method of fabricating a TOPCon solar cell, the method comprising the steps of:
(a) providing an N-type silicon wafer for a TOPCon solar cell;
(b) texturing the silicon wafer and diffusing the silicon wafer on the first surface to form a PN junction;
(c) sequentially forming a silicon oxide layer, a microcrystalline silicon seed crystal layer and an amorphous-doped silicon layer or a microcrystalline-doped silicon layer on a second surface of the silicon wafer, which is opposite to the first surface;
(d) crystallizing and annealing the silicon wafer to crystallize microcrystalline silicon and/or amorphous silicon into polycrystalline silicon;
(e) forming a first anti-reflection passivation film and a second anti-reflection passivation film on the first surface and the second surface of the silicon wafer respectively; and
(f) forming a first electrode and a second electrode on said first side and second side of the silicon wafer, respectively.
2. The method of claim 1, wherein the reaction gas for forming the silicon oxide layer in the step (c) is laughing gas or ozone, the reaction pressure is 0.2 to 5 mbar, the reaction temperature is 160 to 300 degrees celsius, and the thickness of the silicon oxide layer formed is 0.5 to 5 nm.
3. The method as claimed in claim 1, wherein the microcrystalline silicon seed layer is formed in the step (c) by a plasma enhanced chemical vapor deposition process, the formed microcrystalline silicon seed layer is composed of one seed layer or a plurality of seed layers, the reaction gas for forming the microcrystalline silicon seed layer is silane and hydrogen, the volume ratio of silane to hydrogen is 1 (10-500), the reaction pressure is 0.25-5 mbar, the reaction temperature is 150-250 ℃, and the thickness of the generated microcrystalline silicon seed layer is 0.5-5 nm.
4. The method as claimed in claim 3, wherein the flow rate of silane during the deposition of the microcrystalline silicon seed layer in step (c) is 80 to 100 standard liter/hour, the flow rate of hydrogen is 6000 to 8000 standard liter/hour, the reaction pressure is 0.25 to 5 mbar, the reaction temperature is 190 ℃ and the reaction time is 10 to 15 seconds.
5. The method of claim 1, wherein the doped amorphous silicon layer is formed in the step (c) by a plasma enhanced chemical vapor deposition process, wherein the reaction gases for forming the doped amorphous silicon layer are phosphane, silane and hydrogen, the volume ratio of the phosphane, the silane and the hydrogen is (0.01-0.1): 1: (1-20), the reaction pressure is 0.25-5 mbar, the reaction temperature is 150-250 ℃, and the thickness of the formed doped amorphous silicon layer is 50-250 nm.
6. The method according to claim 1, wherein the doped microcrystalline silicon layer is formed in the step (c) by a plasma enhanced chemical vapor deposition process, wherein the reaction gases for forming the doped microcrystalline silicon layer comprise phosphane, silane and hydrogen, the volume ratio of the phosphane to the silane to the hydrogen is (0.01-0.1): 1 (10-500), the reaction pressure is 0.25-5 mbar, the reaction temperature is 150-350 ℃, and the thickness of the formed doped microcrystalline silicon layer is 50-250 nm.
7. The method as claimed in claim 1, wherein the temperature of the crystallization annealing treatment in the step (d) is 600 to 950 ℃ and the annealing time is 20 to 60 minutes.
8. The method of claim 1, wherein the silicon oxide layer, the microcrystalline silicon seed layer, and the doped amorphous silicon layer or the doped microcrystalline silicon layer are sequentially formed in the same PECVD apparatus in step (c).
9. A TOPCon solar cell made by the method of any one of claims 1-8, comprising:
an N-type silicon wafer having opposing first and second surfaces;
the P-type doping layer, the first anti-reflection passivation film and the first electrode are sequentially stacked on the first surface of the silicon wafer, and the P-type doping layer and the N-type silicon wafer form a PN junction;
the silicon oxide layer, the first polycrystalline silicon layer, the second anti-reflection passivation film and the second electrode are sequentially stacked on the second surface of the silicon wafer;
the first polycrystalline silicon layer and the second polycrystalline silicon layer are respectively and correspondingly formed by carrying out crystallization annealing treatment on the microcrystalline silicon seed crystal layer and the doped amorphous silicon layer or the doped microcrystalline silicon layer.
10. The TOPCon solar cell of claim 9, wherein the second polysilicon layer is formed by crystallization annealing an N-doped amorphous silicon layer or an N-doped microcrystalline silicon layer.
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