CN117747691A - Bicolor barrier type GaSb-based InAs/InAsSb heterojunction photoelectric transistor and preparation method thereof - Google Patents
Bicolor barrier type GaSb-based InAs/InAsSb heterojunction photoelectric transistor and preparation method thereof Download PDFInfo
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- 229910000673 Indium arsenide Inorganic materials 0.000 title claims abstract description 66
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 title claims abstract description 66
- 230000004888 barrier function Effects 0.000 title claims abstract description 47
- 229910005542 GaSb Inorganic materials 0.000 title claims abstract description 27
- 238000002360 preparation method Methods 0.000 title claims description 8
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 229910052751 metal Inorganic materials 0.000 claims abstract description 27
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- 238000001451 molecular beam epitaxy Methods 0.000 description 4
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- 238000009616 inductively coupled plasma Methods 0.000 description 3
- 229910000661 Mercury cadmium telluride Inorganic materials 0.000 description 2
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- MCMSPRNYOJJPIZ-UHFFFAOYSA-N cadmium;mercury;tellurium Chemical compound [Cd]=[Te]=[Hg] MCMSPRNYOJJPIZ-UHFFFAOYSA-N 0.000 description 1
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- 229910052979 sodium sulfide Inorganic materials 0.000 description 1
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Abstract
The invention provides a bicolor barrier type GaSb-based InAs/InAsSb heterojunction photoelectric transistor, which comprises a substrate, wherein a buffer layer, a first contact layer, a first heterojunction, a second heterojunction and a second contact layer are epitaxially grown on the substrate, and steps are etched to the first contact layer along the second contact layer, the second heterojunction and the first heterojunction; forming a first metal electrode on the first contact layer, forming a second metal electrode on the second contact layer, and depositing passivation layers on the etched surfaces of the second contact layer, the second heterojunction, the first heterojunction and the first contact layer; the first heterojunction is a medium wave heterojunction, and the second heterojunction is a long wave heterojunction; the first contact layer is a medium wave N-type contact layer, and the second contact layer is a long wave N-type contact layer. The invention has the advantages of high responsivity, high photoelectric gain, high detection rate, low dark current, low crosstalk and the like, and realizes the detection of a plurality of wave bands.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a bicolor barrier type GaSb-based InAs/InAsSb heterojunction photoelectric transistor and a preparation method thereof.
Background
The infrared detector is a photosensitive device capable of converting invisible infrared radiation into a measurable signal, and is widely applied to military and civil fields such as strategic early warning, target identification, remote sensing, night vision, atmosphere monitoring, earth resource exploration, communication, chemical detection, medical treatment, temperature measurement and the like.
The infrared detection technology is developed towards the direction of acquiring more target information, so that higher requirements are put forward on the performance of the infrared detector, such as the characteristics of multispectral detection, high working temperature, small volume, light weight, convenience in maintenance and the like.
Common polychromatic infrared detectors are mostly based on mercury cadmium telluride (HgCdTe), antimonide superlattice (InAs/GaSb, inAs/InAsSb) and other structured detectors. The InAs/InAsSb type superlattice (T2 SLs) has a staggered energy band structure, has high effective mass of electron holes, can effectively reduce tunneling current and improve effective state density; the large energy difference between the heavy hole band and the light hole band can inhibit Auger recombination and improve the service life of electron holes; the response spectrum range is wide, and the infrared spectrum from near infrared to very long wave can be covered; low cost, good uniformity in large area manufacture, compatibility with the existing semiconductor manufacturing technology, etc. However, the research on polychromatic infrared detectors is still limited by the limitations of internal optical gain and bias voltage. Based on the problem, researchers can realize low bias operation by adding a barrier structure to inhibit dark current of the detector, but the problem that the internal gain of the detector is low and weak signal detection cannot be realized is not solved.
Disclosure of Invention
In order to solve the technical problems that the internal gain of a multicolor infrared detector is low and weak signal detection cannot be realized in the prior art, the invention aims to provide a bicolor barrier type GaSb-based InAs/InAsSb heterojunction photoelectric transistor which comprises a substrate,
epitaxially growing a buffer layer, a first contact layer, a first heterojunction, a second heterojunction and a second contact layer on the substrate, and etching steps along the second contact layer, the second heterojunction and the first heterojunction to the first contact layer;
forming a first metal electrode on the first contact layer, forming a second metal electrode on the second contact layer, and depositing passivation layers on the etched surfaces of the second contact layer, the second heterojunction, the first heterojunction and the first contact layer;
the first heterojunction is a medium wave heterojunction, and the second heterojunction is a long wave heterojunction; the first contact layer is a medium wave N-type contact layer, and the second contact layer is a long wave N-type contact layer.
Preferably, the first heterojunction comprises a medium wave barrier layer, a medium wave N-type collector electrode and a medium wave P-type base electrode which are sequentially epitaxially grown on the first contact layer;
and the second heterojunction comprises a long-wave P-type base electrode, a long-wave N-type collector electrode and a long-wave barrier layer which are sequentially epitaxially grown on the shared N-type emitter electrode.
Preferably, the substrate adopts an N-type GaSb substrate with a (001) crystal orientation;
the buffer layer adopts Te to carry out N-type doping on GaSb material, and the doping concentration of Te is 1 multiplied by 10 18 cm -3 The thickness of the buffer layer was 0.5 μm.
Preferably, the first contact layer comprises a plurality of periods of a first M-type superlattice structure with a total thickness of 0.5 μm.
Preferably, the medium wave barrier layer comprises a second M-type superlattice structure with a plurality of periods, and the total thickness is 0.2 μm;
the medium wave N-type collector comprises a first InAs/InAsSb superlattice structure with a plurality of periods, and the total thickness is 1 mu m;
the medium-wave P-type base comprises a second InAs/InAsSb superlattice structure with a plurality of periods, and the total thickness is 30nm;
the common N-type emitter comprises a third M-type superlattice structure with a plurality of periods, and the total thickness is 0.3 mu M;
the long-wave P-type base comprises a third InAs/InAsSb superlattice structure with a plurality of periods, and the total thickness is 30nm;
the long-wave N-type collector comprises a fourth InAs/InAsSb superlattice structure with a plurality of periods, and the total thickness is 2.6 mu m;
the long wave barrier layer includes a fourth M-type superlattice structure for a plurality of periods having a total thickness of 0.3 μm.
Preferably, the second contact layer includes a fifth M-type superlattice structure for a plurality of periods, with a total thickness of 0.3 μm.
Another object of the present invention is to provide a method for preparing a bicolor barrier type GaSb-based InAs/InAsSb heterojunction phototransistor, the method comprising the steps of:
s1, epitaxially growing a buffer layer, a first contact layer, a first heterojunction, a second heterojunction and a second contact layer on a substrate;
the first heterojunction is a medium wave heterojunction, and the second heterojunction is a long wave heterojunction; the first contact layer is a medium wave N-type contact layer, and the second contact layer is a long wave N-type contact layer;
s2, etching the second contact layer, the second heterojunction and the first heterojunction to the first contact layer along the second contact layer to form a step;
s3, forming a first metal electrode on the first contact layer, and forming a second metal electrode on the second contact layer;
s4, depositing passivation layers on the second contact layer, the second heterojunction, the first heterojunction and the etched surfaces of the first contact layer.
Preferably, in step S2, the step is formed using dry etching;
in step S3, electrode windows are opened on the first contact layer and the second contact layer, a first metal electrode is evaporated to the electrode window of the first contact layer, and a second metal electrode is evaporated to the electrode window of the second contact layer;
prior to step S4, the etched surfaces of the second contact layer, the second heterojunction, the first heterojunction and the first contact layer are vulcanized.
Preferably, the first heterojunction comprises a medium wave barrier layer, a medium wave N-type collector electrode and a medium wave P-type base electrode which are sequentially epitaxially grown on the first contact layer;
and the second heterojunction comprises a long-wave P-type base electrode, a long-wave N-type collector electrode and a long-wave barrier layer which are sequentially epitaxially grown on the shared N-type emitter electrode.
Preferably, in step S4, the passivation layer deposited on the etched surfaces of the second contact layer, the second heterojunction, the first heterojunction and the first contact layer is Al 2 O 3 And a passivation layer with a thickness of 30nm.
The bicolor barrier type GaSb-based InAs/InAsSb heterojunction phototransistor and the preparation method thereof provided by the invention have the advantages of high responsivity, high photoelectric gain, high detection rate, low dark current, low crosstalk and the like, and realize detection of a plurality of wave bands.
The invention provides a bicolor barrier type GaSb-based InAs/InAsSb heterojunction phototransistor and a preparation method thereof, wherein a medium-long bicolor InAs/InAsSb type superlattice heterojunction phototransistor structure is designed firstly, then a molecular beam epitaxy device is used for carrying out heteroepitaxy on a GaSb substrate in an ultrahigh vacuum environment, and the beam current of different atoms is controlled accuratelyAnd finally, passivating an Al layer on the epitaxial wafer by a photoetching process 2 O 3 Suppressing surface leakage current of the phototransistor. The heterojunction phototransistor with the double-color InAs/InAsSb type superlattice material in the heteroepitaxy can improve the internal optical gain of the infrared detector, reduce the noise influence caused by external bias voltage, expand the detection band range and enable the infrared detector to be capable of detecting more widely and accurately.
The double-color barrier type GaSb-based InAs/InAsSb heterojunction phototransistor and the preparation method thereof provided by the invention aim at the problems of insufficient detection performance and poor detection range of the existing infrared detector, and the detection of medium-length double-wave bands is realized by using the Molecular Beam Epitaxy (MBE) in the ultra-high vacuum epitaxy and the double-color barrier type InAs/InAsSb heterojunction phototransistor, so that the problems of accurately and sensitively identifying a target in a complex background environment and improving the accuracy of acquiring target information of the infrared detector are solved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
Fig. 1 schematically shows a block diagram of a bicolor barrier type GaSb-based InAs/InAsSb heterojunction phototransistor of the present invention.
Fig. 2 shows the energy band diagram of a bicolor barrier type GaSb-based InAs/InAsSb heterojunction phototransistor of the present invention.
FIG. 3 shows a flow chart of a method for preparing a bicolor barrier type GaSb-based InAs/InAsSb heterojunction phototransistor.
Fig. 4 shows a schematic diagram of the epitaxial growth of a buffer layer, a first contact layer, a first heterojunction, a second heterojunction and a second contact layer on a substrate according to the present invention.
Fig. 5 shows a schematic diagram of the present invention etching along the second contact layer, the second heterojunction, and the first heterojunction to the first contact layer to form a step.
Fig. 6 shows a schematic diagram of the present invention in which a first metal electrode is formed on a first contact layer and a second metal electrode is formed on a second contact layer.
Detailed Description
To further clarify the above and other features and advantages of the present invention, a further description of the invention will be rendered by reference to the appended drawings. It should be understood that the specific embodiments presented herein are for purposes of explanation to those skilled in the art and are intended to be illustrative only and not limiting.
The working principle of heterojunction phototransistors.
The optical gain of a heterojunction phototransistor is derived from the amplifying function of the transistor. The heterojunction photoelectric transistor is provided with an emitter with a wide band gap, a valence band step is formed between the emitter and the base, the collector region is used as an absorption region of infrared light, after infrared light is absorbed, a photo-generated carrier is formed, electrons are transported to the collector region and collected by an external circuit under the action of an external electric field, holes are transported to the base and limited in the base region, the amplification effect is that the emitter with the wide band gap and the base form the valence band step, so that the holes are gathered in the base region, and along with the increase of holes in the base region, forward bias voltage is generated in the heterojunction of the emitter region and the base region, the electron potential is raised, the electrons are promoted to reach the collector region beyond the base region, and the photoelectric gain of the heterojunction photoelectric transistor is realized. Due to the improvement of the quality of the collector infrared absorption region material and the precise regulation of the conduction band and valence band steps between the emitter and the base, the dark current of the photoelectric transistor can be obviously reduced and the photoelectric gain can be increased. The high internal photoelectric gain of the bicolor barrier type heterojunction photoelectric transistor comes from the amplifying function of the transistor, does not need to rely on the amplifying function of an external circuit and does not need to work under a large bias voltage, so that noise introduced by an amplifier can be avoided relative to an avalanche photodiode, and the high photoelectric gain can also improve the responsivity and the detection rate.
As shown in fig. 1, according to an embodiment of the present invention, there is provided a bicolor barrier type GaSb-based InAs/InAsSb heterojunction phototransistor including a substrate 1.
A buffer layer 2, a first contact layer 3, a first heterojunction a, a second heterojunction b and a second contact layer 11 are epitaxially grown on the substrate 1, and steps 12 are etched along the second contact layer 11, the second heterojunction b, the first heterojunction a to the first contact layer 3.
A first metal electrode 14 is formed on the first contact layer 3, and a second metal electrode 13 is formed on the second contact layer 11. Specifically, the first metal electrode 14 is formed on the step 12 formed by the first contact layer 3.
The etched surfaces of the second contact layer 11, the second heterojunction b, the first heterojunction a and the first contact layer 12 deposit a passivation layer 15.
The substrate 1 is an N-type GaSb substrate with a (001) crystal orientation. The buffer layer 2 adopts Te to carry out N-type doping GaSb material, and the doping concentration of Te is 1 multiplied by 10 18 cm -3 The thickness of the buffer layer 2 was 0.5 μm.
According to the embodiment of the invention, the first heterojunction a is a medium wave heterojunction, the second heterojunction b is a long wave heterojunction, the first contact layer 3 is a medium wave N-type contact layer, and the second contact layer 11 is a long wave N-type contact layer.
Specifically, the first heterojunction a includes a medium wave barrier layer 4, a medium wave N-type collector 5, and a medium wave P-type base 6 epitaxially grown in this order on the first contact layer 3.
The common N-type emitter 7 is epitaxially grown on the medium-wave P-type base 3, and the second heterojunction b includes a long-wave P-type base 8, a long-wave N-type collector 9, and a long-wave barrier layer 10 sequentially epitaxially grown on the common N-type emitter 7.
The first contact layer 3 comprises a first M-type superlattice structure for a plurality of periods, with a total thickness of 0.5 μm. In a preferred embodiment, the number of periods of the first M-type superlattice structure of the first contact layer 3 is 100.
The M-type superlattice structure is an InAs/AlAs/InAs/InAsSb superlattice structure, and is referred to as an M-type superlattice structure because the energy band structure is similar to the letter "M". The material of the InAs layer of the first M-type superlattice structure is doped with Si, and the doping concentration is 1 multiplied by 10 18 cm -3 。
In this embodiment, the first M-type superlattice structure of each period is 5ML InAs/2ML AlAs/5ML InAs/3ML InAsSb, where ML represents a molecular layer, and the thickness of each component layer may be adjusted according to actual needs.
The medium wave barrier layer 4 comprises a second M-type superlattice structure of a plurality of periods, with a total thickness of 0.2 μm. In this embodiment, the second M-type superlattice structure of each period is 17ML InAs/3ML AlSb/17ML InAs/7ML InAsSb, and the thickness of each component layer may be adjusted according to actual needs.
The medium wave N-type collector 5 comprises a first InAs/InAsSb superlattice structure of a plurality of periods, with a total thickness of 1 μm. The medium wave N-type collector 5 serves as an infrared absorption layer of the medium wave portion.
The first InAs/InAsSb superlattice structure of each period is formed by alternately growing InAsSb barrier layers and InAs potential well layers, wherein the material of the InAs potential well layers is an InAs material doped with doping element Si in N type, and the doping concentration of Si is 4 multiplied by 10 15 cm -3 。
In this embodiment, the first InAs/InAsSb superlattice structure of each period is 24ML InAs/6ML InAsSb, and the thickness of each component layer may be adjusted according to actual needs.
The medium wave P-type base 6 comprises a second InAs/InAsSb superlattice structure of a plurality of periods, having a total thickness of 30nm.
The second InAs/InAsSb superlattice structure of each period is formed by alternately growing InAsSb barrier layers and InAs potential well layers, wherein the material of the InAsSb barrier layers can Be InAsSb material doped with doping element Be in P type, and the doping concentration of Be is 4 multiplied by 10 16 cm -3 The thickness of each component layer can be adjusted according to actual needs.
The common N-type emitter 7 comprises a third M-type superlattice structure for a plurality of periods, with a total thickness of 0.3 μm. The material of the InAs layer of the third M-type superlattice structure is doped with Si, and the doping concentration is 1 multiplied by 10 17 cm -3 。
In this embodiment, the third M-type superlattice structure of each period is 7ML InAs/3ML AlSb/7ML InAs/3ML InAsSb, and the thickness of each component layer may be adjusted according to actual needs. The common N-type emitter 7 uses an M-type structure as an emitter, and can reduce dark current of the phototransistor.
The long-wave P-type base 8 includes a third InAs/InAsSb superlattice structure of a plurality of periods, with a total thickness of 30nm.
The third InAs/InAsSb superlattice structure of each period is formed by alternately growing InAsSb barrier layers and InAs potential well layers, wherein the material of the InAsSb barrier layers is doped with Be in P type, and the doping concentration of Be is 4 multiplied by 10 16 cm -3 The thickness of each component layer can be adjusted according to actual needs.
The long wave N-type collector 9 comprises a fourth InAs/InAsSb superlattice structure of a plurality of periods, having a total thickness of 2.6 μm. The long-wave N-type collector 9 serves as an infrared absorption layer of the long-wave portion.
The third InAs/InAsSb superlattice structure of each period is formed by alternately growing InAsSb barrier layers and InAs potential well layers, wherein the material of the InAs potential well layers is doped with Si in N type, and the doping concentration of Si is 4 multiplied by 10 15 cm -3 。
In this embodiment, the third InAs/InAsSb superlattice structure of each period is 15ML InAs/3ML InAsSb, and the thickness of each component layer may be adjusted according to actual needs.
The long wave barrier layer 10 includes a fourth M-type superlattice structure for a plurality of periods, with a total thickness of 0.3 μm. In this embodiment, the fourth M-type superlattice structure of each period is 7ML InAs/1ML AlSb/7ML InAs/2ML InAsSb, and the thickness of each component layer may be adjusted according to actual needs.
The second contact layer 11 includes a fifth M-type superlattice structure for a plurality of periods, with a total thickness of 0.3 μm. In a preferred embodiment, the number of periods of the fifth M-type superlattice structure of the second contact layer 11 is 100.
The material of the InAs layer of the fifth M-type superlattice structure is doped with Si, and the doping concentration is 1 multiplied by 10 18 cm -3 。
In this embodiment, the fifth M-type superlattice structure of each period is 7ML InAs/11ML AlAs/7ML InAs/2ML InAsSb, and the thickness of each component layer may be adjusted according to actual needs.
As shown in figure 2, the energy band diagram of the bicolor barrier type GaSb-based InAs/InAsSb heterojunction phototransistor effectively reduces dark current of the detector, inhibits crosstalk between medium wavelength waves, improves internal optical gain and detection performance of the detector, solves the difficulty that the internal gain of the infrared detector is low under low bias voltage, and has wide application prospect and technical advantages in the fields of weak signal detection, long-distance detection and the like.
As shown in fig. 3, according to an embodiment of the present invention, a method for preparing a bicolor barrier type GaSb-based InAs/InAsSb heterojunction phototransistor is provided, which includes the following method steps:
step S1, epitaxially growing a buffer layer 2, a first contact layer 3, a first heterojunction a, a second heterojunction b, and a second contact layer 11 on the substrate 1, as shown in fig. 4.
The first heterojunction a is a medium wave heterojunction, the second heterojunction b is a long wave heterojunction, the first contact layer 3 is a medium wave N-type contact layer, and the second contact layer 11 is a long wave N-type contact layer.
Specifically, the first heterojunction a includes a medium wave barrier layer 4, a medium wave N-type collector 5, and a medium wave P-type base 6 epitaxially grown in this order on the first contact layer 3.
The common N-type emitter 7 is epitaxially grown on the medium-wave P-type base 6, and the second heterojunction b includes a long-wave P-type base 8, a long-wave N-type collector 9, and a long-wave barrier layer 10 sequentially epitaxially grown on the common N-type emitter 7.
The substrate 1 is an N-type GaSb substrate with a (001) crystal orientation. In the preparation process, the substrate 1 is firstly degassed to remove surface impurities, and the substrate 1 is transported to a Heating station in molecular beam epitaxy to be degassed at high temperature (300 ℃) and maintained at the high temperature for 60-90 minutes. Then the substrate is transferred into a growth cavity for deoxidation, and the surface oxide of the substrate 1 is removed after the deoxidation is carried out for 40 to 80 minutes at the temperature of 520 ℃.
In the process of removing the oxide on the surface of the substrate 1, when the surface temperature of the substrate 1 is higher than 380 ℃, opening an Sb source furnace valve to start a protection beam, wherein the size of the Sb protection beam is 10 -6 Magnitude and deoxidizing effect by reflection type high-energy electron diffractometer (RHEED)The real-time monitoring is carried out, the temperature is increased by 30 ℃ on the basis of the temperature 520 when the deoxidizing point appears on the surface of the substrate 1, so that the temperature reaches 550 ℃ to deoxidize for 30-90 minutes, and the specific deoxidizing time can be determined according to deoxidizing conditions.
A buffer layer 2, a first contact layer 3, a medium wave barrier layer 4, a medium wave N-type collector 5, a medium wave P-type base 6, a common N-type emitter 7, a long wave P-type base 8, a long wave N-type collector 9, a long wave barrier layer 10 and a second contact layer 11 are then grown on the substrate 1, as shown in fig. 4.
Step S2, etching along the second contact layer 11, the second heterojunction b, and the first heterojunction a to the first contact layer 3 to form a step 12, as shown in fig. 5.
Specifically, a step 12 is formed on one side of the epitaxial structure by dry etching (standard photolithographic techniques and inductively coupled plasma Inductively Coupled Plasma, ICP) to an etch depth of the first contact layer 3, as shown in fig. 5.
Step S3, forming a first metal electrode 14 on the first contact layer 3, and forming a second metal electrode 13 on the second contact layer 11, as shown in fig. 6.
Specifically, electrode windows are opened in the first contact layer 3 (step 12 formed by the first contact layer 11) and the second contact layer 11, the first metal electrode 14 is vapor-deposited to the electrode window of the first contact layer 11, and the second metal electrode 13 is vapor-deposited to the electrode window of the second contact layer 11.
The first metal electrode 14 forms an ohmic contact with the first contact layer 3 and the second metal electrode 13 forms an ohmic contact with the second contact layer 11.
In this embodiment, the first metal electrode 14 is made of Ti, and has a thickness of 20nm; the second metal electrode 13 was made of Au, and had a thickness of 200nm.
In step S4, the etched surfaces of the second contact layer 11, the second heterojunction b, the first heterojunction a and the first contact layer 3 are deposited with a passivation layer 15, as shown in fig. 1.
Before the passivation layer 15 is deposited in step S4, the etched surfaces of the second contact layer 11, the second heterojunction b, the first heterojunction a and the first contact layer 3 are vulcanized, in particular with a sodium sulfide solution.
The passivation layer 15 deposited on the etched surfaces of the second contact layer 11, the second heterojunction b, the first heterojunction a and the first contact layer 3 is Al 2 O 3 And a passivation layer with a thickness of 30nm.
The invention has the advantages of high responsivity, high photoelectric gain, high detection rate, low dark current, low crosstalk and the like, and realizes the detection of a plurality of wave bands. Due to the improvement of the quality of the collector infrared absorption region material and the precise regulation of the conduction band and valence band steps between the emitter and the base, the dark current of the photoelectric transistor can be remarkably reduced and the photoelectric gain can be increased. Meanwhile, the passivation layer is deposited on the surface, so that surface leakage current caused by surface states is suppressed. These aspects act simultaneously, so that the responsivity and the detection rate of the two-color barrier type GaSb-based InAs/InAsSb type superlattice HPT are improved, and the crosstalk between signals of two wave bands is also inhibited.
The heterojunction phototransistor with the common emitter is heteroepitaxially grown in the molecular beam epitaxy equipment, and the InAs/InAsSb type superlattice materials are used, so that dark current of the detector is effectively reduced, crosstalk among medium wavelength waves is inhibited, internal optical gain and detection performance of the detector are improved, and the difficulty that the internal gain of the infrared detector is low under low bias voltage is solved. Has wide application prospect and technical advantage in the fields of weak signal detection, long-distance detection and the like.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.
Claims (10)
1. A bicolor barrier type GaSb base InAs/InAsSb heterojunction photoelectric transistor is characterized in that the photoelectric transistor comprises a substrate,
epitaxially growing a buffer layer, a first contact layer, a first heterojunction, a second heterojunction and a second contact layer on the substrate, and etching steps along the second contact layer, the second heterojunction and the first heterojunction to the first contact layer;
forming a first metal electrode on the first contact layer, forming a second metal electrode on the second contact layer, and depositing passivation layers on the etched surfaces of the second contact layer, the second heterojunction, the first heterojunction and the first contact layer;
the first heterojunction is a medium wave heterojunction, and the second heterojunction is a long wave heterojunction; the first contact layer is a medium wave N-type contact layer, and the second contact layer is a long wave N-type contact layer.
2. The phototransistor of claim 1 wherein the first heterojunction comprises a medium wave barrier layer, a medium wave N-type collector and a medium wave P-type base epitaxially grown in sequence on the first contact layer;
and the second heterojunction comprises a long-wave P-type base electrode, a long-wave N-type collector electrode and a long-wave barrier layer which are sequentially epitaxially grown on the shared N-type emitter electrode.
3. The phototransistor according to claim 1, wherein the substrate is an N-type GaSb substrate of (001) crystal orientation;
the buffer layer adopts Te to carry out N-type doping on GaSb material, and the doping concentration of Te is 1 multiplied by 10 18 cm -3 The thickness of the buffer layer was 0.5 μm.
4. The phototransistor of claim 2 wherein the first contact layer comprises a first M-type superlattice structure for a plurality of periods having a total thickness of 0.5 μm.
5. The phototransistor of claim 2 wherein the medium wave barrier layer comprises a second M-type superlattice structure for a plurality of periods, the total thickness being 0.2 μm;
the medium wave N-type collector comprises a first InAs/InAsSb superlattice structure with a plurality of periods, and the total thickness is 1 mu m;
the medium-wave P-type base comprises a second InAs/InAsSb superlattice structure with a plurality of periods, and the total thickness is 30nm;
the common N-type emitter comprises a third M-type superlattice structure with a plurality of periods, and the total thickness is 0.3 mu M;
the long-wave P-type base comprises a third InAs/InAsSb superlattice structure with a plurality of periods, and the total thickness is 30nm;
the long-wave N-type collector comprises a fourth InAs/InAsSb superlattice structure with a plurality of periods, and the total thickness is 2.6 mu m;
the long wave barrier layer includes a fourth M-type superlattice structure for a plurality of periods having a total thickness of 0.3 μm.
6. The phototransistor of claim 1 wherein the second contact layer comprises a fifth M-type superlattice structure for a plurality of periods having a total thickness of 0.3 μm.
7. The preparation method of the bicolor barrier type GaSb-based InAs/InAsSb heterojunction phototransistor is characterized by comprising the following steps of:
s1, epitaxially growing a buffer layer, a first contact layer, a first heterojunction, a second heterojunction and a second contact layer on a substrate;
the first heterojunction is a medium wave heterojunction, and the second heterojunction is a long wave heterojunction; the first contact layer is a medium wave N-type contact layer, and the second contact layer is a long wave N-type contact layer;
s2, etching the second contact layer, the second heterojunction and the first heterojunction to the first contact layer along the second contact layer to form a step;
s3, forming a first metal electrode on the first contact layer, and forming a second metal electrode on the second contact layer;
s4, depositing passivation layers on the second contact layer, the second heterojunction, the first heterojunction and the etched surfaces of the first contact layer.
8. The manufacturing method according to claim 7, characterized in that in step S2, the step is formed using dry etching;
in step S3, electrode windows are opened on the first contact layer and the second contact layer, a first metal electrode is evaporated to the electrode window of the first contact layer, and a second metal electrode is evaporated to the electrode window of the second contact layer;
prior to step S4, the etched surfaces of the second contact layer, the second heterojunction, the first heterojunction and the first contact layer are vulcanized.
9. The method of claim 7, wherein the first heterojunction comprises a medium wave barrier layer, a medium wave N-type collector and a medium wave P-type base epitaxially grown in sequence on the first contact layer;
and the second heterojunction comprises a long-wave P-type base electrode, a long-wave N-type collector electrode and a long-wave barrier layer which are sequentially epitaxially grown on the shared N-type emitter electrode.
10. The method of claim 7, wherein in step S4, the passivation layer deposited on the etched surfaces of the second contact layer, the second heterojunction, the first heterojunction and the first contact layer is Al 2 O 3 And a passivation layer with a thickness of 30nm.
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