CN117747455A - Micro-bump substrate based on laser processing, preparation method and micro-bump interconnection structure - Google Patents
Micro-bump substrate based on laser processing, preparation method and micro-bump interconnection structure Download PDFInfo
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Abstract
The application provides a micro-bump substrate based on laser processing, a preparation method and a micro-bump interconnection structure, relates to the field of electronic manufacturing, and comprises the following steps: providing a wafer substrate; forming a mask layer on one side of the wafer substrate, performing exposure treatment on the mask layer based on a laser treatment process, forming a plurality of through holes penetrating through the mask layer on the mask layer, and filling first metal in the through holes; removing the mask layer, and performing etching treatment on one side of the wafer substrate close to the first metal to form a plurality of micro-convex points which are arranged in an array manner, wherein the diameters of the micro-convex points are smaller than or equal to 2 mu m; and forming an insulating layer in the gaps of the micro-convex points to obtain the micro-convex point substrate. According to the method, the mask layer is processed through the laser treatment process, the through holes with smaller diameter and larger thickness can be formed in the mask layer, and the substrate with the micro-convex points with the diameter smaller than 2 microns can be prepared based on the through holes formed through the laser treatment process.
Description
Technical Field
The embodiment of the application relates to the field of electronic manufacturing, in particular to a micro-bump substrate based on laser processing, a preparation method and a micro-bump interconnection structure.
Background
Technology development such as artificial intelligence and neural networks is rapid in the past, and the technology needs to operate on massive data, so that the parallel processing capability of a hardware circuit is challenged. At the same time, with the Internet, sensors, and various numbersThe popularity of the literal terminal equipment, the network data presents an explosive exponential growth, the memory density of the chip is gradually increased, and the TB/mm is expected to be reached 2 A level. The need for high density interconnection of hardware circuits, whether processors or memory, is increasing.
The interconnection structure based on the micro-solder bump has been widely used for electrical connection of chips because of its advantages such as shortening the length of interconnection lines, improving circuit performance, reducing size, and reducing power consumption. However, because it is difficult to grow solder micro-bumps of smaller diameter and greater thickness during electroplating and collapse control during structural bonding is difficult as the diameter decreases, solder micro-bumps in micro-solder bump interconnect structures are difficult to achieve small diameter (e.g., less than 10 microns) requirements. Therefore, how to prepare an interconnection structure of the solder micro bump with a small diameter is a current urgent problem in the art.
Disclosure of Invention
The embodiment of the application provides a micro-bump substrate based on laser processing, a preparation method and a micro-bump interconnection structure, and aims to solve the problem of how to prepare the interconnection structure of a welding micro-bump with a small diameter.
An embodiment of the present application provides a method for preparing a micro bump substrate based on laser processing, where the method includes:
providing a wafer substrate;
forming a mask layer on one side of the wafer substrate, performing exposure treatment on the mask layer based on a laser treatment process, forming a plurality of through holes penetrating through the mask layer on the mask layer, and filling first metal in the through holes;
removing the mask layer, and performing etching treatment on one side, close to the first metal, of the wafer substrate to form a plurality of micro-convex points which are arranged in an array manner, wherein the diameters of the micro-convex points are smaller than or equal to 2 mu m;
and forming an insulating layer in the gaps of the micro-convex points to obtain the micro-convex point substrate.
In an alternative embodiment, the forming a mask layer on one side of the wafer substrate includes:
forming an adhesion layer on one side of the wafer substrate, wherein the adhesion layer is made of a second metal;
forming a seed layer on one side of the adhesion layer, which is away from the wafer substrate, wherein the seed layer is made of the first metal;
and forming a mask layer on one side of the seed layer, which is away from the wafer substrate, wherein the thickness of the mask layer is larger than that of the seed layer, and the thickness is the dimension of the wafer substrate in the direction pointing to the mask layer.
In an alternative embodiment, the exposing the mask layer based on the laser processing process forms a plurality of through holes penetrating the mask layer on the mask layer, including:
and carrying out laser direct writing process treatment on the mask layer based on the laser direct writing device, so that the mask layer is subjected to multiple exposure treatment, and a plurality of through holes are formed in the mask layer.
In an alternative embodiment, the exposing the mask layer based on the laser processing process forms a plurality of through holes penetrating the mask layer on the mask layer, including:
and performing laser ablation process treatment on the mask layer based on a laser ablation device, and forming a plurality of through holes in the mask layer.
In an optional embodiment, the removing the mask layer, performing etching treatment on a side of the wafer substrate, which is close to the first metal, to form a plurality of micro bumps arranged in an array, including:
removing the mask layer to form a plurality of original micro-bumps corresponding to the through holes one by one;
etching the first metal of the seed layer, the first metal of the original micro-bump and the second metal of the adhesion layer until the surface, close to the first metal, of the wafer substrate is exposed in the gaps of the original micro-bumps, so as to obtain the plurality of micro-bumps.
In an alternative embodiment, the forming an insulating layer in the gap of the micro-bump to obtain the micro-bump substrate includes:
depositing an insulating layer material on one side of the wafer substrate close to the micro-convex points so that the insulating layer material fills gaps of the micro-convex points to obtain the insulating layer;
and grinding and polishing the insulating layer and one side of the micro-bump, which is away from the wafer substrate, so that the thickness of the insulating layer is the same as that of the micro-bump, and the micro-bump substrate is obtained, wherein the thickness is the dimension of the wafer substrate in the direction pointing to the mask layer.
In an alternative embodiment, the micro-bump has a thickness of greater than or equal to 10 μm and less than or equal to 50 μm, the thickness being a dimension of the wafer substrate in a direction toward the mask layer.
In an alternative embodiment, the first metal comprises at least one of the following: copper, gold, tungsten.
A second aspect of the embodiments of the present application provides a micro-bump substrate based on laser processing, where the micro-bump substrate is prepared by using the method for preparing a micro-bump substrate based on laser processing according to any one of the first aspect.
A third aspect of the embodiments of the present application provides a micro-bump interconnection structure, where the micro-bump interconnection structure includes a first wafer and a second wafer, the first wafer and the second wafer are the micro-bump substrates according to claim 9, and the first wafer and the second wafer are connected based on micro-bumps on the micro-bump substrates in a bonding manner.
The beneficial effects are that:
the application provides a micro-bump substrate based on laser processing, a preparation method and a micro-bump interconnection structure, wherein the preparation method comprises the following steps: providing a wafer substrate; forming a mask layer on one side of the wafer substrate, performing exposure treatment on the mask layer based on a laser treatment process, forming a plurality of through holes penetrating through the mask layer on the mask layer, and filling first metal in the through holes; removing the mask layer, and performing etching treatment on one side, close to the first metal, of the wafer substrate to form a plurality of micro-convex points which are arranged in an array manner, wherein the diameters of the micro-convex points are smaller than or equal to 2 mu m; and forming an insulating layer in the gaps of the micro-convex points to obtain the micro-convex point substrate. According to the method, the mask layer is processed through the laser treatment process, the through holes with smaller diameter and larger thickness can be formed in the mask layer, and the substrate with the micro-convex points with the diameter smaller than 2 microns can be prepared based on the through holes formed through the laser treatment process.
The foregoing description is only an overview of the technical solutions of the present application, and may be implemented according to the content of the specification in order to make the technical means of the present application more clearly understood, and in order to make the above-mentioned and other objects, features and advantages of the present application more clearly understood, the following detailed description of the present application will be given.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments of the present application will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method for manufacturing a micro bump substrate based on laser processing according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a wafer substrate formed in a method for manufacturing a micro bump substrate based on laser processing according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram illustrating a method for forming an adhesion layer and a seed layer in a method for manufacturing a micro bump substrate based on laser processing according to an embodiment of the present application;
fig. 4 is a schematic structural diagram of forming a mask layer in a method for manufacturing a micro bump substrate based on laser processing according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of forming a through hole in the mask layer by laser processing in a method for manufacturing a micro bump substrate based on laser processing according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of a first metal filled in a through hole in a method for manufacturing a micro bump substrate based on laser processing according to an embodiment of the present application;
FIG. 7 is a schematic diagram of a method for manufacturing a micro-bump substrate based on laser processing according to an embodiment of the present application;
fig. 8 is a schematic structural diagram of a micro bump formed in a method for manufacturing a micro bump substrate based on laser processing according to an embodiment of the present application;
fig. 9 is a schematic structural diagram of an insulating layer formed in a method for manufacturing a micro bump substrate based on laser processing according to an embodiment of the present application.
Reference numerals illustrate: 102. a wafer substrate; 103. an adhesive layer; 104. a seed layer; 105. a mask layer; 106. a through hole; 107. an insulating layer; 201. a first metal; 202. original micro-bumps; 203. and (5) micro-convex points.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
In the drawings, the size of the constituent elements, thicknesses of layers or regions may be exaggerated for clarity in some cases, and thus, any implementation of the present disclosure is not necessarily limited to the dimensions shown in the drawings, and the shapes and sizes of the components in the drawings do not reflect the true scale. Further, the drawings schematically illustrate ideal examples, and any one implementation of the present disclosure is not limited to the shapes or the numerical values and the like shown in the drawings.
Technology development such as artificial intelligence and neural networks is rapid in the past, and the technology needs to operate on massive data, so that the parallel processing capability of a hardware circuit is challenged. Meanwhile, with the popularization of the Internet, sensors and various digital terminal devicesNetwork data exhibits explosive exponential growth, and memory density of chips gradually increases, and is expected to reach TB/mm 2 A level. The need for high density interconnection of hardware circuits, whether processors or memory, is increasing.
The interconnection structure based on the micro-solder bump has been widely used for electrical connection of chips because of its advantages such as shortening the length of interconnection lines, improving circuit performance, reducing size, and reducing power consumption. However, because it is difficult to grow solder micro-bumps of smaller diameter and greater thickness during electroplating and collapse control during structural bonding is difficult as the diameter decreases, solder micro-bumps in micro-solder bump interconnect structures are difficult to achieve small diameter (e.g., less than 10 microns) requirements.
In view of this, an embodiment of the present application proposes a method for preparing a micro-bump substrate based on laser processing, fig. 1 shows a flowchart of a method for preparing a micro-bump substrate based on laser processing according to an embodiment of the present application, and as shown in fig. 1, the method includes the following steps:
s11, providing a wafer substrate.
In the implementation of step S11, fig. 2 shows a schematic structural diagram of forming a wafer substrate in the method for manufacturing a micro-bump substrate based on laser processing according to an embodiment of the present application, as shown in fig. 2, a wafer of a silicon wafer is used as a substrate material of the micro-bump substrate in the present application, where the thickness of the wafer substrate 102 is greater than the thickness of other level materials in the micro-bump substrate, and it should be noted that, in the micro-bump substrate provided in the embodiment of the present application, the "thickness" of each part of structure refers to a dimension of each part of structure perpendicular to a direction of upper and lower flat surfaces of the wafer substrate, that is, a dimension of the wafer substrate pointing to a direction of other level structures (such as a mask layer) on the micro-bump substrate.
And S12, forming a mask layer on one side of the wafer substrate, performing exposure treatment on the mask layer based on a laser treatment process, forming a plurality of through holes penetrating through the mask layer on the mask layer, and filling first metal in the through holes.
In the implementation of step S12, fig. 3 shows a schematic structural diagram of forming an adhesion layer and a seed layer in the method for manufacturing a micro-bump substrate based on laser processing according to an embodiment of the present application, as shown in fig. 3, after the wafer substrate 102 is formed, an adhesion layer 103 is first formed on one side of the wafer substrate 102, where the adhesion layer 103 is used to enhance the bonding force of a film layer in the micro-bump substrate. In some alternative embodiments, the adhesion layer 103 may be deposited on one side of the wafer substrate 102 based on evaporation, sputtering, or the like, where the adhesion layer 103 covers the entire side of the wafer substrate 102, and the thickness of the adhesion layer 103 is smaller than the thickness of the wafer substrate 102.
In some alternative embodiments, the material of the adhesion layer 103 is a second metal, which includes at least one of the following: titanium (Ti), chromium (Cr), and the like.
As shown in fig. 3, after the adhesion layer 103 is formed, a seed layer 104 is formed on a side of the adhesion layer 103 facing away from the wafer substrate 102, where the material of the seed layer 104 is the first metal. The seed layer 104 is the same as the material of the micro bump to be formed, and an etching endpoint can be determined when the first metal is etched to form the micro bump, and when the first metal with the thickness of the seed layer 104 is etched, the micro bump is formed by etching.
In some alternative embodiments, the seed layer 104 may be deposited on the side of the adhesion layer 103 facing away from the wafer substrate 102 based on evaporation, sputtering, or the like, where the seed layer 104 covers the entire side of the adhesion layer 103, and the thickness of the seed layer 104 is smaller than the thickness of the wafer substrate 102. Preferably, the seed layer 104 has a thickness of 0.1 μm.
In some alternative embodiments, the first metal comprises at least one of: copper (Cu), gold (Au), tungsten (W), and the like.
In this embodiment, fig. 4 shows a schematic structural diagram of forming a mask layer in a method for manufacturing a micro-bump substrate based on laser processing according to an embodiment of the present application, as shown in fig. 4, after forming the seed layer 104, in order to form a plurality of micro-bumps with larger thickness and smaller diameter arranged in an array, in this embodiment of the present application, a pattern of the micro-bumps is formed on a side of the seed layer 104 facing away from the wafer substrate 102 by adopting a method for manufacturing the mask layer 105. Specifically, the mask layer 105 is formed on a side of the seed layer 104 facing away from the wafer substrate 102, and a thickness of the mask layer 105 is greater than a thickness of the seed layer 104.
In some alternative embodiments, the material of the mask layer 105 is a photoresist material, and the thickness of the mask layer 105 is greater than or equal to 10 microns and less than or equal to 50 microns.
Fig. 5 shows a schematic structural diagram of forming a through hole in the mask layer by laser processing in the method for manufacturing a micro bump substrate based on laser processing according to an embodiment of the present application, as shown in fig. 5, after the mask layer 105 is formed, the mask layer 105 is subjected to multiple exposure processing based on a laser processing process, and a plurality of through holes 106 penetrating through the mask layer 105 are formed in the mask layer 105, where the laser processing process can form the through holes 106 with a larger depth and a smaller aperture in the mask layer 105, so as to meet the current requirements of high thickness and small pitch (small diameter) of the solder micro bump. Specifically, the aperture of the through-hole 106 formed based on the laser processing process is less than or equal to 2 micrometers, and the depth of the through-hole 106 is greater than or equal to 10 μm and less than or equal to 50 μm, the depth being the dimension in the direction in which the wafer substrate 102 is directed toward the mask layer 105.
In some optional embodiments, the laser processing process may be a laser direct writing process, where the laser direct writing process is a lithography technology for preparing a high-resolution micro-nano structure based on a photo-thermal mode, in this embodiment of the present application, the laser is directly irradiated to heat the mask layer 105 to be etched by using a laser direct writing lithography machine, a photoresist material of the mask layer 105 absorbs photons to generate a thermal effect, and when a high temperature generated in a central area of a laser spot reaches a threshold temperature of the material, a change (such as a phase change, a volatilization, a chemical bond breaking, etc.) of a physical and chemical property of the material is caused, so as to directly form the through hole 106.
In some alternative embodiments, the laser treatment process may be a laser ablation process, and in this embodiment, the laser ablation apparatus is used to irradiate the surface of the mask layer 105 on the side facing away from the wafer substrate 102, so that the photoresist material in the irradiated area is heated to evaporate, melt or gasify, so that a plurality of through holes 106 are formed in the mask layer 105.
In the embodiment of the application, the mask layer 105 is processed by a laser processing technology to form a plurality of through holes 106 with large depth and small aperture, so that a plurality of micro-bumps arranged in an array with large thickness and small diameter are formed based on the through holes 106, and the electrical performance of the micro-bumps is improved. Fig. 6 is a schematic structural diagram of filling a first metal into a through hole in a method for manufacturing a micro bump substrate based on laser processing according to an embodiment of the present application, as shown in fig. 6, after forming the plurality of through holes 106, the first metal 201 is filled into the through holes 106, and optionally, a process of filling the first metal 201 into the through holes 106 may be any one of electroplating, PVD (Physical Vapor Deposition ), ALD (Atomic Layer Deposition, atomic layer deposition), sputtering, and the like.
And S13, removing the mask layer, and etching one side, close to the first metal, of the wafer substrate to form a plurality of micro-bumps arranged in an array.
And removing the mask layer, and performing etching treatment on one side, close to the first metal, of the wafer substrate to form a plurality of micro-bumps arranged in an array, wherein the diameter of each micro-bump is smaller than or equal to 2 mu m.
In the implementation of step S13, fig. 7 shows a schematic structural diagram of forming an original micro bump in the method for manufacturing a micro bump substrate based on laser processing according to an embodiment of the present application, as shown in fig. 7, after the mask layer 105 with the plurality of through holes 106 is formed, the mask layer 105 is subjected to a developing treatment, the mask layer 105 is removed, and a plurality of original micro bumps 202 corresponding to the plurality of through holes one to one are formed, where a diameter of the original micro bump 202 is less than or equal to 2 micrometers, and a thickness of the original micro bump 202 is greater than or equal to 10 micrometers and less than or equal to 50 micrometers. In the embodiment of the present application, the through hole 106 is used as a template, and the first metal is filled to form an original micro-bump 202 with the same size as the through hole 106, where the original micro-bump 202 is a precursor structure of the micro-bump on the substrate.
The relevant functional layer is then removed, resulting in the micro-bump based on the original micro-bump 202. Fig. 8 shows a schematic structural diagram of forming a micro bump in a method for manufacturing a micro bump substrate based on laser processing according to an embodiment of the present application, as shown in fig. 8, specifically, an etching or corrosion treatment is performed on a metal layer on a wafer substrate 102 (that is, an etching treatment is performed on a first metal of the seed layer 104, a first metal of the original micro bump 202, and a second metal of the adhesion layer 103), and since materials of the original micro bump 202 and the seed layer 104 are the same, thicknesses of the seed layer 104 and the adhesion layer 103 are far smaller than those of the original micro bump 202, in this embodiment of the present application, a surface of the wafer substrate 102, which is close to the first metal 201, is exposed in a gap of the original micro bump 202, is used as the etching endpoint, so as to obtain the plurality of micro bumps 203.
Since the thicknesses of the seed layer 104 and the adhesion layer 103 are far smaller than the thickness of the original micro bump 202, after the metal materials of the thicknesses of the seed layer 104 and the adhesion layer 103 are etched, the thickness of the first metal material etched by the original micro bump 202 is smaller than that of the original micro bump 202, so that the thickness of the micro bump 203 is not affected, and the thickness of the micro bump can be ensured to be still in a larger size range.
In some alternative embodiments, the micro-bump 203 has a thickness of greater than or equal to 10 μm and less than or equal to 50 μm, the thickness being the dimension in the direction of the wafer substrate 102 toward the mask layer 105; the diameter of the micro bump 203 is less than or equal to 2 μm.
And S14, forming an insulating layer in the gaps of the micro-convex points to obtain the micro-convex point substrate.
In the implementation of step S14, fig. 9 is a schematic structural diagram of forming an insulating layer in the method for manufacturing a micro-bump substrate based on laser processing according to an embodiment of the present application, as shown in fig. 9, an insulating layer material is deposited on a side of the wafer substrate 102 near the micro-bump 203, so that the insulating layer material fills the gap of the micro-bump 203, and the insulating layer 107 is obtained, where the insulating layer and the micro-bump 203 are arranged on the same layer. Finally, grinding and polishing are performed on the insulating layer 107 and the side, facing away from the wafer substrate 102, of the micro-bump 203, so that the thicknesses of the insulating layer 107 and the micro-bump 203 are the same, and a planarized surface is formed on the insulating layer 107 and the side, facing away from the wafer substrate 102, of the micro-bump substrate.
In some alternative embodiments, the insulating layer 107 may be formed by spin coating or CVD (Chemical Vapor Deposition chemical vapor deposition) or the like.
In some alternative embodiments, the material of the insulating layer 107 may be an organic high molecular polymer or an inorganic substance.
The application provides a preparation method of a micro-bump substrate based on laser processing, which comprises the following steps: providing a wafer substrate; forming a mask layer on one side of the wafer substrate, performing exposure treatment on the mask layer based on a laser treatment process, forming a plurality of through holes penetrating through the mask layer on the mask layer, and filling first metal in the through holes; removing the mask layer, and performing etching treatment on one side, close to the first metal, of the wafer substrate to form a plurality of micro-convex points which are arranged in an array manner, wherein the diameters of the micro-convex points are smaller than or equal to 2 mu m; and forming an insulating layer in the gaps of the micro-convex points to obtain the micro-convex point substrate. According to the method, the mask layer is processed through the laser treatment process, the through holes with smaller diameter and larger thickness can be formed in the mask layer, and the substrate with the micro-convex points with the diameter smaller than 2 microns can be prepared based on the through holes formed through the laser treatment process.
Based on the same inventive concept, the embodiment of the application discloses a micro-bump substrate based on laser processing, wherein the micro-bump substrate is prepared by adopting the preparation method of the micro-bump substrate based on laser processing. As shown in fig. 9, the micro bump substrate based on laser processing includes: a wafer substrate 102; a plurality of micro-bumps 203 arranged in an array, wherein the micro-bumps 203 are arranged on one side of the wafer substrate 102, and the diameter of the micro-bumps 203 is less than or equal to 2 micrometers; the insulating layer 107 is disposed on one side of the wafer substrate 102 near the micro-bump 203, and is disposed on the same layer as the plurality of micro-bumps 203 arranged in the array, so as to fill the gaps between the micro-bumps 203, and the thickness of the insulating layer 107 is the same as that of the micro-bumps 203.
Based on the same inventive concept, the embodiment of the application discloses a micro-bump interconnection structure, which comprises a first wafer and a second wafer, wherein the first wafer and the second wafer are the micro-bump substrates described in the embodiment of the application, and the first wafer and the second wafer are connected based on the micro-bumps on the micro-bump substrates in a bonding manner.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
In the description of the present specification, it should be understood that the terms "center," "thickness," "upper," "lower," "front," "rear," "horizontal," "top," "bottom," "inner," "outer," "axial," "radial," "circumferential," and the like indicate an orientation or a positional relationship based on that shown in the drawings, merely for convenience of description and to simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application.
In this application, unless specifically stated and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; the device can be mechanically connected, electrically connected and communicated; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.
In this application, unless expressly stated or limited otherwise, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, and may also include the first and second features not being in direct contact but being in contact with each other by way of additional features therebetween. Moreover, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is less level than the second feature.
The above application provides many different embodiments or examples for implementing different structures of the present application. The components and arrangements of specific examples are described above in order to simplify the present application. Of course, they are merely examples and are not intended to limit the present application. Furthermore, the present application may repeat reference numerals and/or letters in the various examples, which are for the purpose of brevity and clarity, and which do not in themselves indicate the relationship between the various embodiments and/or arrangements discussed.
Reference herein to "one embodiment," "an embodiment," or "one or more embodiments" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Furthermore, it is noted that the word examples "in one embodiment" herein do not necessarily all refer to the same embodiment.
In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the present application may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or terminal device comprising the element.
The foregoing describes in detail a micro-bump substrate based on laser processing, a manufacturing method and a micro-bump interconnection structure, and specific examples are applied to illustrate the principles and embodiments of the present application, and the description of the foregoing examples is only used to help understand the method and core idea of the present application; meanwhile, as those skilled in the art will have modifications in the specific embodiments and application scope in accordance with the ideas of the present application, the present description should not be construed as limiting the present application in view of the above.
Claims (10)
1. The preparation method of the micro-bump substrate based on laser processing is characterized by comprising the following steps of:
providing a wafer substrate;
forming a mask layer on one side of the wafer substrate, performing exposure treatment on the mask layer based on a laser treatment process, forming a plurality of through holes penetrating through the mask layer on the mask layer, and filling first metal in the through holes;
removing the mask layer, and performing etching treatment on one side, close to the first metal, of the wafer substrate to form a plurality of micro-convex points which are arranged in an array manner, wherein the diameters of the micro-convex points are smaller than or equal to 2 mu m;
and forming an insulating layer in the gaps of the micro-convex points to obtain the micro-convex point substrate.
2. The method for preparing a micro bump substrate based on laser processing according to claim 1, wherein forming a mask layer on one side of the wafer substrate comprises:
forming an adhesion layer on one side of the wafer substrate, wherein the adhesion layer is made of a second metal;
forming a seed layer on one side of the adhesion layer, which is away from the wafer substrate, wherein the seed layer is made of the first metal;
and forming a mask layer on one side of the seed layer, which is away from the wafer substrate, wherein the thickness of the mask layer is larger than that of the seed layer, and the thickness is the dimension of the wafer substrate in the direction pointing to the mask layer.
3. The method for manufacturing a micro bump substrate based on laser processing according to claim 1, wherein the exposing the mask layer based on the laser processing process to form a plurality of through holes penetrating the mask layer on the mask layer comprises:
and carrying out laser direct writing process treatment on the mask layer based on the laser direct writing device, so that the mask layer is subjected to multiple exposure treatment, and a plurality of through holes are formed in the mask layer.
4. The method for manufacturing a micro bump substrate based on laser processing according to claim 1, wherein the exposing the mask layer based on the laser processing process to form a plurality of through holes penetrating the mask layer on the mask layer comprises:
and performing laser ablation process treatment on the mask layer based on a laser ablation device, and forming a plurality of through holes in the mask layer.
5. The method for preparing a micro-bump substrate based on laser processing according to claim 2, wherein the removing the mask layer performs etching treatment on a side of the wafer substrate close to the first metal to form a plurality of micro-bumps arranged in an array, and the method comprises:
removing the mask layer to form a plurality of original micro-bumps corresponding to the through holes one by one;
etching the first metal of the seed layer, the first metal of the original micro-bump and the second metal of the adhesion layer until the surface, close to the first metal, of the wafer substrate is exposed in the gaps of the original micro-bumps, so as to obtain the plurality of micro-bumps.
6. The method for preparing a micro-bump substrate based on laser processing according to claim 1, wherein forming an insulating layer in a gap of the micro-bump to obtain the micro-bump substrate comprises:
depositing an insulating layer material on one side of the wafer substrate close to the micro-convex points so that the insulating layer material fills gaps of the micro-convex points to obtain the insulating layer;
and grinding and polishing the insulating layer and one side of the micro-bump, which is away from the wafer substrate, so that the thickness of the insulating layer is the same as that of the micro-bump, and the micro-bump substrate is obtained, wherein the thickness is the dimension of the wafer substrate in the direction pointing to the mask layer.
7. The method for manufacturing a micro bump substrate based on laser processing according to claim 1, wherein the thickness of the micro bump is greater than or equal to 10 μm and less than or equal to 50 μm, the thickness being a dimension in a direction in which the wafer substrate is directed toward the mask layer.
8. The method of manufacturing a micro bump substrate based on laser processing according to claim 1, wherein the first metal comprises at least one of: copper, gold, tungsten.
9. A micro-bump substrate based on laser processing, wherein the micro-bump substrate is prepared by the method for preparing the micro-bump substrate based on laser processing according to any one of claims 1 to 8.
10. The micro-bump interconnection structure is characterized by comprising a first wafer and a second wafer, wherein the first wafer and the second wafer are the micro-bump substrate according to claim 9, and the first wafer and the second wafer are mutually bonded and connected based on micro-bumps on the micro-bump substrate.
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