CN117712239A - Etching method of light-emitting diode epitaxial wafer - Google Patents
Etching method of light-emitting diode epitaxial wafer Download PDFInfo
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- CN117712239A CN117712239A CN202311462265.9A CN202311462265A CN117712239A CN 117712239 A CN117712239 A CN 117712239A CN 202311462265 A CN202311462265 A CN 202311462265A CN 117712239 A CN117712239 A CN 117712239A
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Abstract
The disclosure provides an etching method of a light-emitting diode epitaxial wafer, and belongs to the technical field of semiconductors. The method comprises the following steps: coating a layer of negative photoresist layer on the surface of the second semiconductor layer far away from the light-emitting layer; exposing and developing the negative photoresist layer to form a first photoresist pattern layer, wherein the first photoresist pattern layer is provided with a first hollowed-out structure; coating a positive photoresist layer on the first photoresist pattern layer; exposing and developing the positive photoresist layer to form a second photoresist pattern layer, wherein a part of the second photoresist pattern layer is positioned in the first hollow structure to form a second hollow structure; under the shielding of the first photoresist pattern layer and the second photoresist pattern layer, etching the epitaxial layer to form a groove in the epitaxial layer, wherein the included angle between the side wall of the groove and the bottom surface of the groove ranges from 70 degrees to 90 degrees. The LED light emitting device and the LED light emitting method can improve the light emitting efficiency of the LED.
Description
Technical Field
The disclosure relates to the technical field of semiconductors, and in particular relates to an etching method of a light-emitting diode epitaxial wafer.
Background
The LED as a luminous electronic element has the advantages of energy conservation, environmental protection, long service life, small volume and the like, and is widely applied to various fields such as display, illumination, urban night scenes and the like.
In the related art, an LED epitaxial wafer generally includes a substrate, and a first semiconductor layer, a light emitting layer, and a second semiconductor layer, which are sequentially stacked on the substrate, the second semiconductor layer having a groove therein exposing the first semiconductor layer. In the process of preparing the LED epitaxial wafer, the grooves are generally formed by coating a layer of photoresist on the LED epitaxial wafer, exposing and developing the photoresist, and etching the LED epitaxial wafer to form the grooves at the removed portions of the photoresist.
After the LED epitaxial wafer is etched, the side wall of the formed groove presents an inclined plane inclined to the outer side of the LED epitaxial wafer. Thereby resulting in a reduction of the light emitting area in the LED epitaxial wafer and a consequent reduction of the light emitting efficiency of the LED.
Disclosure of Invention
The embodiment of the disclosure provides an etching method of a light emitting diode epitaxial wafer, which can improve the light emitting efficiency of a light emitting diode.
In one aspect, an embodiment of the present disclosure provides an etching method for a light emitting diode epitaxial wafer, where the etching method includes:
providing a light-emitting diode epitaxial wafer, wherein the light-emitting diode epitaxial wafer comprises an epitaxial layer, and the epitaxial layer comprises a first semiconductor layer, a light-emitting layer and a second semiconductor layer which are sequentially laminated;
coating a layer of negative photoresist layer on the surface of the second semiconductor layer far away from the light-emitting layer;
exposing and developing the negative photoresist layer to form a first photoresist pattern layer, wherein the first photoresist pattern layer is provided with a first hollowed-out structure;
coating a positive photoresist layer on the first photoresist pattern layer;
exposing and developing the positive photoresist layer to form a second photoresist pattern layer, wherein a part of the second photoresist pattern layer is positioned in the first hollow structure to form a second hollow structure;
and under the shielding of the first photoresist pattern layer and the second photoresist pattern layer, etching the epitaxial layer to form a groove in the epitaxial layer, wherein the groove penetrates through the second semiconductor layer and the light-emitting layer, and the included angle between the side wall of the groove and the bottom surface of the groove ranges from 70 degrees to 90 degrees.
Optionally, the first hollowed-out structure has a first opening far away from the light emitting diode epitaxial wafer and a second opening close to the light emitting diode epitaxial wafer, and the orthographic projection of the first opening on the second semiconductor layer is located in the orthographic projection of the second opening on the second semiconductor layer.
Optionally, the second photoresist pattern layer includes a first portion and a second portion, where the first portion is located on a surface of the first photoresist pattern layer away from the led epitaxial wafer, and the second portion is located in the first hollow structure and connected with the sidewall of the first hollow structure and the second semiconductor layer, so as to form the second hollow structure.
Optionally, the second hollowed-out structure has a third opening far away from the light emitting diode epitaxial wafer and a fourth opening near the light emitting diode epitaxial wafer, the orthographic projection of the fourth opening on the second semiconductor layer is located in the orthographic projection of the third opening on the second semiconductor layer, and the orthographic projection of the fourth opening on the surface of the second semiconductor layer coincides with the orthographic projection of the first opening on the second semiconductor layer.
Optionally, exposing and developing the negative photoresist layer, including: exposing the negative photoresist layer under the shielding of the first mask plate, and developing the exposed negative photoresist layer;
exposing and developing the positive photoresist layer, comprising: exposing the positive photoresist layer under the shielding of the second mask plate, and developing the exposed positive photoresist layer;
the non-light-transmitting area of the first mask plate and the light-transmitting area of the second mask plate have the same structure.
Optionally, an inner contour of the orthographic projection of the second portion on the second semiconductor layer coincides with the orthographic projection of the first opening on the second semiconductor layer; an outer contour of the orthographic projection of the second portion on the second semiconductor layer coincides with the orthographic projection of the second opening on the second semiconductor layer.
Optionally, a radial distance between an orthographic projection of the first opening on the second semiconductor layer and an orthographic projection of the second opening on the second semiconductor layer is 2 μm to 10 μm.
Alternatively, the negative photoresist layer has a thickness ranging from 3 μm to 10 μm and the positive photoresist layer has a thickness ranging from 2 μm to 6 μm.
Optionally, the coating a positive photoresist layer on the light emitting diode epitaxial wafer includes: and coating the positive photoresist layer on the first photoresist pattern layer by using a photoresist dripping spin coating mode, wherein the photoresist dripping dosage for forming the positive photoresist layer is 1 ml-10 ml.
On the other hand, a light-emitting diode epitaxial wafer is provided, wherein the light-emitting diode epitaxial wafer comprises an epitaxial layer, and the epitaxial layer comprises a first semiconductor layer, a light-emitting layer and a second semiconductor layer which are sequentially stacked;
the epitaxial layer is provided with a groove penetrating through the second semiconductor layer and the light-emitting layer, and the included angle between the side wall of the groove and the bottom surface of the groove ranges from 70 degrees to 90 degrees.
The technical scheme provided by the embodiment of the disclosure has the beneficial effects that at least:
when the groove is etched, the etching method of the light-emitting diode epitaxial wafer provided by the embodiment of the disclosure firstly coats a layer of negative photoresist layer on the light-emitting diode epitaxial wafer and then exposes and develops, as the stronger the illumination intensity of the negative photoresist is, the less soluble the negative photoresist layer is in the developing solution, and the illumination intensity of the junction of the light-transmitting area and the non-light-transmitting area of the mask plate is gradually weakened, so that a first photoresist pattern layer with a first hollowed-out structure is formed. And then coating a layer of positive photoresist layer on the first photoresist pattern layer and exposing and developing, wherein a part of the positive photoresist layer is positioned in the first hollow structure, and the weaker the illumination intensity of the positive photoresist is, the less easily soluble the positive photoresist layer is in the developing solution, while the positive photoresist layer positioned in the first hollow structure is prevented from being exposed to light, so that the positive photoresist layer can be maintained after exposing and developing, and the first hollow structure is filled and the second hollow structure is formed. Thus increasing the edge thickness of the photoresist as a whole. And etching the epitaxial layer on the basis to form a groove penetrating the second semiconductor layer and the light-emitting layer, wherein the side wall of the groove is more effectively protected during etching due to the increase of the edge thickness of the photoresist, so that the side wall with an included angle of 70-90 degrees with the bottom of the groove is formed. The side wall which is closer to the vertical angle with the bottom surface of the groove can reduce the etched area of the light-emitting layer and improve the light-emitting efficiency of the light-emitting diode.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and other drawings may be obtained according to these drawings without inventive effort for a person of ordinary skill in the art.
Fig. 1 is a flowchart of an etching method of a light emitting diode epitaxial wafer according to an embodiment of the disclosure;
fig. 2 is a diagram illustrating an etching process of a light emitting diode epitaxial wafer according to an embodiment of the present disclosure;
FIG. 3 is a schematic view of a projection relationship between a first opening and a second opening according to an embodiment of the disclosure;
fig. 4 is a diagram illustrating an etching process of a light emitting diode epitaxial wafer according to an embodiment of the present disclosure;
fig. 5 is a diagram illustrating an etching process of a light emitting diode epitaxial wafer according to an embodiment of the present disclosure;
fig. 6 is a schematic cross-sectional structure of a light emitting diode epitaxial wafer according to an embodiment of the disclosure.
The various labels in the figures are described below:
10: a substrate;
21: a first semiconductor layer; 22: a light emitting layer; 23: a second semiconductor layer;
30: a first photoresist pattern layer; 31: a first hollow structure; 311: a first opening; 312: a second opening;
40: a positive photoresist layer; 41: a first portion; 42 a second portion; 43: a second hollow structure; 431: a third opening; 432: and a fourth opening.
Detailed Description
For the purposes of clarity, technical solutions and advantages of the present disclosure, the following further details the embodiments of the present disclosure with reference to the accompanying drawings.
Fig. 1 is a flowchart of an etching method for a light emitting diode epitaxial wafer according to an embodiment of the present disclosure. As shown in fig. 1, the method includes:
step S11: a light emitting diode epitaxial wafer is provided.
Fig. 2 is a diagram illustrating an etching process of a light emitting diode epitaxial wafer according to an embodiment of the present disclosure. As shown in fig. 2, the light emitting diode epitaxial wafer includes an epitaxial layer including a first semiconductor layer 21, a light emitting layer 22, and a second semiconductor layer 23, which are sequentially stacked.
Optionally, the light emitting diode epitaxial wafer further comprises a substrate 10. The substrate 10 may be a sapphire substrate, a silicon substrate, or a silicon carbide substrate. Meanwhile, the substrate 10 may be a flat substrate or a patterned substrate. In other embodiments, the led epitaxial wafer may be free of a substrate, which is not limited by embodiments of the present disclosure.
In this embodiment, one of the first semiconductor layer 21 and the second semiconductor layer 23 is a p-type layer, and the other of the first semiconductor layer 21 and the second semiconductor layer 23 is an n-type layer.
Alternatively, the light emitting layer 22 may be a multiple quantum well layer or a bulk single crystal layer or other structure, which is not limited by the embodiments of the present disclosure.
Step S12: and coating a layer of negative photoresist layer on the surface of the second semiconductor layer far away from the light-emitting layer.
Alternatively, the negative photoresist layer may be a negative ultraviolet photoresist layer, a negative deep ultraviolet photoresist layer, a negative extreme ultraviolet photoresist layer, a negative electron beam photoresist layer, or a negative ion beam photoresist layer.
Alternatively, the material of the negative photoresist may be a polymer containing an epoxy group, a vinyl group, or an episulfide, or the like.
Alternatively, the negative photoresist layer may have a thickness ranging from 3 μm to 10 μm.
The thickness of the negative photoresist layer is too thin to effectively protect the non-etched area of the light-emitting diode epitaxial wafer, and the thickness of the negative photoresist layer is too thick to easily cause larger size errors of exposure patterns in subsequent development exposure. The thickness of the negative photoresist layer ranges from 3 mu m to 10 mu m, so that the light-emitting diode epitaxial wafer can be well protected, and meanwhile, the small size error of the etched pattern can be ensured.
Optionally, step S12 includes: coating a negative photoresist material on the surface of the second semiconductor layer 23 far from the light-emitting layer 22 to obtain a negative photoresist layer; and performing pre-baking on the negative photoresist layer.
When the method is realized, the negative photoresist can be coated by using a photoresist dripping spin coating mode, firstly, the light-emitting diode epitaxial wafer is cleaned, then is placed in a photoresist homogenizing machine, after the photoresist solution is dripped, the negative photoresist is uniformly coated on the light-emitting diode epitaxial wafer by utilizing the centrifugal force generated by high-speed rotation, and finally, the light-emitting diode epitaxial wafer is baked at the temperature of 30-300 ℃ to form the negative photoresist layer.
In other embodiments, the negative photoresist may also be coated by spraying, dip coating, or the like, which is not limited by the embodiments of the present disclosure.
Alternatively, the light emitting diode epitaxial wafer may be cleaned by deionized water ultrasonic cleaning or ethanol ultrasonic cleaning, and the cleaning time may be twenty minutes to thirty minutes.
Step S13: and exposing and developing the negative photoresist layer to form a first photoresist pattern layer.
As shown in fig. 2, the first photoresist pattern layer 30 has a first hollow structure 31 therein.
Optionally, the first hollowed-out structure 31 has a first opening 311 far from the light emitting diode epitaxial wafer and a second opening 312 near to the light emitting diode epitaxial wafer, and the orthographic projection of the first opening 311 on the surface of the second semiconductor layer 23 far from the light emitting layer 22 is located in the orthographic projection of the second opening 312 on the surface of the second semiconductor layer 23 far from the light emitting layer 22.
The first opening 311 of the first hollow structure 31 far from the led epitaxial wafer is located in the orthographic projection of the second opening 312 close to the led epitaxial wafer in the second semiconductor layer, that is, there is an oblique angle area on the connection interface between the first hollow structure 31 and the led epitaxial wafer, and a gap exists between the oblique angle area and the led epitaxial wafer.
Optionally, step S13 includes: and exposing the negative photoresist layer under the shielding of the first mask plate A, and developing the exposed negative photoresist layer.
When the method is realized, the light-emitting diode epitaxial wafer with the negative photoresist layer is placed below the first mask plate A, an exposure light source is turned on for photoetching, so that the illuminated part in the negative photoresist layer is solidified, and an exposure pattern is formed on the negative photoresist layer. And then placing the exposed light-emitting diode epitaxial wafer in a developing solution to remove the uncured negative photoresist.
As shown in fig. 2, the exposure light source irradiates the led epitaxial wafer in a direction perpendicular to the surface of the substrate 10 above the first mask plate a, and the non-light-transmitting region of the first mask plate a is located above the position where the groove needs to be formed. In fig. 2, the first mask a is illustrated as having only one opaque region.
The exposed part of the negative photoresist is insoluble in the developing solution due to crosslinking and curing or photochemical reaction, the unexposed part is soluble in the developing solution, and the exposure degree is proportional to the intensity of the illumination. Since the illumination intensity gradually decreases as the light-transmitting region approaches the non-light-transmitting region at the junction of the light-transmitting region and the non-light-transmitting region of the first mask plate a, the exposure degree of the negative photoresist gradually decreases as the light-transmitting region approaches the edge of the first mask plate a. After the final development, the first photoresist pattern layer 30 with the first hollowed-out structure 31 is formed, wherein the first hollowed-out structure 31 is provided with a first opening 311 far away from the light emitting diode epitaxial wafer and a second opening 312 close to the light emitting diode epitaxial wafer, and the orthographic projection of the first opening 311 on the surface of the second semiconductor layer 23 far away from the light emitting layer 33 is positioned inside the orthographic projection of the second opening 312 on the surface of the second semiconductor layer 23 far away from the light emitting layer 22. That is, the side wall of the first hollow structure 31 forms an included angle with the surface of the second semiconductor layer 23 away from the light emitting layer 22, and the included angle is generally 40 ° to 60 °.
Fig. 3 is a schematic view of a projection relationship between a first opening and a second opening according to an embodiment of the disclosure. As shown in fig. 3, the orthographic projection of the first opening 311 on the surface of the second semiconductor layer 23 is located within the orthographic projection of the second opening 312 on the surface of the second semiconductor layer 23.
In other embodiments, the shapes of the first opening 311 and the second opening 312 may be circular, elliptical, etc., and the first opening 311 and the second opening 312 may be located at other positions, such as the center, the edge, etc., in the first photolithography pattern layer 30, which is not limited in this embodiment.
Referring to fig. 2, the distance indicated by the double-headed arrow in fig. 3 is the radial distance between the orthographic projection of the first opening 311 of the first photoresist pattern layer 30 on the surface of the second semiconductor layer 23 remote from the light emitting layer 22 and the orthographic projection of the second opening 312 on the surface of the second semiconductor layer 23 remote from the light emitting layer 22.
In the present embodiment, the radial distance between the orthographic projection of the first opening 311 on the surface of the second semiconductor layer 23 away from the light emitting layer 22 and the orthographic projection of the second opening 312 on the surface of the second semiconductor layer 23 away from the light emitting layer 22 is 2 μm to 10 μm. So that the positive photoresist can be ensured to fill the first hollow structure 31 more fully when the positive photoresist is coated later.
Alternatively, the exposure energy is about 70mj/cm when the negative photoresist layer is exposed 2 ～110mj/cm 2 When the exposure energy is in this range, the exposure effect of the negative photoresist layer is good.
In other embodiments, the exposure energy of the negative photoresist layer may vary according to the material, thickness and exposure time of the negative photoresist layer, and the present embodiment is not limited thereto.
In this embodiment, the exposure light source is a mercury lamp, and the exposure mode is proximity exposure. In other embodiments, other light sources may be used for exposure. The exposure mode may be a contact type or a projection type, and the embodiment is not limited thereto. In the exposure process, a single exposure mode may be used, or a multiple exposure superposition mode may be used, which is not limited in this embodiment.
Alternatively, the developer used for developing the negative photoresist layer may be xylene, butyl acetate, or the like.
Step S14: a positive photoresist layer is coated on the first photoresist pattern layer 30.
Alternatively, the positive photoresist may be a positive ultraviolet photoresist, a positive deep ultraviolet photoresist, a positive electron beam photoresist, a positive ion beam photoresist, or a positive X-ray photoresist.
Alternatively, the material of the positive photoresist may be a polymer containing methyl methacrylate, vinyl sulfone, or diazonium species, or the like.
Alternatively, the positive photoresist layer may have a thickness ranging from 2 μm to 6 μm. The thickness range can effectively protect the non-etching area of the LED epitaxial wafer, and simultaneously, the etching pattern size error is smaller when the LED epitaxial wafer is etched.
It should be noted that, since the positive photoresist layer is initially in a liquid state, the first hollow structure 31 is spontaneously filled up during the coating process, and the thickness is accumulated on the first photoresist pattern layer 30 on the basis of this. Optionally, step S14 includes: coating a positive photoresist material on the first photoresist pattern layer 30 to obtain a positive photoresist layer; and performing pre-baking on the positive photoresist layer.
When the method is realized, the positive photoresist can be coated by using a photoresist dripping spin coating mode, firstly, the light-emitting diode epitaxial wafer with the first photoresist pattern layer 30 is cleaned, then the wafer is placed in a photoresist homogenizing machine, 1ml to 10ml of photoresist solution is instilled, the positive photoresist is uniformly coated by utilizing centrifugal force under high-speed rotation, and finally, the wafer is baked at the temperature of 30 ℃ to 300 ℃ to form the positive photoresist layer.
By using the above-mentioned coating method, positive photoresist can be coated on the first photoresist pattern layer 30 more uniformly, and simultaneously, positive photoresist can be coated in the first hollow structure 31 more sufficiently, thereby avoiding occurrence of bubbles and voids.
In other embodiments, the positive photoresist may also be coated by spraying, dipping, or the like, which is not limited by the embodiments of the present disclosure.
Alternatively, the light emitting diode epitaxial wafer having the first photoresist pattern layer 30 may be cleaned using deionized water ultrasonic cleaning or ethanol ultrasonic cleaning for twenty to thirty minutes.
Step S15: and exposing and developing the positive photoresist layer to form a second photoresist pattern layer.
Fig. 4 is an etching process diagram of a light emitting diode epitaxial wafer according to an embodiment of the present disclosure. As shown in fig. 4, the second photoresist pattern layer 40 is partially located in the first hollow structure 31 to form a second hollow structure 43.
Optionally, the second photoresist pattern layer 40 includes a first portion 41 and a second portion 42, where the first portion 41 is located on a surface of the first photoresist pattern layer 30 away from the led epitaxial wafer, and the second portion 42 is located in the first hollow structure 31 and connected to a sidewall of the first hollow structure 31 and the second semiconductor layer 23 to form a second hollow structure 43.
The second portion 42 fills the hollow portion between the first opening 311 and the second opening 312 in the first hollow structure 31, that is, the second portion 42 increases the thickness of the photoresist at the position, thereby enhancing the protection effect of the photoresist at the position on the led epitaxial wafer during etching.
Referring to fig. 2 and 4 again, optionally, the second hollowed-out structure 43 has a third opening 431 far from the light emitting diode epitaxial wafer and a fourth opening 432 close to the light emitting diode epitaxial wafer, the orthographic projection of the fourth opening 432 on the surface of the second semiconductor layer 23 far from the light emitting layer 22 is located in the orthographic projection of the third opening 431 on the surface of the second semiconductor layer 23 far from the light emitting layer 22, and the orthographic projection of the fourth opening 432 on the surface of the second semiconductor layer 23 far from the light emitting layer 22 coincides with the orthographic projection of the first opening 311 on the surface of the second semiconductor layer 23 far from the light emitting layer 22.
The front projection of the fourth opening 432 and the front projection of the first opening 311 on the surface of the second semiconductor layer 23 far away from the light emitting layer 22 are overlapped, that is, the second hollow structure 43 makes the hollow portion perpendicular to the direction of the second semiconductor layer 23 between the first opening 311 and the second opening 312 in the first hollow structure 31 just fill, so that the protection effect on the side wall of the groove in the etching process is better.
Optionally, step S15 includes: and exposing the positive photoresist layer under the shielding of the second mask plate B, and developing the exposed positive photoresist layer.
When the method is realized, the light-emitting diode epitaxial wafer with the positive photoresist layer is placed below the second mask plate B, an exposure light source is turned on for photoetching, so that the non-illuminated part in the positive photoresist layer is solidified, and an exposure pattern is formed on the positive photoresist layer. And then the exposed light-emitting diode epitaxial wafer is placed in a developing solution to remove the uncured positive photoresist.
As shown in fig. 4, the exposure light source irradiates the led epitaxial wafer in the direction perpendicular to the surface of the substrate 10 above the second mask plate B, and the non-light-transmitting region of the second mask plate B is located above the position other than the position where the groove needs to be formed. In fig. 4, the second mask B is illustrated as having only the opaque region.
The exposed portions of positive photoresist are photochemically reacted to dissolve in the developer, the unexposed portions are insoluble in the developer, and the degree of exposure is also proportional to the intensity of the light. At the junction of the light-transmitting area and the non-light-transmitting area of the second mask plate B, the illumination intensity gradually decreases along with the approach of the non-light-transmitting area, so that the exposure degree of the positive photoresist gradually decreases along with the approach of the edge of the non-light-transmitting area of the second mask plate B.
Meanwhile, as a part of the coated positive photoresist is positioned in the first hollow structure 31 of the first photoresist pattern layer 30, the first photoresist pattern layer 30 and the positive photoresist coated on the first photoresist pattern layer 30 play a role of shielding the part of the positive photoresist in the first hollow structure 31 in the direction vertical to the surface of the substrate 10, so that the part of the positive photoresist is prevented from being irradiated by light. After final development, a second photoresist pattern layer 40 is formed, which includes two parts, wherein a first part 41 is located on a surface of the first photoresist pattern layer 30, which is far away from the led epitaxial wafer, and a second part 42 is located in the first hollowed-out structure 31. The second photoresist pattern layer 40 has a second hollow structure 43, the second hollow structure 43 has a third opening 431 far from the led epitaxial wafer and a fourth opening 432 near the led epitaxial wafer, the orthographic projection of the fourth opening 432 on the surface of the second semiconductor layer 23 far from the light emitting layer 22 is located in the orthographic projection of the third opening 431 on the surface of the second semiconductor layer 23 far from the light emitting layer 22, and the orthographic projection of the fourth opening 432 on the surface of the second semiconductor layer 23 far from the light emitting layer 22 coincides with the orthographic projection of the first opening 311 on the surface of the second semiconductor layer 23 far from the light emitting layer 22.
The second photoresist pattern layer 40 fills the first hollow structure 31 and forms a second hollow structure 43, thereby increasing the edge thickness of the photoresist as a whole. And then etching the epitaxial layer on the basis to form a groove penetrating through the second semiconductor layer and the light-emitting layer, and more effectively protecting the side wall of the groove during etching due to the increase of the edge thickness of the photoresist, so that the side wall which is closer to the vertical angle with the bottom surface of the groove is formed. And further, the area of the light-emitting layer etched away is reduced, and the light-emitting efficiency of the light-emitting diode is improved.
In the present embodiment, as shown in fig. 2 and 4, the inner contour of the orthographic projection of the second portion 42 on the surface of the second semiconductor layer 23 away from the light emitting layer 22 coincides with the orthographic projection of the first opening 311 on the surface of the second semiconductor layer 23 away from the light emitting layer 22. And the outer contour of the orthographic projection of the second portion 42 on the surface of the second semiconductor layer 23 remote from the light emitting layer 22 coincides with the orthographic projection of the second opening 312 on the surface of the second semiconductor layer 23 remote from the light emitting layer 22.
That is, the second portion 42 fills the hollow portion (such as the gray area in fig. 2) between the first opening 311 and the second opening 312 in the first hollow structure 31 in the direction perpendicular to the second semiconductor layer 23 completely, and the second portion 42 increases the thickness of the photoresist on the whole of the position in the direction perpendicular to the second semiconductor layer 23, so as to enhance the protection effect of the photoresist on the light emitting diode epitaxial wafer at the position during etching as much as possible.
Optionally, the non-light-transmitting area of the first mask a and the light-transmitting area of the second mask B have the same structure. Namely, the pattern shapes required by etching the grooves are all the same, so that the etched grooves are more accurate in size.
Alternatively, the positive photoresist layer is exposed to an exposure energy of about 150mj/cm 2 ～190mj/cm 2 When the exposure energy is in the range, the exposure effect of the positive photoresist layer is better.
In other embodiments, the exposure energy of the positive photoresist layer may vary according to the material, thickness, and exposure time of the positive photoresist layer, and the present embodiment is not limited thereto.
In this embodiment, the exposure light source is a mercury lamp, and the exposure mode is proximity exposure. In other embodiments, other light sources may be used for exposure. The exposure mode may be a contact type or a projection type, and the embodiment is not limited thereto. In the exposure process, a single exposure mode may be used, or a multiple exposure superposition mode may be used, which is not limited in this embodiment.
Alternatively, the developer used for positive photoresist layer development may be ammonium hydroxide.
Step S16: under the shielding of the first photoresist pattern layer 30 and the second photoresist pattern layer 40, the light emitting diode epitaxial wafer is etched to form a groove in the light emitting diode epitaxial wafer, the groove penetrates through the second semiconductor layer 23 and the light emitting layer 22, and the included angle between the side wall of the groove and the bottom surface of the groove ranges from 70 degrees to 90 degrees.
In this embodiment, the shape of the groove is a cylinder with the shape of the non-light-transmitting area of the first mask a or the shape of the light-transmitting area of the second mask B as the bottom surface.
In this embodiment, the shape of the non-light-transmitting region of the first mask plate a is the same as the shape of the light-transmitting region of the second mask plate B, so that the etched cylindrical groove with high etching depth is obtained by taking the shape of the non-light-transmitting region of the first mask plate a or the shape of the light-transmitting region of the second mask plate B as the bottom surface.
The bottom surface of the groove may be rectangular, circular or elliptical, and the bottom surface of the groove is not limited in this embodiment.
When the method is realized, the light-emitting diode epitaxial wafer can be etched by using an inductively coupled plasma etching method.
Fig. 5 is a diagram illustrating an etching process of a light emitting diode epitaxial wafer according to an embodiment of the present disclosure. As shown in fig. 5, the light emitting diode epitaxial wafer is subjected to inductively coupled plasma ion bombardment in a direction perpendicular to the light emitting diode epitaxial wafer under the shielding of the first photoresist pattern layer 30 and the second photoresist pattern layer 40.
Firstly, before etching, the light-emitting diode epitaxial wafer is cleaned to remove impurities and organic matters on the surface of the light-emitting diode epitaxial wafer, and the accuracy and the stability of etching are ensured. Setting gas flow, radio frequency power and the like according to the depth and shape of etching, then starting to perform inductive coupling plasma ion bombardment etching on the light-emitting diode epitaxial wafer, taking out the light-emitting diode epitaxial wafer after the etching is completed, and cleaning the etched light-emitting diode epitaxial wafer.
The inductively coupled plasma etching has the advantages of high etching rate, high selectivity, small etching damage, good large-area uniformity, high controllability of etched section profile, flat and smooth etched surface and the like, so that a good etching effect can be achieved.
In other embodiments, the etching may be performed using other etching techniques such as reactive ion etching, which is not limited in this embodiment.
In this embodiment, since the photoresist structure formed by the first photoresist pattern layer 30 and the second photoresist pattern layer 40 increases the edge thickness as a whole, the protection effect on the sidewall of the groove of the light emitting diode epitaxial wafer is better during etching, so that the included angle between the sidewall of the groove and the bottom surface of the groove obtained by final etching ranges from 70 ° to 90 °. Thus, the etched area of the light emitting layer 22 is smaller, and the light emitting efficiency of the light emitting diode is higher.
It should be noted that, as shown in fig. 5, in the photoresist structure formed by the first photoresist pattern layer 30 and the second photoresist pattern layer 40, the first portion 41 of the second photoresist pattern layer 40 also has an oblique angle region, and when etching is performed, the thickness of the oblique angle region of the first portion 41 affects the protection effect of the sidewall of the groove to a certain extent, so that the formed included angle between the sidewall of the groove and the bottom surface of the groove may be in the range of 70 ° to 90 °.
Optionally, step S16 includes: the first photoresist pattern layer 30 and the second photoresist pattern layer 40 are subjected to a removal process.
In implementation, the etched led epitaxial wafer may be immersed in acetone, and subjected to ultrasonic cleaning until the photoresist is completely removed, thereby obtaining a led epitaxial wafer with grooves formed therethrough, the grooves penetrating through the second semiconductor layer 23 and the light-emitting layer 22.
Fig. 6 is a schematic cross-sectional structure of a light emitting diode epitaxial wafer according to an embodiment of the disclosure. As shown in fig. 6, the light emitting diode epitaxial wafer includes a substrate 10 and an epitaxial layer including a first semiconductor layer 21, a light emitting layer 22, and a second semiconductor layer 23 sequentially stacked on the substrate; the epitaxial layer has a recess penetrating the second semiconductor layer 23 and the light emitting layer 22, wherein the sidewall of the recess and the bottom surface of the recess have an included angle ranging from 70 ° to 90 ° as shown by the dotted line in fig. 6. The light-emitting diode epitaxial wafer is formed by adopting the method.
In the related art, the thickness of the photoresist edge part is thinner, so that the included angle between the side wall of the etched groove and the bottom surface of the groove is usually 40-60 degrees, and the area of the light-emitting layer removed by etching the groove is also larger.
In the light-emitting diode epitaxial wafer etched by the etching method in the embodiment, the included angle between the side wall of the groove of the light-emitting diode epitaxial wafer and the bottom surface of the groove is 70-90 degrees.
Therefore, the light-emitting diode epitaxial wafer obtained by etching by the etching method in the embodiment has less etched area of the light-emitting layer 22, so that the light-emitting efficiency of the light-emitting diode epitaxial wafer is higher.
The photoresist is exposed, the mask plate is separated from the photoresist, and the exposure light is diffusely reflected, so that the illumination intensity of the photoresist covered by the edge of the mask plate is gradually weakened, the degree of the photoresist dissolved in the developing solution is related to the illumination intensity of the photoresist, the edge of the photoresist is in a gradually thinned oblique angle shape after being cleaned by the developing solution, and the thinner part of the photoresist has poorer protection effect on the light-emitting diode epitaxial wafer in the etching process, so that the etching shape of the light-emitting diode epitaxial wafer is influenced.
When the groove is etched, the etching method of the light-emitting diode epitaxial wafer provided by the embodiment of the disclosure firstly coats a layer of negative photoresist layer on the light-emitting diode epitaxial wafer and then exposes and develops, as the stronger the illumination intensity of the negative photoresist is, the less soluble the negative photoresist layer is in the developing solution, and the illumination intensity of the junction of the light-transmitting area and the non-light-transmitting area of the mask plate is gradually weakened, so that a first photoresist pattern layer with a first hollowed-out structure is formed. And then coating a layer of positive photoresist layer on the first photoresist pattern layer and exposing and developing, wherein a part of the positive photoresist layer is positioned in the first hollow structure, and the weaker the illumination intensity of the positive photoresist is, the less easily soluble the positive photoresist layer is in the developing solution, while the positive photoresist layer positioned in the first hollow structure is prevented from being exposed to light, so that the positive photoresist layer can be maintained after exposing and developing, and the first hollow structure is filled and the second hollow structure is formed. Thus increasing the edge thickness of the photoresist as a whole. And etching the epitaxial layer on the basis to form a groove penetrating the second semiconductor layer and the light-emitting layer, wherein the side wall of the groove is more effectively protected during etching due to the increase of the edge thickness of the photoresist, so that the side wall with an included angle of 70-90 degrees with the bottom of the groove is formed. The side wall which is closer to the vertical angle with the bottom surface of the groove can reduce the etched area of the light-emitting layer and improve the light-emitting efficiency of the light-emitting diode.
The foregoing description of the preferred embodiments of the present disclosure is provided for the purpose of illustration only, and is not intended to limit the disclosure to the particular embodiments disclosed, but on the contrary, the intention is to cover all modifications, equivalents, alternatives, and alternatives falling within the spirit and principles of the disclosure.
Claims (10)
1. The etching method of the light-emitting diode epitaxial wafer is characterized by comprising the following steps of:
providing a light-emitting diode epitaxial wafer, wherein the light-emitting diode epitaxial wafer comprises an epitaxial layer, and the epitaxial layer comprises a first semiconductor layer (21), a light-emitting layer (22) and a second semiconductor layer (23) which are sequentially laminated;
coating a negative photoresist layer on the surface of the second semiconductor layer (23) far away from the light-emitting layer (22);
exposing and developing the negative photoresist layer to form a first photoresist pattern layer (30), wherein a first hollowed-out structure (31) is arranged in the first photoresist pattern layer (30);
coating a positive photoresist layer on the first photoresist pattern layer (30);
exposing and developing the positive photoresist layer to form a second photoresist pattern layer (40), wherein a part of the second photoresist pattern layer (40) is positioned in the first hollow structure (31) to form a second hollow structure (43);
under the shielding of the first photoresist pattern layer (30) and the second photoresist pattern layer (40), etching the epitaxial layer to form a groove in the epitaxial layer, wherein the groove penetrates through the second semiconductor layer (23) and the light-emitting layer (22), and the included angle between the side wall of the groove and the bottom surface of the groove ranges from 70 degrees to 90 degrees.
2. The etching method according to claim 1, wherein the first hollowed-out structure (31) has a first opening (311) far from the light emitting diode epitaxial wafer and a second opening (312) close to the light emitting diode epitaxial wafer, and an orthographic projection of the first opening (311) on the second semiconductor layer (23) is located in an orthographic projection of the second opening (312) on the second semiconductor layer (23).
3. The etching method according to claim 1, wherein the second photoresist pattern layer (40) includes a first portion (41) and a second portion (42), the first portion (41) is located on a surface of the first photoresist pattern layer (30) away from the light emitting diode epitaxial wafer, and the second portion (42) is located in the first hollow structure (31) and is connected with a sidewall of the first hollow structure (31) and the second semiconductor layer (23) to form the second hollow structure (43).
4. The etching method according to claim 3, wherein the second hollowed-out structure (43) is provided with a third opening (431) far away from the light emitting diode epitaxial wafer and a fourth opening (432) close to the light emitting diode epitaxial wafer, the orthographic projection of the fourth opening (432) on the second semiconductor layer (23) is located in the orthographic projection of the third opening (431) on the second semiconductor layer (23), and the orthographic projection of the fourth opening (432) on the surface of the second semiconductor layer (23) coincides with the orthographic projection of the first opening (311) on the second semiconductor layer (23).
5. The etching method according to claim 1, wherein exposing and developing the negative photoresist layer comprises:
exposing the negative photoresist layer under the shielding of the first mask plate, and developing the exposed negative photoresist layer;
exposing and developing the positive photoresist layer, comprising:
exposing the positive photoresist layer under the shielding of the second mask plate, and developing the exposed positive photoresist layer;
the non-light-transmitting area of the first mask plate and the light-transmitting area of the second mask plate have the same structure.
6. An etching method according to claim 3, characterized in that the inner contour of the orthographic projection of the second portion (42) on the second semiconductor layer (23) coincides with the orthographic projection of the first opening (311) on the second semiconductor layer (23);
an outer contour of the orthographic projection of the second portion (42) on the second semiconductor layer (23) coincides with an orthographic projection of the second opening (312) on the second semiconductor layer (23).
7. Etching method according to claim 2, characterized in that the radial distance between the orthographic projection of the first opening (311) on the second semiconductor layer (23) and the orthographic projection of the second opening (312) on the second semiconductor layer (23) is 2 μm to 10 μm.
8. The etching method according to claim 1, wherein the negative photoresist layer has a thickness ranging from 3 μm to 10 μm and the positive photoresist layer has a thickness ranging from 2 μm to 6 μm.
9. The etching method according to claim 1, wherein forming a positive photoresist layer on the first photoresist pattern layer (30) comprises:
and coating a positive photoresist material on the first photoresist pattern layer (30) by using a photoresist dripping spin coating mode, wherein the photoresist dripping dosage for forming the positive photoresist layer is 1 ml-10 ml.
10. A light emitting diode epitaxial wafer, characterized in that the light emitting diode epitaxial wafer comprises an epitaxial layer comprising a first semiconductor layer (21), a light emitting layer (22) and a second semiconductor layer (23) laminated in sequence;
the epitaxial layer is provided with a groove penetrating through the second semiconductor layer (23) and the light-emitting layer (22), and the included angle between the side wall of the groove and the bottom surface of the groove ranges from 70 degrees to 90 degrees.
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| CN202311462265.9A CN117712239A (en) | 2023-11-03 | 2023-11-03 | Etching method of light-emitting diode epitaxial wafer |
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