KR101063110B1 - Method of manufacturing patterned sapphire substrate - Google Patents

Method of manufacturing patterned sapphire substrate Download PDF

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Publication number
KR101063110B1
KR101063110B1 KR1020110010658A KR20110010658A KR101063110B1 KR 101063110 B1 KR101063110 B1 KR 101063110B1 KR 1020110010658 A KR1020110010658 A KR 1020110010658A KR 20110010658 A KR20110010658 A KR 20110010658A KR 101063110 B1 KR101063110 B1 KR 101063110B1
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South Korea
Prior art keywords
pattern
exposure
sapphire substrate
exposure step
sapphire
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KR1020110010658A
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Korean (ko)
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이종희
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(주)더리즈
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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/60Substrates
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20Exposure; Apparatus therefor
    • G03F7/2022Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274Photolithographic processes

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

A method for producing a sapphire substrate having a pattern formed on a surface capable of uniformly forming a surface pattern on a substrate of a sapphire wafer in a desired shape is proposed. In the method of manufacturing a sapphire substrate having a pattern formed on the proposed surface, a photoresist layer is formed on the top surface of the sapphire wafer, the photomask is aligned thereon, and the first and second exposures are performed and developed to form a pattern on the surface. A sapphire substrate is prepared.

Description

Sapphire substrate manufacturing method with a pattern formed on the surface {METHOD OF MANUFACTURING PATTERNED SAPPHIRE SUBSTRATE}

The present invention relates to a method for manufacturing a sapphire substrate having a pattern formed on its surface, and more particularly, to a method for manufacturing a sapphire substrate having a pattern formed on a surface capable of uniformly forming a surface pattern on a substrate of a sapphire wafer in a desired shape. .

A light emitting device (LED) is a device in which a material contained in the device emits light, and converts energy due to electron / hole recombination into light by bonding a semiconductor using a diode such as a light emitting diode. It is an emitting device. Such light emitting devices are widely used as lighting, display devices, and light sources, and their development is being accelerated.

In particular, with the recent commercialization of mobile phone keypads, side viewers, camera flashes, etc. using gallium nitride (GaN) -based light emitting devices that have been activated and used, general lighting development using LEDs has been vigorous. Its applications such as backlight units of large TVs, automotive headlamps, and general lighting have moved from small portable products to large size, high output, high efficiency, and reliable products, requiring light sources that exhibit the characteristics required for such products.

One of the problems pointed out by the semiconductor light emitting device is low luminous efficiency. The luminous efficiency is determined by the light generation efficiency and the efficiency emitted out of the device. The internal quantum efficiency of the light emitting device reaches almost 100%, but the external quantum efficiency that is actually emitted from the device is very low.

When the light generated inside the light emitting device is extracted to the outside of the light emitting device, total reflection occurs due to the difference in refractive index at the interface between the light emitting device and air or the encapsulant material, and then proceeds back to the inside. When the light generated inside the light emitting device reaches the surface of the light emitting device, when the incident angle is larger than the critical angle, the light is not extracted but is reflected and proceeds back to the inside of the device.

Light that has not escaped the surface of the light emitting device may be lost as heat while moving inside the device, which may reduce the light extraction efficiency of the light emitting device and increase the amount of heat generated by the light emitting device, thereby shortening the life of the light emitting device. .

Therefore, the development of a technique for increasing the light extraction efficiency in the gallium nitride-based semiconductor light emitting device is required.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a sapphire substrate manufacturing method in which a pattern is formed on a surface capable of uniformly forming a surface pattern on a substrate of a sapphire wafer.

Sapphire substrate manufacturing method having a pattern formed on the surface according to an aspect of the present invention for achieving the above object is a photoresist layer forming step of applying a photoresist on the upper surface of the sapphire wafer; A photomask alignment step of aligning the photomask on the photoresist layer; A first exposure step of performing first exposure; A second exposure step of performing a second exposure after the first exposure step; And developing a second exposed sapphire wafer to form a pattern on the surface thereof.

The photomask alignment step may be performed by a contact-align method.

The waiting time between the first exposure step and the second exposure step may be equal to or greater than the sum of the time required for the first exposure step and the time required for the second exposure step. In addition, the waiting time between the first exposure step and the second exposure step may be 6 seconds or more.

The ratio of time taken for exposure of the first exposure step and the second exposure step may be 6: 4 to 4: 6.

After the first exposure step, the step of vacuum pump; may further include.

The second exposure step may further include an additional exposure step, and the additional exposure step may be at least one time.

The pattern may be a dot pattern, and the resolution of the pattern may be 2 μm or less.

According to the present invention, when forming a pattern on the surface of the sapphire wafer, the exposure is separated into several stages, and a waiting time is provided between the exposure stages to remove impurities, which may occur during exposure, and the exposure can be performed. Edo also has the effect of producing a uniform pattern in a desired shape.

Therefore, the semiconductor light emitting device manufactured using the sapphire substrate manufactured according to the present invention has an effect of increasing light extraction efficiency that can emit light trapped inside the device to the outside due to a uniform pattern. In addition, there is an effect of improving the overall luminous efficiency by reducing the potential defect of the semiconductor layer formed on a uniform pattern.

1 is a view provided for the description of the method for manufacturing a sapphire substrate having a pattern formed on the surface according to an embodiment of the present invention.
FIG. 2 is a view illustrating UV exposure by aligning a photomask on a sapphire wafer in a method of manufacturing a sapphire substrate having a pattern formed on a surface according to an embodiment of the present invention, and FIG. 3 is a plan view of the photomask in FIG. 2. .
4A and 4B are SEM photographs of patterns of the sapphire substrate according to the present invention and the sapphire substrate according to the prior art, respectively.
5a and 5b are photographs of the surface reflectivity of the pattern of the sapphire substrate according to the present invention and the sapphire substrate according to the prior art.
6 is a graph showing the standard deviation of the pattern according to the exposure time ratio, and FIG. 7 is a graph showing the standard deviation of the pattern according to the waiting time.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, embodiments of the present invention may be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. Embodiments of the present invention are provided to more fully describe the present invention to those skilled in the art. In the accompanying drawings, there may be a component having a specific pattern or having a predetermined thickness, but this is for convenience of description or distinction. It is not limited only.

1 is a view provided for the description of the method for manufacturing a sapphire substrate having a pattern formed on the surface according to an embodiment of the present invention, Figure 2 is a view showing the UV exposure by aligning the photomask on the sapphire wafer, and 3 is a plan view of the photomask of FIG. 2. Hereinafter, a description will be given with reference to FIGS. 1 to 3.

According to the present embodiment, a photoresist layer forming step of forming a photoresist layer on an upper surface of a sapphire wafer to manufacture a patterned sapphire substrate (PSS); A photomask alignment step of aligning the photomask on the photoresist layer; A first exposure step of performing first exposure; A second exposure step of performing a second exposure after the first exposure step; And developing the second exposed sapphire wafer to form a pattern on the surface.

In this embodiment, a photolithography process using a photoresist is performed to form a pattern on the sapphire wafer. Sapphire substrate is most often used as a growth substrate when manufacturing GaN-based semiconductor light emitting devices, especially since GaN-based semiconductors are hexagonal crystals and transparent. The semiconductor light emitting device is manufactured by growing an n-type semiconductor, an active layer, and a p-type semiconductor on a sapphire substrate, and forming a corresponding electrode on each semiconductor. At this time, the light generated in the active layer may be totally reflected without being extracted to the outside at the interface due to the difference in refractive index between the semiconductor and the air.

The totally reflected light travels back to the inside of the semiconductor light emitting device, and the light propagated inside may be extracted to the outside from the side of the semiconductor light emitting device, or may be extracted to the outside of the light emitting surface of the semiconductor light emitting device. When light reaches the interface between the semiconductor layer and the sapphire substrate, since the refractive index of the GaN semiconductor is 2.5 and the refractive index of the sapphire substrate is 1.7, the light may be totally reflected again and trapped in the semiconductor layer due to the difference in refractive index.

In such a case, a pattern is formed on the sapphire substrate as a method for increasing light emission efficiency by extracting light trapped inside the semiconductor layer to the outside. When the pattern is formed on the sapphire substrate, not only the light extraction efficiency can be increased, but also dislocation defects that may occur in the semiconductor layer grown on the sapphire substrate can be suppressed, thereby increasing the internal quantum efficiency. Therefore, when the pattern is formed in a shape or size that can maximize the light extraction efficiency and dislocation defect suppression on the sapphire substrate can maximize the effect.

In order to manufacture a sapphire substrate having a pattern formed on the surface, a photoresist is formed by applying photoresist to a surface on which a pattern is to be formed on the sapphire wafer (S100). Photoresist is a kind of resin that is sensitive to light and includes a positive type photoresist and a negative type photoresist. Positive photoresist is a form in which the part exposed to light dissolves well during exposure and the part that is not exposed to light remains during development, and a negative type photoresist remains in development when the part exposed to light does not dissolve well. It is a form that remains.

The photoresist may be subjected to a baking process to increase adhesion during development or etching. Baking processes are classified into soft baking, which is applied after baking to a wafer, hard baking that is baked before an etching process, and post baking, which is post-exposure baking, depending on the type of wafer and photoresist. Each is baked at a temperature of about 100 ° C to 150 ° C.

When the photoresist layer is formed on the sapphire substrate, the photomask for exposure is aligned thereon (S110). The photomask is a plate on which a pattern to be formed is drawn on a sapphire substrate, and is divided into an opaque region for blocking light and a transparent region for passing light. In FIG. 3, a dot-shaped pattern is illustrated. When the photoresist is in a positive shape, the dot pattern is an opaque region through which light does not pass, and regions other than the dot pattern are transparent regions.

The alignment process, which is a process of aligning a photomask on a sapphire substrate, includes a contact aligner for contacting the substrate and the photomask, a proximity aligner where the substrate and the photomask are spaced at small intervals, and It is possible to use an alignment device such as a projection printer in which the substrate and the photomask are spaced at predetermined intervals, and to use a stepper for reducing and transferring the pattern of the photomask onto the wafer using an optical lens. Among these, the stepper is a relatively uniform pattern and high resolution, but expensive equipment.

Therefore, it is preferable to use a contact aligner for forming a pattern by contacting a photomask with a substrate which can be used even when the device is relatively inexpensive and the pattern resolution is high. Referring to FIG. 2, a pattern is formed on the sapphire wafer 210 using a contact aligner.

The sapphire wafer 210 on which the photoresist layer is formed is positioned on the wafer chuck 220, and the vacuum pump 230 is connected to the lower portion of the wafer chuck 220. The side surface of the sapphire wafer 210 is sealed by the vacuum sealing part 231. The pattern resolution that can be realized by the contact aligner is generally 2µm for Line & Space. In order to increase the pattern resolution of the contact aligner, the adhesion between the photomask and the wafer must be increased.

In order for the sapphire wafer 210 and the photomask 240 to be in close contact with each other, impurities such as gas or the like should not be present on the contact surface. Therefore, after aligning the photomask 240 on the sapphire wafer 210, the UV exposure step is first performed (S120), the first exposure is terminated and the sapphire wafer 210 is waited (S130). .

The reason why the sapphire wafer 210 is waited after the first exposure is that gas such as solvent vapor may be generated from the photoresist layer that receives light in the first exposure step. The gas generated in the photoresist layer is present between the photomask 240 and the photoresist layer on the sapphire wafer 210. If the gas is not discharged quickly, a fine gap may be formed between the photoresist layer and the photomask 240. Therefore, the adhesion between the sapphire wafer 210 and the photomask 240 is lowered and may affect the uniformity and shape when forming the pattern.

In the present embodiment, the sapphire wafer 210 is held for a predetermined time after the first exposure step. At this time, the gas may be discharged using the vacuum pump 230. Thereafter, a second exposure step S140 of exposing again is performed. The exposure time determined according to the type of photoresist is divided into primary exposure and secondary exposure, and an impurity that may be formed between the sapphire wafer 210 and the photomask 240 is removed therebetween. It is. The exposure time ratio, which is the time taken for the exposure of the first and second exposure steps, may be 6: 4 to 4: 6, and preferably, the exposure time ratio of the first and second exposure steps is 5: 5.

The waiting time between the first exposure step and the second exposure step may be appropriately selected in consideration of the type of photoresist and the desired pattern resolution, but preferably, the time required for the first exposure and the time required for the second exposure is determined. It may be more than the summation time.

When the exposure is completed, the sapphire wafer 210 is developed to form a pattern on the surface (S150).

In the present exemplary embodiment, the exposure step is performed by dividing the primary and secondary, but the exposure may be divided into three or more times in consideration of the type of photoresist or the desired pattern resolution. That is, after the secondary exposure step, a further exposure step may be further included, and the additional exposure step may be at least one time. When the exposure step is performed by dividing the exposure step into the first and second as in the present embodiment, the resolution of the pattern may be increased to 2 μm or less by using a contact aligner.

Forming a semiconductor light emitting device in which an epitaxial layer of an n-type semiconductor layer, an active layer, and a p-type semiconductor layer is formed on a sapphire substrate having a pattern formed on a surface manufactured according to the present embodiment, potential defects of the epi layer, etc. are suppressed and film quality is reduced. This is excellent, and the light trapped inside due to the pattern of the sapphire substrate can extract the light extraction efficiency can be increased.

The present invention will be described in more detail with reference to the following.

Example I

Using a photomask and a contact aligner having a dot pattern, a pattern was formed on the sapphire wafer according to the present invention and the prior art to evaluate the shape and uniformity of the pattern.

Example 1

A 2 inch sapphire wafer was prepared, and a positive photoresist layer was formed on the surface. The spin coating apparatus was applied on a sapphire wafer at 5000 rpm for 25 seconds, and a soft baking process was performed at 110 ° C. for 120 seconds using a hot plate. Thereafter, a contact aligner and a pattern having a dot shape of 2.0 μm and a PSS pattern having a space of 1.0 μm were used for UV exposure. UV exposure was performed for 3 seconds for the primary exposure, 8 seconds for the delay time, and 3 seconds for the secondary exposure. After exposure, the pattern was performed for 60 seconds, washed with deionized water for 3 minutes, and dried for 1 minute to prepare a sapphire substrate having a pattern formed on the surface.

Comparative Example 1

The same procedure as in Example 1 was conducted except that the UV exposure was performed once for 6 seconds.

[evaluation]

The sapphire substrates of Example 1 and Comparative Example 1 were evaluated by using an optical microscope at a low magnification (x100) to a high magnification (x1000), and the patterns were fine to examine the shape and size of the pattern using an electron microscope. In addition, the uniformity of the pattern of the sapphire substrate was evaluated using a surface reflectance measurement.

4A and 4B are SEM photographs of patterns of the sapphire substrates of Example 1 and Comparative Example 1, respectively. Referring to FIG. 4A, it can be seen that the shape of the pattern is more uniform and normal than in the case of FIG. 4B. Therefore, when the pattern having a resolution of 2㎛ according to the present invention, as shown in Figure 4a it was possible to obtain a uniform pattern of the normal form. On the other hand, in the case of Figure 4b, it shows a concave shape from the top of the pattern inside it can be seen that the pattern of the poor state was formed when forming a pattern of a relatively high resolution of 2㎛.

5A and 5B are photographs showing surface reflectivity measurements of patterns of the sapphire substrates of Example 1 and Comparative Example 1, respectively. As can be seen in Figures 5a and 5b, if the surface reflectivity of the pattern is measured, if the pattern size, height or shape is changed, the reflectivity is different due to the difference in the reflection angle can be confirmed the uniformity of the measurement pattern. In Example 1 of FIG. 5A, Standard Deviation (Std Dev) of the surface reflectivity is 4.279%, and in Comparative Example 1 of FIG. 5B, the standard deviation is 21.71%. Thus, it can be seen that the deviation of the pattern of the sapphire substrate prepared according to the present invention exhibits excellent uniformity from about 21% to about 4.3% according to the prior art.

Example II

A pattern was formed on the sapphire wafer according to the present invention and the prior art by using a photomask and a contact aligner having a dot pattern, and experiments were conducted to confirm an optimal exposure time ratio.

[Examples 2 to 10]

The total exposure time is 6 seconds and the standby time is 8 seconds, and the pattern is formed as in Example 1 except that the exposure time ratio which is the ratio of the first exposure time and the second exposure time is performed as shown in Table 1 below. A sapphire substrate was prepared and the surface reflectivity was measured to calculate its standard deviation.

[Comparative Examples 2 and 3]

A sapphire substrate with a pattern was prepared as in Example 1 except that the waiting time was 8 seconds, and the exposure time ratio, which is the ratio of the first exposure time and the second exposure time, was performed as shown in Table 1 below. Was measured to calculate the standard deviation. Comparative Examples 2 and 3 performed only one exposure step of primary exposure and secondary exposure, respectively.

Table 1 below shows the exposure time ratios and standard reflections of standard deviations of Examples 2 to 10 and Comparative Examples 2 and 3.

Exposure time ratio Standard Deviation(%) Comparative Example 2 10: 0 21.71 Example 2 9: 1 20.30 Example 3 8: 2 19.82 Example 4 7: 3 12.45 Example 5 6: 4 6.75 Example 6 5: 5 4.28 Example 7 4: 6 6.34 Example 8 3: 7 13.41 Example 9 2: 8 17.53 Example 10 1: 9 20.62 Comparative Example 3 0:10 21.71

6 is a graph showing the standard deviation of the pattern according to the exposure time ratio. As can be seen from Table 1 and FIG. 6, when the ratio of the primary exposure to the secondary exposure is 5: 5, the standard deviation of the sapphire substrate pattern is the lowest as 4.28%, and thus the exposure ratio is 5: 5. It can be seen that the pattern uniformity is the best.

Example III

A pattern was formed on the sapphire wafer according to the present invention and the prior art by using a photomask and a contact aligner having a dot pattern, and experiments were performed to confirm an optimum waiting time.

[Examples 11 to 22]

The total exposure time was 6 seconds, and the exposure time ratio, which is the ratio of the first exposure time and the second exposure time, was 5: 5, and the waiting time was performed as in Example 1 except that the following time was performed as shown in Table 1 below. A sapphire substrate on which a pattern was formed was prepared and its surface reflectivity was measured to calculate its standard deviation.

[Comparative Example 4]

The total exposure time was 6 seconds, except that the waiting time was performed as shown in Table 1 below, a patterned sapphire substrate was prepared as in Example 1, and the surface reflectivity was measured to calculate the standard deviation.

Table 2 below shows the standard deviations of the latency and surface reflectivity of Examples 11 to 22 and Comparative Example 4.

waiting time Standard Deviation(%) Comparative Example 4 0 21.71 Example 11 One 20.85 Example 12 2 17.32 Example 13 3 13.74 Example 14 4 10.54 Example 15 5 7.45 Example 16 6 4.51 Example 17 7 4.27 Example 18 8 4.28 Example 19 9 4.15 Example 20 10 4.24 Example 21 11 4.32 Example 22 12 4.18

7 is a graph showing the standard deviation of the pattern according to the waiting time. As can be seen in Table 2 and FIG. 7, in the case of Comparative Example 4, which is not divided exposure without the waiting time, the standard deviation is the highest, and the standard deviation is reduced in Examples 11 to 15 where the waiting time is 1 second to 5 seconds. Able to know. In particular, in the case of Examples 16 to 22 having a waiting time of 6 seconds or more, the numerical values were similar to each other at the lowest in the range of 4.51 to 4.15. Therefore, it can be seen that the waiting time is preferably 6 seconds or more in consideration of the pattern uniformity.

The invention is not to be limited by the foregoing embodiments and the accompanying drawings, but should be construed by the appended claims. In addition, it will be apparent to those skilled in the art that various forms of substitution, modification, and alteration are possible within the scope of the present invention without departing from the technical spirit of the present invention.

210 Sapphire Wafers
220 wafer chuck
230 vacuum pumps
231 vacuum seal
240 photomask

Claims (9)

Forming a photoresist layer on the upper surface of the sapphire wafer;
A photomask alignment step of aligning a photomask on the photoresist layer;
A first exposure step of performing first exposure;
Vacuum pumping the air after the first exposure step;
A second exposure step of performing a second exposure after the vacuum pumping step; And
And developing a second exposed sapphire wafer to form a pattern on a surface thereof.
The photomask alignment step, the pattern is formed on the surface characterized in that the contact-aligned (contact-align) method for manufacturing a sapphire substrate.
delete The method according to claim 1,
The standby time between the first exposure step and the second exposure step is a sapphire substrate manufacturing method with a pattern formed on the surface, characterized in that more than the sum of the time required for the first exposure step and the time required for the second exposure step. .
The method according to claim 3,
And a standby time between the first exposure step and the second exposure step is 6 seconds or more.
The method according to claim 1,
The sapphire substrate manufacturing method with a pattern formed on the surface, characterized in that the required time ratio of the first exposure step and the second exposure step is 6: 4 to 4: 6.
delete The method according to claim 1,
After the secondary exposure step, at least one additional exposure step further comprises a pattern formed on the surface sapphire substrate manufacturing method.
The method according to claim 1,
Sapphire substrate manufacturing method with a pattern formed on the surface, characterized in that the resolution of the pattern is 2㎛ or less.
The method according to claim 1,
The pattern is a sapphire substrate manufacturing method having a pattern formed on the surface, characterized in that the dot (dot) pattern.
KR1020110010658A 2011-02-07 2011-02-07 Method of manufacturing patterned sapphire substrate KR101063110B1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109426087A (en) * 2017-08-25 2019-03-05 上海微电子装备(集团)股份有限公司 For the exposure method and device of transparent substrate material

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005250465A (en) * 2004-02-04 2005-09-15 Toray Ind Inc Method for manufacturing display member, and display member

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005250465A (en) * 2004-02-04 2005-09-15 Toray Ind Inc Method for manufacturing display member, and display member

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109426087A (en) * 2017-08-25 2019-03-05 上海微电子装备(集团)股份有限公司 For the exposure method and device of transparent substrate material

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