CN117691011A - LED preparation method and LED - Google Patents
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- CN117691011A CN117691011A CN202410146785.7A CN202410146785A CN117691011A CN 117691011 A CN117691011 A CN 117691011A CN 202410146785 A CN202410146785 A CN 202410146785A CN 117691011 A CN117691011 A CN 117691011A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 6
- 239000004065 semiconductor Substances 0.000 claims abstract description 78
- 230000001105 regulatory effect Effects 0.000 claims abstract description 31
- 238000000034 method Methods 0.000 claims abstract description 30
- 239000000758 substrate Substances 0.000 claims description 43
- 238000004519 manufacturing process Methods 0.000 claims description 19
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 230000003287 optical effect Effects 0.000 abstract description 8
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- 238000010586 diagram Methods 0.000 description 13
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- 229910002601 GaN Inorganic materials 0.000 description 7
- 239000000463 material Substances 0.000 description 7
- 238000005530 etching Methods 0.000 description 6
- 238000000605 extraction Methods 0.000 description 5
- 229910052594 sapphire Inorganic materials 0.000 description 4
- 239000010980 sapphire Substances 0.000 description 4
- 229910002704 AlGaN Inorganic materials 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
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Abstract
The invention provides a preparation method of an LED and the LED. The method comprises the following steps: providing a light-emitting structure, wherein the light-emitting structure sequentially comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer from the upper surface; forming a step on the surface of the N-type semiconductor layer; forming a first insulating layer, wherein the first insulating layer covers the step side wall and/or part of the step surface; forming a regulating electrode on the surface of the first insulating layer; forming a second insulating layer on the side wall of the regulating electrode; forming a first electrode on the surface of the step, wherein the first electrode and the regulating electrode are isolated in an insulating way through a second insulating layer; a second electrode is formed in electrical connection with the P-type semiconductor layer. According to the invention, through adjusting and controlling the arrangement of the electrodes and combining the characteristic of capturing electrons by the defects of the side wall of the LED chip, the leakage current of the LED is avoided and the attenuation is reduced. And the regulating electrode plays an isolating role, so that optical crosstalk between the regulating electrode and the adjacent LEDs is avoided.
Description
Technical Field
The invention relates to the technical field of new generation information, in particular to a preparation method of an LED and the LED.
Background
The third generation semiconductor devices represented by gallium nitride-based LEDs have been developed in the fields of lighting, display, internet of things, 5G communication, and the like, and have been widely used.
However, leakage current and efficiency decay (i.e., a sharp drop in efficiency with increasing LED operating current) due to electron leakage (electron leakage) remain to be further addressed. LEDs are typically composed of an n-type layer, an active layer (MQW) and a p-type layer. The concentration of electrons in the n-type layer may be higher than the concentration of holes in the p-type layer, resulting in an LED that has a greater concentration of electrons injected into the active layer than the concentration of holes under normal operating conditions. Due to the imbalance of electron and hole concentrations, the excessive/redundant carrier electrons will cross (overflow) active layers to generate electron leakage (electron leakage) under the drive of the working voltage of the LED, and then become the continuous source of LED leakage to generate leakage current. And more particularly, as the working current of the LED increases, that is, the voltage between the first electrode and the second electrode increases, the leakage current caused by the increase further becomes serious, so that the efficiency of the LED is further seriously attenuated.
On the other hand, micro-LEDs can be regarded as pixels of ultra-high definition displays due to their Micro-size, so they have self-luminescence property, are known as subversion display technology, have wide market prospect in the field of next generation new display industry, and especially, with the rise of new display applications such as AR, VR and MR, challenges the miniaturization of the size of LED light sources, and require the advancement of the size of LED chips to Micro-size. However, it was found that as the pitch of the display pixels is reduced, the optical crosstalk between chips severely affects the display effect. Therefore, how to design the chip structure, it is important to solve the optical crosstalk while improving the internal/external quantum efficiency and the brightness of the Micro-LED.
Disclosure of Invention
The invention aims to solve the technical problem of providing a preparation method of an LED and the LED, which can solve the problem of optical crosstalk while improving the internal/external quantum efficiency and the brightness of a Micro-LED and simultaneously solve the problems of electric leakage and efficiency attenuation of the LED.
In order to solve the above problems, the present invention provides a method for manufacturing an LED, comprising the steps of: providing a light-emitting structure, wherein the light-emitting structure sequentially comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer from the upper surface; forming a step on the surface of the N-type semiconductor layer; forming a first insulating layer, wherein the first insulating layer covers the step side wall and/or part of the step surface; forming a regulating electrode on the surface of the first insulating layer; forming a second insulating layer on the side wall of the regulating electrode; forming a first electrode on the surface of the step, wherein the first electrode and the regulating electrode are isolated in an insulating way through a second insulating layer; a second electrode is formed in electrical connection with the P-type semiconductor layer.
In order to solve the above problems, the present invention provides an LED comprising: the light-emitting structure sequentially comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer from the upper surface; the surface of the N-type semiconductor layer is provided with a step, and the side wall of the step and/or part of the step surface covers the first insulating layer; the surface of the step is provided with a first electrode, the surface of the first insulating layer is provided with a regulating electrode, and the first electrode and the regulating electrode are isolated in an insulating way through a second insulating layer; the P-type semiconductor layer is electrically connected with the second electrode.
The invention solves the problems of electron leakage and generated leakage current of the LED luminous layer, namely, by adjusting and controlling the arrangement of the electrodes, forward voltage is applied to the N-type semiconductor layer, partial electrons are attracted to the side wall of the chip, and the defects of the side wall of the chip are utilized to capture electrons, so that the quantity of electrons injected into the luminous layer is reduced, the probability of the electrons crossing the luminous layer is further reduced, and the generated leakage current is avoided. In addition, the electron leakage is one of the sources of the efficiency attenuation of the LED (namely, the luminous efficiency of the LED is reduced along with the increase of the injection current), so that the technical scheme can effectively reduce the efficiency attenuation of the LED by reducing the electron leakage. In addition, by reducing the quantity of electrons injected into the light-emitting layer, the balance of the concentration of electrons and holes injected into the light-emitting layer is facilitated, the problems of leakage current and efficiency attenuation are solved, meanwhile, the radiation recombination efficiency in the active layer is improved, and the light-emitting efficiency is improved. And the regulating electrode plays an isolating role, so that optical crosstalk between the regulating electrode and the adjacent LEDs is avoided.
Drawings
FIG. 1 is a schematic diagram showing steps of an embodiment of the LED manufacturing method according to the present invention.
Fig. 2A to fig. 2G are process flow diagrams of an embodiment of the method for manufacturing an LED according to the present invention.
FIG. 3 is a schematic diagram showing steps of an embodiment of the LED manufacturing method according to the present invention.
Fig. 4A to fig. 4C are process flow diagrams of an embodiment of the method for manufacturing an LED according to the present invention.
FIG. 5 is a schematic diagram showing steps of an embodiment of the method for manufacturing an LED according to the present invention.
Fig. 6A to 6C are process flow diagrams of an embodiment of the method for manufacturing an LED according to the present invention.
Fig. 7 is a process flow diagram of an embodiment of a method for manufacturing an LED according to the present invention.
Detailed Description
The following describes in detail a method for manufacturing an LED and specific embodiments of the LED according to the present invention with reference to the accompanying drawings.
FIG. 1 is a schematic diagram showing steps of an embodiment of a method for manufacturing an LED according to the present invention, including: step S10, a light-emitting structure is provided, wherein the light-emitting structure sequentially comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer from the upper surface; step S11, forming a step on the surface of the N-type semiconductor layer; step S12, forming a first insulating layer, wherein the first insulating layer covers the step side wall and/or part of the step surface; step S13, forming a regulating electrode on the surface of the first insulating layer; step S14, forming a second insulating layer on the side wall of the regulating electrode; step S15, forming a first electrode on the surface of the step, wherein the first electrode and the regulating electrode are isolated in an insulating way through a second insulating layer; and S16, forming a second electrode electrically connected with the P-type semiconductor layer.
Fig. 2A to fig. 2G are process flow diagrams of an embodiment of the method for manufacturing an LED according to the present invention.
Referring to step S10, as shown in fig. 2A, a light emitting structure 21 is provided, which includes an N-type semiconductor layer 211, a light emitting layer 212, and a P-type semiconductor layer 213 in this order from the upper surface. In this embodiment, the light emitting structure 21 is disposed on a substrate 20, and the substrate 20 is a conductive substrate, such as Si or GaN. In other embodiments, if the substrate 20 is an insulating substrate, such as sapphire, electrode extraction connected to the P-type semiconductor layer 213 is also required. The material of the N-type semiconductor layer 211 and the P-type semiconductor layer 213 may be GaN, or any semiconductor material used for manufacturing an LED, such as GaAs, alN, znO; the light emitting layer 212 is a light emitting structure of an LED, such as, but not limited to, multiple quantum wells of InGaN/GaN, alInGaN/AlGaN, alGaInP/InGaP, mgZnO/ZnO, and the like.
Referring to step S11, as shown in fig. 2B, a step 22 is formed on the surface of the N-type semiconductor layer 211. In this step, a photoresist etching barrier layer or a hard mask layer (e.g., siO 2) may be formed at the bump by photolithography and etching processes, and then the exposed portion is partially etched by the etching processes, thereby forming a step 22 on the surface of the N-type semiconductor layer 211.
Referring to step S12, a first insulating layer 231 is formed, and the first insulating layer 231 covers the sidewall of the step 22 and/or a part of the surface of the step 22, as shown in fig. 2C. In this embodiment, as shown in fig. 2C, a first insulating layer 231 is selectively formed on both the sidewall of the step 22 and a portion of the surface of the step 22. In other embodiments, the first insulating layer 231 may be formed only on the sidewall of the step 22 or on a part of the surface of the step 22. The first insulating layer 231 is formed only on a part of the surface of the step 22 in order to reserve a space for the subsequent formation of the top electrode.
Referring to fig. 2D, referring to step S13, a modulating electrode 24 is formed on the surface of the first insulating layer 231. In this embodiment, a first insulating layer 231 is formed on the sidewall of the step 22 and a portion of the surface of the step 22, and the regulation electrode 24 is electrically isolated from the step 22, i.e., the N-type semiconductor layer 211, by the first insulating layer 231. In other embodiments, if the first insulating layer 231 is selectively formed only on the sidewall of the step 22 or on a part of the surface of the step 22, it should be ensured that the regulation electrode 24 and the step 22, i.e., the N-type semiconductor layer 211 can be electrically isolated by the first insulating layer 231.
Referring to step S14, as shown in fig. 2E, a second insulating layer 232 is formed on the sidewall of the modulating electrode 24. In this embodiment, the second insulating layer 232 is formed on the sidewall of the adjusting electrode 24 and is used for isolating from the first electrode formed later. The second insulating layer 232 may be formed in a shape that is semi-or fully-enclosed by the control electrode 24, and etched to form an electrical lead window.
Referring to fig. 2F, referring to step S15, a first electrode 251 is formed on the surface of the step 22, and the first electrode 251 is insulated from the modulating electrode 24 by a second insulating layer 232. The first electrode 251 is preferably a transparent electrode, and light of the light emitting layer 212 may be directly emitted from the upper surface.
Referring to step S16, as shown in fig. 2G, a second electrode 252 electrically connected to the P-type semiconductor layer 213 is formed. In this embodiment, the light emitting structure 21 is disposed on a substrate 20, and the substrate 20 is a conductive substrate, so that the second electrode 252 is directly formed on the back surface of the substrate, and the electrical connection with 213 can be formed. For the case where the substrate is an insulating substrate, reference may be made to the description of the embodiments that follow.
The LED structure obtained after the implementation of the above steps includes a light emitting structure 21, which includes an N-type semiconductor layer 211, a light emitting layer 212, and a P-type semiconductor layer 213 sequentially from the upper surface; the surface of the N-type semiconductor layer 211 is provided with a step 22, and the side wall of the step 22 and/or part of the surface of the step 22 is covered with a first insulating layer 231; the first electrode 251 is arranged on the step surface, the regulating electrode 24 is arranged on the surface of the first insulating layer 231, and the first electrode 251 is insulated and isolated from the regulating electrode 24 by the second insulating layer 252. The structure realizes the regulation of the transverse electric field inside the N-type semiconductor layer 211 through the regulating electrode 24. In the use process, by regulating the transverse electric field, that is, applying a forward voltage to the regulating electrode 24, majority carrier electrons in the N-type semiconductor layer 211 are attracted to the interface between the N-type semiconductor layer 211 and the first insulating layer 231, so that the majority carrier electrons are trapped by the sidewall defects at the interface due to etching of the step 22. The above process can lead to the reduction of the concentration of electrons injected into the light emitting layer 212, reduce the probability of crossing the light emitting layer 212, realize the balance of the concentration of electrons and holes injected into the light emitting layer 212, further increase the light emitting efficiency of the LED, and reduce the leakage current and efficiency attenuation caused by the leakage of electrons. And, the modulating electrode 24 plays a role in isolation, and avoids optical crosstalk between adjacent LEDs. Especially, micro-LEDs can effectively avoid optical crosstalk under the condition of very small point spacing in high PPI ultra-high definition display application. In the case that the adjusting electrode 24 is selected as a metal electrode, the light reflection function is simultaneously performed, so that the light extraction efficiency of the LED can be further improved, and the light crosstalk between adjacent chips is reduced.
Fig. 3 is a schematic step diagram of an embodiment of the method for manufacturing an LED according to the present invention, including: step S20, an epitaxial substrate is provided, wherein the surface of the epitaxial substrate sequentially comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer from the substrate side; step S21, bonding the structure with a support substrate by taking the P-type semiconductor layer as a bonding surface; step S22, removing the epitaxial substrate; step S23, forming a step on the surface of the N-type semiconductor layer; step S24, forming a first insulating layer, wherein the first insulating layer covers the step side wall and/or part of the step surface; step S25, forming a regulating electrode on the surface of the first insulating layer; step S26, forming a second insulating layer on the side wall of the regulating electrode; step S27, forming a first electrode on the surface of the step, wherein the first electrode and the regulating electrode are isolated in an insulating way through a second insulating layer; step S28, forming a second electrode electrically connected with the P-type semiconductor layer.
Fig. 4A to fig. 4C are process flow diagrams of an embodiment of the method for manufacturing an LED according to the present invention.
Referring to step S20, as shown in fig. 4A, an epitaxial substrate 40 is provided, the surface of which includes an N-type semiconductor layer 411, a light emitting layer 412, and a P-type semiconductor layer 413 in this order from the substrate side. In this embodiment, the light emitting structure 41 is disposed on the epitaxial substrate 40, and the epitaxial substrate 40 is any substrate that can be used as a semiconductor material for epitaxial growth, such as Si, sapphire, siC, alN, gaN, gaAs, or the like. The material of the N-type semiconductor layer 411 and the P-type semiconductor layer 413 may be GaN, or any semiconductor material used for manufacturing an LED, such as GaP, gaAs, alN, znO; the light emitting layer 412 is a light emitting structure of an LED, such as, but not limited to, multiple quantum wells of InGaN/GaN, alInGaN/AlGaN, alGaInP/InGaP, mgZnO/ZnO, and the like.
Referring to fig. 4B, referring to step S21, the above structure is bonded to a support substrate 46 by using the P-type semiconductor layer 413 as a bonding surface. The support substrate 46 is a conductive substrate such as Si or GaN, or the like. In other embodiments, if the support substrate 46 is an insulating substrate, such as sapphire, electrode extraction to the P-type semiconductor layer is also required.
Referring to step S22, the epitaxial substrate 40 is removed, as shown in fig. 4C. This step may remove epitaxial substrate 40 using grinding, chemical Mechanical Polishing (CMP), etching, laser lift-off, or any combination thereof. The removed structure includes a support substrate 46 and a light emitting structure 41 of a surface, which includes an N-type semiconductor layer 411, a light emitting layer 412, and a P-type semiconductor layer 413 in this order from the upper surface. The above structure is similar to the structure shown in fig. 2A. The subsequent steps can be performed by adopting the process described in the previous embodiment. The resulting LED is also similar to the previous embodiment.
Fig. 5 is a schematic step diagram of an embodiment of the method for manufacturing an LED according to the present invention, including: step S30, a light-emitting structure is provided, wherein the light-emitting structure sequentially comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer from the upper surface; step S31, forming a step on the surface of the N-type semiconductor layer; step S32, forming a first insulating layer, wherein the first insulating layer covers the step side wall and/or part of the step surface; step S33, forming a regulating electrode on the surface of the first insulating layer; step S34, forming a second insulating layer on the side wall of the regulating electrode; step S35, forming a first electrode on the surface of the step, wherein the first electrode and the regulating electrode are isolated in an insulating way through a second insulating layer; step S36, forming a groove exposing the P-type semiconductor layer in the light-emitting structure; step S37, covering a third insulating layer on the side wall of the groove; and S38, manufacturing a second electrode electrically connected with the P-type semiconductor layer in the groove.
Fig. 6A to 6C are process flow diagrams of an embodiment of the method for manufacturing an LED according to the present invention.
The above steps S30 to S35 are similar to those of the embodiment corresponding to fig. 1. In this embodiment, the light emitting structure is provided on an insulating substrate, such as sapphire, and thus electrode extraction connected to the P-type semiconductor layer is also required.
As shown in fig. 6A, referring to step S36, a trench 61 exposing the P-type semiconductor layer 213 is formed in the light emitting structure 21. This step is continued with the structure shown in fig. 2F, and the purpose of forming the trench 61 is to provide a channel for the second electrode to contact the P-type semiconductor layer 213, so that the bottom of the trench may reach the upper surface of the P-type semiconductor layer 213 or the P-type semiconductor layer 213 may be partially removed to increase the contact area.
As shown in fig. 6B, referring to step S37, a third insulating layer 633 is covered on the sidewall of the trench 61. The third insulating layer 633 functions to ensure electrical isolation of the subsequent second electrode from other structures than the P-type semiconductor layer 213.
Referring to step S38, a second electrode 652 electrically connected to the P-type semiconductor layer 213 is formed in the trench 61, as shown in fig. 6C. The second electrode 652 is preferably a metal electrode, which can perform a light reflection function while conducting electricity, and particularly reflect light of the side wall of the LED chip, so as to further improve the light extraction efficiency of the LED and reduce the light crosstalk between adjacent chips. Optical crosstalk between adjacent chips is particularly in high PPI Micro-LED ultra-high definition display applications. The adjacent chips may share the second electrode 652, or be individually controlled.
The LED structure obtained after the above steps are implemented, because the substrate is made of an insulating material, it is necessary to prepare a trench in the light emitting structure, and a second electrode electrically connected to the P-type semiconductor layer in the trench.
As shown in fig. 7, if the substrate 20 for carrying the light emitting structure is made of an opaque material (e.g., si), the above structure may be flip-chip bonded to the substrate 70 by flip-chip packaging, and the space is filled with an insulating protective material such as reflective white glue, and then the substrate 20 is removed by etching, laser lift-off, or CMP. The substrate 70 may be a common ceramic substrate or an integrated circuit chip provided with a logic control circuit.
The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.
Claims (9)
1. The preparation method of the LED is characterized by comprising the following steps of:
providing a light-emitting structure, wherein the light-emitting structure sequentially comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer from the upper surface;
forming a step on the surface of the N-type semiconductor layer;
forming a first insulating layer, wherein the first insulating layer covers the step side wall and/or part of the step surface;
forming a regulating electrode on the surface of the first insulating layer;
forming a second insulating layer on the side wall of the regulating electrode;
forming a first electrode on the surface of the step, wherein the first electrode and the regulating electrode are isolated in an insulating way through a second insulating layer;
a second electrode is formed in electrical connection with the P-type semiconductor layer.
2. The method of claim 1, wherein the light emitting structure is further formed by:
providing an epitaxial substrate, wherein the surface of the epitaxial substrate sequentially comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer from the epitaxial substrate side;
bonding the structure with a supporting substrate by taking the P-type semiconductor layer as a bonding surface;
and removing the epitaxial substrate.
3. The method of claim 1, wherein the light emitting structure is disposed on a surface of an insulating support substrate, and the step of forming the second electrode electrically connected to the P-type semiconductor layer further comprises:
forming a trench exposing the P-type semiconductor layer in the light emitting structure;
covering a third insulating layer on the side wall of the groove;
and manufacturing a second electrode which is electrically connected with the P-type semiconductor layer in the groove.
4. The method of claim 1, wherein the first electrode is a transparent electrode.
5. The method of claim 1, wherein the modulating electrode is a metal electrode.
6. An LED, comprising:
the light-emitting structure sequentially comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer from the upper surface;
the surface of the N-type semiconductor layer is provided with a step, and the side wall of the step and/or part of the step surface covers the first insulating layer;
the surface of the step is provided with a first electrode, the surface of the first insulating layer is provided with a regulating electrode, and the first electrode and the regulating electrode are isolated in an insulating way through a second insulating layer;
the P-type semiconductor layer is electrically connected with the second electrode.
7. The LED of claim 6, wherein the light emitting structure is disposed on a surface of an insulating support substrate, the LED further comprising:
a trench in the light emitting structure, the trench sidewall covering a third insulating layer;
and a second electrode electrically connected with the P-type semiconductor layer in the trench.
8. The LED of claim 6, wherein said first electrode is a transparent electrode.
9. The LED of claim 6, wherein said modulating electrode is a metal electrode.
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| CN202410146785.7A CN117691011A (en) | 2024-02-02 | 2024-02-02 | LED preparation method and LED |
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| CN202410146785.7A CN117691011A (en) | 2024-02-02 | 2024-02-02 | LED preparation method and LED |
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