KR20070055153A - Flip chip light-emitting device and method of manufacturing the same - Google Patents

Abstract

According to the present invention, a light emitting cell block including an n-type semiconductor layer, a p-type semiconductor layer formed on a portion of the n-type semiconductor layer, an ohmic electrode layer, and a reflective layer is formed on a substrate, and a sub-chip in which the light emitting cell block is flip chip bonded. It includes a mount substrate, the ohmic electrode layer provides a light emitting device and a method for manufacturing the same, characterized in that the surface in contact with the reflective layer has a predetermined surface roughness.

The light emitting device and the method of manufacturing the same of the present invention can improve the reliability by improving the adhesion by giving roughness to the ohmic electrode layer without forming a separate metal layer between the ohmic electrode layer and the reflective layer, and reducing the absorption of light of the light emitting device, thereby improving luminance. There is an advantage.

Light emitting element, LED, Flip chip, Ohmic electrode layer, Reflective layer, ITO, Luminous efficiency

Description

Flip chip light emitting device and method for manufacturing the same {Flip chip Light-emitting device and Method of manufacturing the same}

1 is a conceptual cross-sectional view for explaining a light emitting device having a conventional general flip chip structure.

2 is a conceptual cross-sectional view for explaining a light emitting device according to the present invention;

3A to 3G are cross-sectional views illustrating a manufacturing process of the first embodiment according to the present invention.

4A to 4H are cross-sectional views illustrating a manufacturing process of the second embodiment according to the present invention.

5 is a sectional view showing a third embodiment according to the present invention;

6 is a sectional view showing a fourth embodiment according to the present invention;

<Explanation of symbols for the main parts of the drawings>

20: substrate 30: n-type semiconductor layer

40: active layer 50: p-type semiconductor layer

60: ohmic electrode layer 70: reflective layer

80, 85: metal bump 90: wiring

100: light emitting cell block 200: sub-mount substrate

210: substrate 220, 225: bonding pad

230: bonding layer

The present invention relates to a light emitting device and a method of manufacturing the same, and more particularly, to a light emitting device for improving light efficiency and reliability in a light emitting device having a flip-chip structure and a manufacturing method thereof.

A light emitting diode (LED) refers to a device that makes a small number of carriers (electrons or holes) injected using a pn junction structure of a semiconductor and emits a predetermined light by recombination thereof. GaAs, AlGaAs, GaN Various colors may be realized by configuring a light emitting source by changing a compound semiconductor material such as InGaN, AlGaInP, or the like.

Such a light emitting device has a smaller power consumption and a longer life than conventional light bulbs or fluorescent lamps, can be installed in a narrow space, and exhibits strong vibration resistance. These light emitting devices are used as display devices and backlights, and because they have excellent characteristics in terms of power consumption reduction and durability, they are expected to be widely applied to general lighting, large LCD-TV backlights, automotive headlights, and general lighting. For this purpose, the light emission efficiency of the light emitting device needs to be improved, the heat dissipation problem must be solved, and the high brightness and high power of the light emitting device must be achieved.

In order to solve this problem, the interest in flip-chip type semiconductor light emitting devices is increasing day by day.

1 is a conceptual cross-sectional view illustrating a light emitting device having a conventional general flip chip structure, and includes an n-type semiconductor layer 5, an active layer 6, a p-type semiconductor layer 7, and a reflective layer on a predetermined substrate 1. A light emitting device is fabricated by flip chip bonding a light emitting cell having 8) sequentially formed on a separate submount substrate 2. At this time, the p-type semiconductor layer 7 and n of the light emitting cell are connected to the first and second electrodes 3 and 4 of the sub-mount substrate 2 through the p-type solder 9 and the n-type solder 10. The type semiconductor layer 5 is bonded.

Conventional flip-chip light emitting devices have higher heat dissipation efficiency than conventional light emitting devices, and have almost no light shielding, so that the light efficiency is increased by more than 50% compared to conventional light emitting devices.

The flip-chip light emitting device uses silver (Ag), silver oxide (Ag ₂ O), or aluminum having high reflection efficiency as a material of the reflective layer. In operation, there is a problem that the device life is shortened by causing a lot of heat generated by the high operating voltage. Accordingly, many studies have been conducted on ohmic contact layers having low specific contact resistance and high reflectance.

In Korean Patent Laid-Open Publication No. 2005-0044035, a substrate, an n-type cladding layer, an active layer, and a p-type cladding layer are sequentially stacked, and the ohmic contact layer formed of copper on the p-type cladding layer and the light is reflected on the ohmic contact layer. A flip chip nitride light emitting device having a reflective layer formed of a material is disclosed. In addition, in Korean Patent Laid-Open Publication No. 2005-0063293, a substrate, an n-type cladding layer, an active layer, a p-type cladding layer, a multi-ohmic contact layer, and a reflective layer are sequentially stacked, and the multi-ohmic contact layer is a unit of a modified metal layer / transparent conductive thin film layer. At least one group or more is repeatedly stacked, and the modified metal layer discloses a flip chip type nitride light emitting device having silver (Ag) as a main component and a method of manufacturing the same.

The light emitting device having such a flip chip structure generally has a problem that the operation of the light emitting device is still unstable because the adhesion between the ohmic contact layer and the reflective layer is weak. To this end, a separate thin metal layer may be formed therebetween, but the metal layer formed between the ohmic contact layer and the reflective layer to enhance adhesion may have a disadvantage in that light output is reduced by partially absorbing light emitted from the light emitting layer.

The present invention is to solve the above problems, by giving a roughness to the ohmic electrode layer to enhance the adhesive strength without forming a separate metal layer between the ohmic electrode layer and the reflective layer to improve the reliability, to reduce the absorption of light of the light emitting device to improve the brightness It is an object of the present invention to provide a light emitting device and a method of manufacturing the same.

According to an aspect of the present invention, there is provided a light emitting cell block including a n-type semiconductor layer, a p-type semiconductor layer formed on a portion of the n-type semiconductor layer, an ohmic electrode layer, and a reflective layer on a substrate. A cell block includes a sub-mount substrate on which flip chip bonding is performed, and the ohmic electrode layer has a predetermined surface roughness on a surface in contact with the reflective layer. The ohmic electrode layer may be indium tin oxide (ITO), ZnO, InO, SnO, or an alloy thereof, and the reflective layer may include silver (Ag) or aluminum (Al).

The light emitting device may include a plurality of light emitting cells spaced apart from each other on the substrate, and the n-type semiconductor layer of the one light emitting cell and the p-type semiconductor layer of the other one light emitting cell adjacent thereto are connected. The electronic device may further include a wiring for connecting the n-type semiconductor layer of the one light emitting cell and the p-type semiconductor layer of the other one light emitting cell adjacent thereto.

In another aspect, the present invention comprises the steps of sequentially forming an n-type semiconductor layer and a p-type semiconductor layer on the substrate, forming an ohmic electrode layer having a predetermined surface roughness on the p-type semiconductor layer, a reflective layer on the ohmic electrode layer Forming and flip chip bonding the substrate to a separate sub-mount substrate provides a method of manufacturing a light emitting device.

The forming of the ohmic electrode layer having the predetermined surface roughness may include forming an ohmic electrode layer on the p-type semiconductor layer and forming a predetermined surface roughness on the surface of the ohmic electrode layer through a surface treatment process using plasma. It may include a step. The surface treatment process using the plasma may be surface treated so that the thickness of the ohmic electrode layer is 10 to 1000 kPa, and it is preferable to maintain an inert atmosphere before forming the reflective film after the surface treatment process using the plasma.

The forming of the ohmic electrode layer having the predetermined surface roughness may include forming an ohmic electrode layer on the p-type semiconductor layer, and a single metal or alloy of Ni and Au on the ohmic electrode layer to a thickness of 200 μs or less. The step of applying, the step of heat-treating the layer of the single metal of Ni, Au or alloy thereof at 200 to 600 ℃ so that the ohmic electrode layer is partially exposed, removing 10 to 70% of the thickness of the ohmic electrode layer using a dry etching process And removing the remaining single layer of Ni, Au, or an alloy thereof.

In the method of manufacturing a light emitting device of the present invention, a plurality of light emitting cells are removed by removing a portion of the n-type semiconductor layer, the p-type semiconductor layer, the ohmic electrode layer, and the reflective layer before flip chip bonding the substrate to a separate sub-mount substrate. The method may further include forming an n-type semiconductor layer of one light emitting cell and a p-type semiconductor layer of another light emitting cell adjacent thereto through the forming and bridge wirings, wherein the bridge wiring is a bridge process or a step. A step cover process may connect the n-type semiconductor layer of one light emitting cell to the p-type semiconductor layer of another adjacent light emitting cell.

In addition, before the step of forming the n-type and p-type semiconductor layer on the substrate, it may further comprise the step of forming the irregularities on the substrate.

Hereinafter, a light emitting device and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the present embodiments are intended to complete the disclosure of the present invention and to those skilled in the art to fully understand the scope of the invention. It is provided to inform you.

2 is a conceptual cross-sectional view for describing a light emitting device according to the present invention.

Referring to the drawings, the light emitting device includes an n-type semiconductor layer 30, an active layer 40, a p-type semiconductor layer 50, an ohmic electrode layer 60 having a roughness on an upper surface, and a reflective layer sequentially formed on a substrate 20. And a sub-mount substrate 210 that is flip chip bonded to the substrate 20 using metal bumps 80 and 85.

The light emitting device of the present invention increases the surface area of the ohmic electrode layer 60 formed on the p-type semiconductor layer 50 by increasing the area of the interface and forming the reflective layer 70 thereon to form the ohmic electrode layer 60. And adhesion between the reflective layer 70 and the reflective layer 70. Thus, stable reliability of the light emitting device can be provided and the life of the device can be extended. In addition, by removing a separate metal layer formed to enhance the conventional adhesive strength it is possible to prevent the absorption of the light thereby to obtain an improved light efficiency.

3A to 3G are cross-sectional views illustrating a manufacturing process of the first embodiment according to the present invention. This embodiment provides a light emitting device that can be used for lighting and can be driven by an AC power source by reducing the size of the device by driving a plurality of light emitting cells in series, parallel or series-parallel at the wafer level, and driving at an appropriate voltage and current. do.

Referring to FIG. 3A, a light emitting layer, that is, an n-type semiconductor layer 30, an active layer 40, and a p-type semiconductor layer 50 are sequentially formed on the substrate 20.

The substrate 20 refers to a conventional wafer for manufacturing a light emitting device, and a transparent substrate such as Al ₂ O ₃ , ZnO, LiAl ₂ O _3, or the like is used. In this embodiment, a sapphire substrate is used. Before forming the n-type semiconductor layer 30 on the substrate 20, in order to reduce the lattice mismatch with the sapphire substrate, a buffer layer (not shown) containing AlN or GaN may be formed.

The n-type semiconductor layer 30 is a layer in which electrons are generated, preferably using gallium nitride (GaN) implanted with n-type impurities, and the material layer having various semiconductor properties is not limited thereto. In this embodiment, an n-type semiconductor layer 30 including n-type Al _x Ga _{1 - x} N (0 ≦ _x ≦ ₁ ) is formed. In addition, the p-type semiconductor layer 50 is a layer in which holes are generated, preferably using gallium nitride (GaN) implanted with p-type impurities, and not limited thereto, and may be a material layer having various semiconductor properties. In this embodiment, a p-type semiconductor layer 50 including p-type Al _x Ga _{1 - x} N (0 ≦ _x ≦ ₁ ) is formed. In addition, InGaN may be used as the semiconductor layer. The n-type semiconductor layer 30 and the p-type semiconductor layer 50 may be formed of a multilayer film.

The active layer 40 has a predetermined band gap and is a region in which quantum wells are made to recombine electrons and holes, and may include InGaN. According to the type of material constituting the active layer 40, the emission wavelength generated by the combination of electrons and holes is changed. Therefore, it is preferable to adjust the semiconductor material contained in the active layer 40 according to the target wavelength.

The above-described material layers may include metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma chemical vapor deposition (PCVD), molecular beam growth (MBE), and molecular beam growth (MBE). It is formed through various deposition and growth methods including beam epitaxy) and hydride vapor phase epitaxy (HVPE).

Thereafter, as shown in FIG. 3B, portions of the p-type semiconductor layer 50, the active layer 40, and the n-type semiconductor layer 30 are removed to separate the light emitting cells. To this end, a predetermined mask pattern is formed on the p-type semiconductor layer 50, and then the p-type semiconductor layer 50, the active layer 40, and the n-type semiconductor layer 30 in the region exposed by the mask pattern are removed. Etching electrically separates the plurality of light emitting cells.

A portion of the n-type semiconductor layer 30 is exposed by removing a portion of the p-type semiconductor layer 50 and the active layer 40 through a predetermined etching process. After the predetermined etching mask pattern is formed on the p-type semiconductor layer 50, a dry / wet etching process is performed to remove the p-type semiconductor layer 50 and the active layer 40 to form the n-type semiconductor layer 30. Expose

This is not limited to the above, and may be variously changed for convenience of process. That is, first to remove a portion of the p-type semiconductor layer 50 and the active layer 40 through a predetermined etching process to expose a portion of the n-type semiconductor layer 30, to form a plurality of light emitting cells on the substrate The predetermined region of the exposed n-type semiconductor layer 30 may be removed to expose the substrate 20.

As shown in FIG. 3C, the ohmic electrode layer 60 is formed on the p-type semiconductor layer 50 to reduce the contact resistance of the p-type semiconductor layer 50, and the adhesion between the reflective layers 70 formed on the upper surface is enhanced. To give a predetermined roughness to the surface of the ohmic electrode layer 60 to increase the area of the interface. To this end, an ohmic electrode layer 60 including indium tin oxide (ITO), ZnO, InO, SnO, or an alloy thereof is first formed on the p-type semiconductor layer 50. Alternatively, a single metal of Ni or Au or an alloy thereof may be used as the ohmic electrode layer 60. In this embodiment, a surface treatment process using a plasma is performed to give a roughness to the surface of the ohmic electrode layer 60. When a portion of the surface layer of the ohmic electrode layer 60 is removed using plasma, an ohmic electrode layer 60 having a roughness on the surface may be formed as shown in the drawing. At this time, the ohmic electrode layer 60 is removed to have a thickness of 10 to 1000 mW. After forming the ohmic electrode layer 60 having the surface roughness as described above, it is preferable that the inert atmosphere is maintained until the reflective layer 70 is formed or not exceeding 1 hour in the air. In addition, since the portion of the ohmic electrode layer 60 may be removed during the surface treatment process using the plasma, it is preferable to form the thickness about 1 to 50% thicker than the conventional one in order to compensate for this.

Of course, the present invention is not limited to the plasma treatment, and various methods may be used to give the surface roughness of the ohmic electrode layer 60 such as polishing and etching.

Referring to FIG. 3D, a reflective layer 70 for reflecting light is formed on the ohmic electrode layer 60 having the roughness. Silver (Ag), aluminum (Al), or the like is used as the material of the reflective layer 70.

As described above, when the reflective layer 70 is formed on the ohmic electrode layer 60 having a predetermined roughness, the area of the interface of the ohmic electrode layer 60 is increased, so that the adhesion between the ohmic electrode layer 60 and the reflective layer 70 is higher than in the related art. This is strengthened, which can provide stable reliability in operation of the light emitting element. In addition, since a separate metal layer is not required due to the strengthening of the adhesive force, it is possible to improve the luminous efficiency by preventing the absorption of light.

Thereafter, the n-type semiconductor layer 30 and the p-type semiconductor layer 50 between adjacent light emitting cells are connected through a predetermined wiring forming process. That is, the exposed n-type semiconductor layer 30 of one light emitting cell and the p-type semiconductor layer 50 of another light emitting cell adjacent thereto are connected to the wiring 90. In this case, the conductive wiring 90 electrically connecting the n-type semiconductor layer 30 and the p-type semiconductor layer 50 of adjacent light emitting cells through a bridge process or a step cover process. To form.

The bridge process described above is also referred to as an air bridge process, by using a photo process between the chips to be connected to each other by using a photo process to form a photoresist pattern, and then forming a material such as metal on the first thin film by a method such as vacuum deposition, Again, a conductive material containing gold is applied to a predetermined thickness by a method such as electroplating, electroplating or metal deposition. Subsequently, when the photoresist pattern is removed with a solution such as solvent, the lower portion of the conductive material is removed and only the bridge-shaped conductive material is formed in the space.

In addition, the step cover process uses a photo process between the chips to be connected to each other using a photo process, and develops, leaving only the portions to be connected to each other, and covering the other portions with a photoresist pattern, and on top of it by electroplating, electroless plating or metal deposition. Apply a conductive material containing a predetermined thickness. Subsequently, when the photoresist pattern is removed with a solution such as a solvent, all portions other than the conductive material are covered and only the covered portions remain to electrically connect the chips to be connected.

As the wiring 90, all materials having conductivity as well as metal may be used. For example, it can be formed from Au, Ag, Ni, Cr, Pt, Pd, Ti, W, Ta or an alloy thereof.

A plurality of metal bumps 80 and 85 are formed on the light emitting cell, and the p-type semiconductor layer 50 of the light emitting cell at one edge is formed on the n-type semiconductor layer 30 of the light emitting cell at the other edge. P-type metal bumps 80 and n-type metal bumps 85 are formed, respectively. As the p-type and n-type metal bumps 80 and 85, at least one of Pb, Sn, Au, Ge, Cu, Bi, Cd, Zn, Ag, Ni, and Ti may be used, and an alloy thereof may be used. have.

As a result, as illustrated in FIG. 3E, the light emitting cell block 100 is electrically connected to the plurality of light emitting cells by the conductive wiring 90. The manufacturing process of the light emitting cell block 100 is not limited to the above-described method, and various modifications and various material films may be further added. For example, as shown in FIG. 3A, an n-type semiconductor layer 30, an active layer 40, and a p-type semiconductor layer 50 are formed on a substrate 20, and an ohmic electrode layer 60 having a predetermined surface roughness on an upper surface thereof. ) And the reflective layer 70, an etching process for separating between the light emitting cells and exposing the n-type semiconductor layer 30 may be performed. In addition, a separate ohmic metal layer including Cr and Au may be further formed on the exposed n-type semiconductor layer 30 to smoothly supply current.

Next, a submount substrate 200 as shown in FIG. 3F is prepared. The sub-mount substrate 200 includes a substrate 210, a plurality of bonding layers 230 formed on the substrate, a p-type bonding pad 220 located at one edge, and an n-type bonding pad located at the other edge ( 225).

In this case, SiC, Si, Ge, SiGe, AlN, metal, or the like having excellent thermal conductivity is used as the substrate 210. In this embodiment, AlN having excellent thermal conductivity and insulating properties is used. Of course, the present invention is not limited thereto, and a metallic material having high thermal conductivity and excellent electrical conductivity may be used. The bonding layer 230, the n-type bonding pad 225, and the p-type bonding pad 220 use a metal having excellent electrical conductivity. It is formed by a screen printing method or a deposition process using a predetermined mask pattern.

Thereafter, the light emitting cell block 100 and the sub-mount substrate 200 are flip-chip bonded to manufacture a light emitting device.

Referring to FIG. 3G, the light emitting device of the present invention flip-bonds the light emitting cell block 100 and the sub-mount substrate 200, and is bonded by metal bumps 80 and 85 formed on the light emitting cell. The p-type metal bump 80 located at one edge of the light emitting cell block 100 is connected to the p-type bonding pad 220 of the sub-mount substrate 200, and the n-type metal bump 85 located at the other edge of the light emitting cell block 100 is connected to the sub type. It is connected to the n-type bonding pad 225 of the mount substrate 200. At this time, the bonding may be performed using heat or ultrasonic waves, or simultaneously using heat and ultrasonic waves. Bonding of the light emitting cell block 100 and the sub-mount substrate 200 is not limited to the above-described method, and may be flip chip bonded by various bonding methods.

The position of the metal bumps 80 and 85 is not limited thereto, and may be formed at another suitable position that does not affect flip chip bonding if it does not disturb the electrical flow of the bridge wiring 90. In addition, the metal bumps 80 and 85 may not be formed in the light emitting cells in the light emitting cell block 100, but the metal bumps 80 and 85 may be formed in the sub-mount substrate 200.

In this embodiment, since the electrical connection is already completed through the bridge wiring 90 before the flip chip bonding, it is necessary to form a separate pattern for the electrical connection during flip chip bonding, or to consider the correct alignment accordingly. There is an advantage to reduce the burden.

The manufacturing process of the light emitting device of the present invention described above is not limited thereto, and various processes and manufacturing methods may be changed or added according to the characteristics of the device and the convenience of the process. In the present embodiment, the n-type semiconductor layer 30 and the p-type semiconductor layer 50 of adjacent light-emitting cells are formed through a bridge process or a step cover process in manufacturing the light-emitting cell block 100. After forming the bridge wiring 90 electrically connecting the substrates, the light emitting device was manufactured by flip chip bonding the sub-mount substrate 200. However, the present invention is not limited thereto, and the n-type semiconductor layer 30 and the p-type semiconductor layer 50 of adjacent light emitting cells may be electrically connected to each other using metal bumps during flip chip bonding of the light emitting cell block 100 and the sub-mount substrate 200. It can also be connected.

As a result, a light emitting device in which a plurality of light emitting cells in a flip chip form is arranged on a sub-mount substrate may be manufactured. The light emitting cells may be variously connected in series, in parallel, or in parallel and according to a desired purpose.

The light emitting device of the present invention reduces the resistance of the p-type semiconductor layer through the ohmic electrode layer on the p-type semiconductor layer, and has stable power-voltage driving characteristics due to the enhanced adhesion between the ohmic electrode layer and the reflective layer having a predetermined surface roughness. The reliability of the light emitting device can be improved and the life of the device can be extended. In addition, by removing the separate metal layer formed in the related art, it is possible to prevent the absorption of light and to smoothly reflect the light, thereby obtaining improved light efficiency.

4A to 4H are cross-sectional views illustrating a manufacturing process of the second embodiment according to the present invention.

Referring to FIG. 4A, a plurality of light emitting cells in which an n-type semiconductor layer 30, an active layer 40, and a p-type semiconductor layer 50 are sequentially formed are formed on a substrate 20. This is the same as the case of the first embodiment described above, and overlapping description is omitted.

In this embodiment, the ohmic electrode layer 60 is partially etched to increase the area of the interface, thereby reducing the contact resistance of the p-type semiconductor layer 50 and enhancing the adhesion between the reflective layers 70 formed on the upper surface thereof. To this end, as shown in FIG. 4B, an ohmic electrode layer 60 including indium tin oxide (ITO), ZnO, InO, SnO, or an alloy thereof is formed on the p-type semiconductor layer 50. Further coating is applied to the ohmic electrode layer 60 using a single metal of Ni, Au, or an alloy thereof to a thickness of 200 μs or less, and then heat-treated at a temperature of 200 to 600 ° C., as shown in FIG. 4C. A single metal of Au or a layer of an alloy thereof is formed in the form of unevenness 65 to expose a portion of the ohmic electrode layer 60. Subsequently, by etching about 10 to 70% of the thickness of the ohmic electrode layer using a dry etching process, an ohmic electrode layer 60 having a plurality of grooves is formed as shown in FIG. 4D. That is, a portion of the ohmic electrode layer 60 partially exposed due to the unevenness 65 may be etched to obtain an ohmic electrode layer 60 having an increased interface area compared to the planar ohmic electrode layer 60. The ohmic electrode layer 60 may be etched at a faster speed due to the difference in etching speed between the ohmic electrode layer 60 and the unevenness 65. Although not shown, the unevenness 65 may be etched according to the degree of etching. Some may also be etched. Of course, the present invention is not limited to the above-described method, and various methods may be used to increase the area of the interface by forming a plurality of grooves or roughening the surface of the ohmic electrode layer 60.

Next, after removing the unevenness 65 using a chemical method, as shown in FIG. 4E, a reflective layer 70 for reflecting light is formed on the ohmic electrode layer 60 having the plurality of grooves. Silver (Ag), aluminum (Al), or the like is used as the material of the reflective layer 70.

As described above, when the reflective layer 70 is formed on the ohmic electrode layer 60 partially etched to form a plurality of grooves, the area of the interface of the ohmic electrode layer 60 is increased, so that the ohmic electrode layer 60 and the reflective layer 70 are compared with the related art. Adhesion between the two is enhanced, thereby providing a stable reliability during operation of the light emitting device. In addition, since a separate metal layer is not required due to the strengthening of the adhesive force, it is possible to improve the luminous efficiency by preventing the absorption of light.

Thereafter, the n-type semiconductor layer 30 and the p-type semiconductor layer 50 between adjacent light emitting cells are connected through a predetermined wiring forming process. That is, the exposed n-type semiconductor layer 30 of one light emitting cell and the p-type semiconductor layer 50 of another light emitting cell adjacent thereto are connected to the wiring 90. In this case, the conductive wiring 90 electrically connecting the n-type semiconductor layer 30 and the p-type semiconductor layer 50 of adjacent light emitting cells through a bridge process or a step cover process. To form.

Also, a plurality of metal bumps 80 and 85 are formed on the light emitting cell, and the n-type light emitting cell is positioned at the other edge of the light emitting cell at the edge of the light emitting cell block 100. The p-type metal bumps 80 and the n-type metal bumps 85 are formed on the type semiconductor layer 30, respectively.

As a result, as shown in FIG. 4F, the light emitting cell block 100 is electrically connected to the plurality of light emitting cells by the conductive wiring 90.

Next, as shown in FIG. 4G, a sub-mount substrate 200 including a plurality of bonding layers 230 and p-type and n-type bonding pads 220 and 225 is provided on the substrate 210, and described above. The light emitting device is manufactured by flip chip bonding the light emitting cell block 100 and the sub-mount substrate 200.

Referring to FIG. 4H, the light emitting device of the present invention flip-bonds the light emitting cell block 100 and the sub-mount substrate 200, and is bonded by metal bumps 80 and 85 formed on the light emitting cell.

As a result, a light emitting device in which a plurality of light emitting cells in a flip chip form is arranged on a sub-mount substrate may be manufactured. The light emitting cells may be variously connected in series, in parallel, or in parallel and according to a desired purpose.

The light emitting device of the present invention reduces the resistance of the p-type semiconductor layer 50 through the ohmic electrode layer 60 on the p-type semiconductor layer 50 and partially etches the ohmic electrode layer 60 and the reflective layer to increase the area of the interface. Due to the enhanced adhesion between the 70, it has stable power-voltage driving characteristics, can improve the reliability of the light emitting device, and can extend the life of the device. In addition, by removing the separate metal layer formed in the related art, it is possible to prevent the absorption of light and to smoothly reflect the light, thereby obtaining improved light efficiency.

The light emitting device of the present invention is not limited to the above description and various embodiments are possible. As in the third embodiment of FIG. 5, individual light emitting cells, which are not connected to each other at the wafer level, are flip-chip bonded to a sub-mount substrate to form a light emitting device. That is, a single light emitting cell is formed on the substrate 20 to form the ohmic electrode layer 60 and the reflective layer 70 having an increased area of the interface through the same manufacturing process as in the second embodiment. By flip chip bonding, a light emitting device having a flip chip structure having improved reliability and improved light efficiency can be manufactured.

In addition, referring to the fourth embodiment illustrated in FIG. 6, a light emitting device includes a light emitting cell block in which a plurality of light emitting cells are arranged on a substrate 25 having irregularities formed thereon, and a sub-mount substrate in which the light emitting cell blocks are flip chip bonded. It includes.

The present embodiment has a merit that higher luminance and luminous efficiency can be obtained because photons that have been reflected on a flat surface of the prior art are not reflected to various angles of the surface and are emitted to the outside due to irregularities formed on the substrate.

The third and fourth embodiments described above are not limited as shown and may be applied to other embodiments. For example, in the light emitting device of the present invention including the ohmic electrode layer in which a plurality of grooves are formed on the light emitting layer and the interface area is increased, as in the second embodiment shown in FIG. 4G, the light emitting layer is grown on the substrate. By forming irregularities, the luminous efficiency can be improved. In addition, the above-described embodiments may be applied in combination with each other.

As mentioned above, although this invention was demonstrated in detail using the preferable Example, the scope of the present invention is not limited to a specific Example and should be interpreted by the attached Claim. In addition, those skilled in the art should understand that many modifications and variations are possible without departing from the scope of the present invention.

The light emitting device and the method of manufacturing the same according to the present invention can reduce the resistance of the p-type semiconductor layer through the ohmic electrode layer on the p-type semiconductor layer, and give a roughness to the surface of the ohmic electrode layer to increase the surface area of the reflective layer and the upper surface thereof. Enhances the adhesion of the. Therefore, there is an effect that can provide a stable reliability of the light emitting device, and improve the life of the light emitting device.

In addition, it is possible to obtain the improved light efficiency by preventing the absorption of light due to the conventional separate metal layer and smoothly reflecting the light.

Claims (13)

A light emitting cell block on which a light emitting cell including an n-type semiconductor layer, a p-type semiconductor layer formed on a portion of the n-type semiconductor layer, an ohmic electrode layer, and a reflective layer is formed; And The light emitting cell block includes a sub-mount substrate on which flip chip bonding is performed, And the ohmic electrode layer has a predetermined surface roughness on a surface in contact with the reflective layer. The method according to claim 1, The ohmic electrode layer is light emitting device, characterized in that the indium tin oxide (ITO), ZnO, InO, SnO or an alloy thereof. The method according to claim 1 or 2, The reflective layer comprises a light emitting element (Ag) or aluminum (Al). The method according to claim 1 or 2, And a plurality of light emitting cells spaced apart from each other on the substrate, and the n-type semiconductor layer of the one light emitting cell and the p-type semiconductor layer of the other one light emitting cell adjacent thereto are connected to each other. The method according to claim 4, And a wire for connecting the n-type semiconductor layer of the one light emitting cell and the p-type semiconductor layer of the other one light emitting cell adjacent thereto. Sequentially forming an n-type semiconductor layer and a p-type semiconductor layer on the substrate; Forming an ohmic electrode layer having a predetermined surface roughness on the p-type semiconductor layer; Forming a reflective layer on the ohmic electrode layer; And Flip chip bonding the substrate to a separate sub-mount substrate. The method according to claim 6, Forming the ohmic electrode layer having the predetermined surface roughness, Forming an ohmic electrode layer on the p-type semiconductor layer; And forming a predetermined surface roughness on the surface of the ohmic electrode layer through a surface treatment process using plasma. The method according to claim 7, The surface treatment process using the plasma is a method of manufacturing a light emitting device, characterized in that the surface treatment so that the thickness of the ohmic electrode layer is 10 to 1000Å. The method according to claim 7, The method of manufacturing a light emitting device, characterized in that to maintain an inert atmosphere after the surface treatment process using the plasma and before forming the reflective layer. The method according to claim 6, Forming the ohmic electrode layer having the predetermined surface roughness, Forming an ohmic electrode layer on the p-type semiconductor layer; Coating a single metal of Ni or Au or an alloy thereof on the ohmic electrode layer to a thickness of 200 kPa or less; Heat-treating the layer of the single metal of Ni, Au or an alloy thereof at 200 to 600 ° C. to partially expose the ohmic electrode layer; Removing 10 to 70% of the thickness of the ohmic electrode layer using a dry etching process; And And removing the remaining single layer of Ni, Au, or an alloy thereof. The method according to any one of claims 6 to 10, Prior to flip chip bonding the substrate to a separate sub-mount substrate Removing a portion of the n-type semiconductor layer, the p-type semiconductor layer, the ohmic electrode layer, and the reflective layer to form a plurality of light emitting cells; And And connecting the n-type semiconductor layer of one light emitting cell and the p-type semiconductor layer of another light emitting cell adjacent thereto through bridge wirings. The method according to claim 11, The bridge wiring is a method of manufacturing a light emitting device comprising connecting a n-type semiconductor layer of one light emitting cell and a p-type semiconductor layer of another adjacent light emitting cell through a bridge process or a step cover process. . The method according to any one of claims 6 to 10, Before forming the n-type and p-type semiconductor layer on the substrate, The method of manufacturing a light emitting device, characterized in that it further comprises the step of forming the irregularities on the substrate.

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