CN117554787A - Test circuit and test method - Google Patents

Test circuit and test method Download PDF

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Publication number
CN117554787A
CN117554787A CN202410027312.5A CN202410027312A CN117554787A CN 117554787 A CN117554787 A CN 117554787A CN 202410027312 A CN202410027312 A CN 202410027312A CN 117554787 A CN117554787 A CN 117554787A
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CN
China
Prior art keywords
signal
power device
output
test
unit
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CN202410027312.5A
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Chinese (zh)
Inventor
杨强强
肖岩
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Shenzhen Lemon Photon Technology Co ltd
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Shenzhen Lemon Photon Technology Co ltd
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Priority to CN202410027312.5A priority Critical patent/CN117554787A/en
Publication of CN117554787A publication Critical patent/CN117554787A/en
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/2856—Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31727—Clock circuits aspects, e.g. test clock circuit details, timing aspects for signal generation, circuits for testing clocks

Abstract

The embodiment of the specification provides a test circuit and a test method, wherein the test circuit comprises: the control unit is configured to output a corresponding test mode selection signal and a reference frequency signal according to an input configuration instruction; and configured to determine a state of the power device based on the detection signal; the frequency adjusting unit is configured to adjust the reference frequency signal according to a preset reference frequency signal and output a target clock signal with the same reference frequency value as the reference frequency signal; the mode selection unit is configured to output corresponding electric parameters according to the test mode selection signal; the switching unit is configured to conduct a path between the mode selection unit and the power device when the target clock signal is acquired; the detection unit is configured to acquire an actual working parameter of the power device under the electrical parameter and output a corresponding detection signal. By adopting the technical scheme, the electric parameters input to the power device can be adaptively changed.

Description

Test circuit and test method
Technical Field
The embodiment of the specification relates to the technical field of testing, in particular to a testing circuit and a testing method.
Background
Burn-in testing is an important technology in electronic engineering, and aims to evaluate the stability and reliability of performance of power devices such as chips in long-time use. Along with the continuous development of technology, the functions of the power device are more and more complex, and the requirement for long-time stable operation of the power device is also higher and higher. Therefore, burn-in testing of power devices is an important means of ensuring product quality and reliability.
When performing burn-in testing, it is necessary to change the electrical parameters input to the power device to obtain the electrical performance of the power device under different electrical parameters.
In this context, how to provide a technical solution to change the electrical parameters input to the power device is a technical problem that needs to be solved by those skilled in the art.
Disclosure of Invention
In view of this, the embodiments of the present disclosure provide a test circuit and a test method capable of adaptively changing an electrical parameter input to a power device.
In a first aspect, embodiments of the present specification provide a test circuit including a control unit, a frequency adjustment unit, a mode selection unit, a switching unit, and a detection unit:
the control unit is configured to output a corresponding test mode selection signal to the mode selection unit and corresponding mapping data to the frequency adjustment unit according to an input configuration instruction; and configured to determine a state of the power device based on the detection signal;
The frequency adjusting unit is internally provided with a register for storing clock signal parameter values, and is configured to refresh the clock signal parameter values in the register according to the mapping data, read the refreshed clock signal parameter values in the register as a target clock signal and output the target clock signal to the switching unit;
the mode selection unit is configured to output corresponding electric parameters to the switch unit according to the test mode selection signal;
the switching unit is configured to conduct a passage between the mode selection unit and the power device when the target clock signal is acquired, so that the power device works on the electric parameter;
the detection unit is configured to acquire an actual working parameter of the power device under the electrical parameter, and compare the actual working parameter with the reference electrical parameter provided by the mode selection unit so as to output a corresponding detection signal to the control unit.
In the above embodiment, the frequency adjusting unit may use the refreshed clock signal parameter value in the register as the target clock signal to conduct the path between the mode selecting unit and the power device, so that the mode selecting unit may provide the corresponding electrical parameter for the power device according to the test mode selecting signal provided by the control unit, so that the power device works on the electrical parameter, the detecting unit may obtain the actual working parameter of the power device under the electrical parameter, and compare the actual working parameter with the reference electrical parameter provided by the mode selecting unit, so as to output the corresponding detection signal to the control unit, so that the control unit may determine the state of the power device according to the detection signal. By adopting the mode, the mode selection unit can output corresponding electric parameters to the power device in response to the test mode selection signal related to the configuration instruction, and can adaptively change the electric parameters input to the power device, so that the power device is in different test modes to acquire the performance of the power device under different electric parameters.
Optionally, the test mode selection signal comprises a voltage test signal and/or a current test signal;
the mode selection unit is configured to generate a first adjusting signal for adjusting the actual voltage value according to the obtained actual voltage value and the set voltage value at two ends of the power device when the test mode selection signal is determined to comprise a voltage test signal; and/or generating a second adjusting signal for adjusting the actual current value according to the obtained actual current value and the set current value at the two ends of the power device when the test mode selection signal is determined to comprise a current test signal;
wherein the set voltage value is determined by the voltage test signal; the set current value is determined by the current test signal.
In the above embodiment, by generating the first adjustment signal for adjusting the actual voltage value, the voltage value output to the power device can be adjusted so that the power device can operate at the set voltage value; and/or, through generating the second regulating signal used for regulating the actual current value, the current value output to the power device can be regulated, so that the power device can work at the set current value, the error of detection parameters caused by voltage and/or current fluctuation is reduced, and the aging test performance of the power device can be evaluated more accurately.
Optionally, the mode selection unit includes: the system comprises a mode regulation module, a plurality of first type gating channels, a plurality of second type gating channels and a sampling module, wherein:
the mode regulation and control module is respectively coupled with the first type gating channels, the second type gating channels and the output end of the sampling module and is configured to generate the first regulation signal according to the obtained actual voltage value and the set voltage value, wherein the actual voltage value is generated when any one of the first type gating channels is gated; and/or configured to generate the second adjustment signal from the acquisition signal output by the sampling module;
a plurality of first type gating channels configured to vary actual voltage values output to the power device and the mode regulation module by gating at least two of the first type gating channels according to the first regulation signal;
the sampling module is respectively coupled with the output end of the mode regulation module and the power device at a first end, coupled with at least one second type gating channel at a second end, and configured to acquire an actual current value output to the power device, compare the actual current value with a set current value, and output a corresponding acquisition signal to the mode regulation module, wherein the actual current value is generated when any one second type gating channel is gated;
And a plurality of second type gating channels configured to change an actual current value output to the power device by gating at least two of the second type gating channels according to the second adjustment signal.
In the above embodiment, by setting a plurality of first type gating channels, any two of the first type gating channels can be selectively turned on, and the output actual voltage value is changed, so that the mode selection unit can generate a first adjusting signal for adjusting the actual voltage value according to the obtained actual voltage value and the obtained set voltage value at two ends of the power device, thereby enabling the power device to work at the set voltage value; through setting up sampling module, can gather the actual current value of output to power device to output corresponding collection signal to mode regulation and control module, thereby mode regulation and control module can be according to the collection signal of sampling module output, generate second regulation signal is with gating wherein two at least second type gating channel changes the actual current value of output to power device, makes power device can work in the settlement voltage value, and then according to the parameter value of power device under settlement voltage value and/or settlement current value, the ageing test performance of evaluation power device that can be more accurate.
Optionally, the first type gating channel includes: the first gating switches are connected with the first resistors in a one-to-one correspondence manner, wherein a first end of a part of the first gating switches is connected with the mode regulation and control module, a second end of the first gating switches is connected with a first end of the first resistors, and a second end of the first resistors is grounded; the first end of the first gating switch is connected with the mode regulation module, the second end of the first gating switch is connected with the first end of the first resistor, and the second end of the first resistor is connected with the mode regulation module;
wherein, there are at least two first resistance's resistance value different in a plurality of first resistance.
In the above embodiment, by enabling the first type gating channel to include a plurality of first gating switches and a plurality of first resistors, and having at least two first resistors among the plurality of first resistors with different resistance values, the output voltage value can be changed by selecting to access different first resistors, so that the control logic can be simplified and the control circuit is applicable to various application scenarios.
Optionally, the second type gating channel includes: the second gating switches are connected with the second resistors in a one-to-one correspondence manner, wherein a part of first ends of the second gating switches are connected with the sampling module, the second ends of the second gating switches are connected with the first ends of the second resistors, and the second ends of the second resistors are grounded; the second end of the second resistor with a part is connected with the mode regulation module;
Wherein, there are at least two second resistances in the multiple second resistances that have different resistance values.
In the above embodiment, by making the second type gating channel include a plurality of second gating switches and a plurality of second resistors, and the resistances of at least two second resistors in the plurality of second resistors are different, the output current value can be changed by selectively accessing different second resistors, so that the control logic structure can be simplified and multiple application scenarios can be applied.
Optionally, the sampling module includes: an operational amplifier and a sampling resistor, wherein:
the first end of the operational amplifier is respectively connected with the first end of the sampling resistor and the output end of the mode regulation module, and the second end of the operational amplifier is connected with the second type gating channel; the output of the operational amplifier is respectively connected with the second type gating channel and the feedback end of the mode regulation and control module;
the second end of the sampling resistor is grounded.
In the above embodiment, when the actual current value and the set current value are determined to be inconsistent, the comparison is performed by the operational amplifier, so that the mode regulation module generates the second regulation signal for regulating the output current, the power device can work at the set current, and further, the accurate aging test result can be obtained.
Optionally, the test circuit further comprises: the voltage reduction unit is respectively coupled with the output end of the mode regulation module and the sampling module and is configured to regulate the output voltage value of the output end of the mode regulation module so as to obtain the actual voltage value.
In the above embodiment, by providing the step-down unit, it is possible to provide the power device with appropriate electrical parameters, so that the power device can operate at a safe voltage.
Optionally, the control unit is configured to determine that the power device is in a normal working state when determining that a level corresponding to the detection signal is a first level; and when the level corresponding to the detection signal is determined to be a second level, determining that the power device is in an abnormal state, wherein the first level and the second level are different.
In the above embodiment, the working state of the power device can be intuitively obtained based on the level corresponding to the detection signal, and further the aging performance of the power device can be determined according to the working state of the power device.
Optionally, the test circuit further comprises: and a pulse width adjusting unit, disposed between the frequency adjusting unit and the switching unit, configured to adjust a pulse width of a target clock signal output to the switching unit.
In the above embodiment, by adjusting the pulse width of the target clock signal output to the switching unit, the on time of the switching unit and the on time can be controlled, so that different test environments can be provided for the power device.
Optionally, the pulse width adjustment unit includes: the first delay branch is configured to delay the target clock signal to obtain a first delay signal;
the second delay branch is configured to delay the target clock signal to obtain a second delay signal;
the logic processing module is coupled with the first delay branch circuit and the second delay branch circuit respectively and is configured to generate a conduction signal for conducting the switch unit according to the first delay signal and the second delay signal;
the delay time lengths of the first delay branch and the second delay branch are different.
In the above embodiment, delay time lengths of the first delay branch and the second delay branch may be different, by setting delay time lengths of the first delay branch and the second delay branch, a first delay signal and a second delay signal with different delay time lengths may be obtained, and further, a logic processing module may obtain the first delay signal and the second delay signal at different times, and by performing logic processing on the first delay signal and the second delay signal, a logic processing signal with a set pulse width may be output, so that a switch unit may be turned on, and a test condition of a power device may be controlled.
In a second aspect, embodiments of the present disclosure further provide a testing method applied to the testing circuit described in any one of the foregoing examples, including:
generating a corresponding test mode selection signal and corresponding mapping data according to an input adjustment instruction;
refreshing the clock signal parameter value in the register according to the mapping data, and taking the refreshed clock signal parameter value as a target clock signal;
generating corresponding electrical parameters according to the test mode selection signals;
based on the target clock signal, conducting a passage between the test circuit and the power device so that the power device works at the electric parameter;
acquiring an actual working parameter of the power device under the electrical parameter, and comparing the actual working parameter with a reference electrical parameter to generate a corresponding detection signal;
and determining the state of the power device according to the detection signal.
In the above embodiment, according to the mapping data, the clock signal parameter value in the register may be refreshed, and the refreshed clock signal parameter value is used as the target clock signal to conduct the path between the test circuit and the power device, and according to the test mode selection signal, the corresponding electrical parameter may be provided for the power device, so that the power device works on the electrical parameter, by acquiring the actual working parameter of the power device under the electrical parameter, and comparing the actual working parameter with the reference electrical parameter provided by the mode selection unit, the corresponding detection signal may be generated, so that the state of the power device may be determined according to the detection signal. By adopting the mode, the corresponding electric parameters can be output to the power device in response to the test mode selection signals related to the configuration instructions, and the electric parameters input to the power device are adaptively changed, so that the power device is in different test modes, and the performance of the power device under different electric parameters is obtained.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present application, and that other drawings may be obtained according to the provided drawings without inventive effort to a person skilled in the art.
FIG. 1 is a schematic diagram of a test circuit according to an embodiment of the present disclosure;
fig. 2 is a schematic diagram showing a specific structure of a mode selecting unit according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of a detection unit according to an embodiment of the present disclosure;
fig. 4 is a schematic diagram of a specific structure of a pwm unit in the example of the present disclosure;
FIG. 5 is a flow chart of a test method in the embodiment of the present disclosure.
Detailed Description
As described in the background art, in performing the burn-in test, it is necessary to change the electrical parameters input to the power device to obtain the electrical performance of the power device under different electrical parameters.
In order to solve the above technical problems, the embodiments of the present disclosure provide a test solution, according to mapping data corresponding to a configuration instruction, a parameter value of a clock signal refreshed in a register is used as a target clock signal to conduct a path between a test circuit and a power device, and according to a test mode selection signal, a corresponding electrical parameter may be provided for the power device, so that the power device works on the electrical parameter, and by obtaining an actual working parameter of the power device under the electrical parameter, and comparing the actual working parameter with a reference electrical parameter, a corresponding detection signal may be generated, so that a state of the power device may be determined according to the actual working parameter and a set working parameter included in the detection signal.
By adopting the mode, the corresponding electric parameters can be output to the power device in response to the test mode selection signals related to the configuration instructions, and the electric parameters input to the power device are adaptively changed, so that the power device is in different test modes, and the performance of the power device under different electric parameters is obtained.
In order that those skilled in the art may better understand the operation mechanism, principle and advantages of the adjustable duty cycle circuit according to the embodiments of the present disclosure, a detailed description will be made with reference to specific embodiments with reference to the accompanying drawings.
Referring to a schematic structural diagram of a test circuit in the embodiment of the present specification shown in fig. 1, in some embodiments of the present specification, a test circuit 100 may include: a control unit 110, a frequency adjustment unit 120, a mode selection unit 130, a switching unit 140, and a detection unit 150, wherein:
the control unit 110 is configured to output a corresponding test mode selection signal to the mode selection unit 130 and corresponding mapping data to the frequency adjustment unit 120 according to an input configuration instruction; and configured to determine a state of the power device based on the detection signal;
the frequency adjusting unit 120, which internally sets a register storing a clock signal parameter value, is configured to refresh the clock signal parameter value in the register according to the mapping data, and reads the refreshed clock signal parameter value in the register as a target clock signal, and outputs to the switching unit 140;
The mode selection unit 130 is configured to output a corresponding electrical parameter to the switching unit 140 according to the test mode selection signal;
the switching unit 140 is configured to conduct a path between the mode selecting unit 130 and the power device when the target clock signal is acquired, so that the power device operates on the electrical parameter;
the detecting unit 150 is configured to obtain an actual operation parameter of the power device under the electrical parameter, and compare the actual operation parameter with the reference electrical parameter provided by the mode selecting unit 130, so as to output a corresponding detection signal to the control unit 110.
In connection with fig. 1, in response to an input configuration instruction (which may be manually input through a screen or may be acquired from another unit), the control unit 110 may generate a corresponding test mode selection signal and mapping data, and output the test mode selection signal to the mode selection unit 130, and the mapping data to the frequency adjustment unit 120.
The control unit 110 may have a built-in storage module, where the storage module stores a configuration file, where the configuration file may include mapping data corresponding to the target clock signal, and when the control unit 110 obtains a configuration instruction, the control unit may obtain the mapping data.
In one aspect, the frequency adjustment unit 120 may refresh the clock signal parameter value in the register according to the mapping data, and output the refreshed clock signal parameter value as the target clock signal to the switching unit 140.
On the other hand, the mode selection unit 130 may output a corresponding electrical parameter to the switching unit 140 according to the test mode selection signal, so that the path between the mode selection unit 130 and the power device may be conducted under the action of the target clock signal, and the mode selection unit 130 may provide the power device with the electrical parameter corresponding to the test mode selection signal, where the power device may operate under the electrical parameter (for example, the power device is a laser, and the laser may emit light under the electrical parameter).
In the power device operation process, the detection unit 150 may obtain an actual operation parameter of the power device under the electrical parameter, and compare the actual operation parameter with the reference electrical parameter provided by the mode selection unit 130, so as to output a corresponding detection signal to the control unit 110.
The control unit 110 may determine the state of the power device according to the detection signal, for example, the power device is in a normal working state or an abnormal state under the current electrical parameter.
With the test circuit in the above example, the mode selection unit may output the corresponding electrical parameter to the power device by responding to the test mode selection signal related to the configuration instruction, and adaptively change the electrical parameter input to the power device, so that the power device is in different test modes, so as to obtain the performance of the power device under different electrical parameters.
For better understanding and implementation by those skilled in the art, some examples of implementations of the various elements of the test circuit of the present specification are shown below.
In some examples, the control unit may be implemented by a processor, which may include a central processing unit CPU, a field programmable gate array FPGA, or the like, having logic processing capabilities.
In some examples, the frequency adjustment unit may be implemented by a phase-locked loop, which may take the structure of the existing scheme, or may take other types of phase-locked loops.
In some embodiments, the frequency adjustment unit may generate the target clock signal in at least one of:
1) The frequency adjustment unit may adjust a duty ratio of the reference frequency signal according to a preset reference frequency signal in a case of fixing a frequency of the reference frequency signal to generate the target clock signal.
In some examples, the duty cycle of the reference frequency signal may be adjusted to approach the target duty cycle first, and then adjusted by a preset first step size (which may be considered a smaller duty cycle adjustment value) until the duty cycle of the target clock signal is the target duty cycle.
2) The frequency adjustment unit may adjust the frequency of the reference frequency signal according to a preset reference frequency signal in a case of fixing the duty ratio of the reference frequency signal to generate the target clock signal.
In some examples, the frequency of the initial clock signal may be adjusted to approach the target frequency, and then adjusted according to a preset second step size (which may be considered as a smaller frequency adjustment value) until the frequency of the target clock signal is the target frequency.
It should be noted that the above two ways of generating the target clock signal are only exemplary. In some other embodiments, the duty cycle and frequency of the reference frequency signal may also be adjusted simultaneously to obtain the target clock signal.
In some embodiments, to improve the testing accuracy of the power device burn-in test, it is desirable to subject the power device to different electrical parameters, where different may refer to different types of electrical parameters (e.g., current parameters and voltage parameters), and different values of electrical parameters (different voltage values, and/or different current values). Thus, during actual testing, it is necessary to provide different electrical parameters for the power device.
Based on this, in some examples of the present specification, the test mode selection signal may include a voltage test signal and/or a current test signal, wherein when the test mode selection signal is the voltage test signal, the mode selection unit may supply a voltage to the power device; when the test mode selection signal is a current test signal, the mode selection unit can provide current for the power device; alternatively, when the voltage test signal and the current test signal are present at the same time, the current and the voltage are supplied to the power device at the same time.
In some embodiments, the mode selection unit may output an electrical parameter corresponding thereto to the power device according to a specific type of the test mode selection signal.
In some examples, to reduce the impact of fluctuations in the electrical parameter on the test results, the electrical parameter output to both ends of the power device may be adjusted to provide a stable electrical parameter for the power device during burn-in testing.
For example, the mode selection unit may be configured to generate a first adjustment signal for adjusting the actual voltage value according to the obtained actual voltage value and the set voltage value across the power device when it is determined that the test mode selection signal includes a voltage test signal.
Specifically, upon determining that the test mode selection signal includes a voltage test signal, the mode selection unit may output a corresponding actual voltage value to the power device in response to the voltage test signal, a first adjustment signal may be generated by comparing the actual voltage value with a set voltage value, and the set voltage value may be determined from the voltage test signal, so that the actual voltage value may be adjusted to the set voltage value based on the first adjustment signal, that is, the power device may be considered to be in a constant voltage test environment.
Also for example, the mode selection unit may be configured to generate a second adjustment signal for adjusting the actual current value according to the obtained actual current value and the set current value at both ends of the power device when it is determined that the test mode selection signal includes a current test signal.
Specifically, when it is determined that the test mode selection signal includes a current test signal, the mode selection unit may output a corresponding actual current value to the power device in response to the current test signal, a second adjustment signal may be generated by comparing the actual current value with a set current value, and the set current value is determined by the current test signal, so that the actual current value may be adjusted to the set current value based on the second adjustment signal, that is, the power device may be considered to be in a constant current test environment.
For another example, the mode selection unit may generate the first adjustment signal for adjusting the actual voltage value and the second adjustment signal for adjusting the actual current value at the same time, that is, may consider that the power device is in a constant voltage and constant current test environment.
Through the adjusting process, the power device can work at a set voltage value and/or a set current value, errors in detection parameters caused by voltage and/or current fluctuation are reduced, and the aging test performance of the power device can be evaluated more accurately.
In some embodiments of the present disclosure, referring to fig. 1, and referring to a specific schematic structural diagram of a mode selection unit in the embodiment of the present disclosure shown in fig. 2, as shown in fig. 2, the mode selection unit 130 may include: a mode regulation module U1, a plurality of first type gating channels (e.g., first type gating channels U2 and U3 illustrated in fig. 2), a plurality of second type gating channels (e.g., first type gating channels U4 and U5 illustrated in fig. 2), and a sampling module U6, wherein:
the mode regulation and control module U1 is coupled to each first type gating channel, each second type gating channel, and the output end and the power supply voltage VCC of the sampling module U6, and configured to generate the first regulation signal according to the obtained actual voltage value and the set voltage value, where the actual voltage value is generated when any one of the first type gating channels is gated; and/or configured to generate the second adjustment signal from the acquisition signal output by the sampling module U6;
A plurality of first type gating channels configured to vary an actual voltage value output to the power device and the mode regulation module U1 by gating at least two of the first type gating channels according to the first regulation signal;
the first end of the sampling module U6 is coupled to the output end of the mode regulation module U1 and the power device, the second end of the sampling module U6 is coupled to at least one second type gating channel, and is configured to collect an actual current value output to the power device, compare the actual current value with a set current value, and output a corresponding collection signal to the mode regulation module U1, wherein the actual current value is generated when any one of the second type gating channels is gated;
and a plurality of second type gating channels configured to change an actual current value output to the power device by gating at least two of the second type gating channels according to the second adjustment signal.
In connection with fig. 2, two first type gating channels U2 and U3, and two second type gating channels U4 and U5 are illustrated, wherein both the first type gating channel U2 and the first type gating channel U3 may be coupled with the mode regulation module U1, and in some examples, the first type gating channel U2 and the first type gating channel U3 may take the form of a series connection; both the second type strobe channel U4 and the second type strobe channel U5 may be coupled with the sampling module U6.
In some examples, when the acquired test mode selection signal is a voltage test signal, the mode selection unit may provide a power device with a supply voltage having a set voltage, where the first type gating channel U2 and the first type gating channel U3 may work, and may feed back the voltage of the output end to the mode regulation module U1, and further according to the acquired actual voltage value and the set voltage value, the mode regulation module U1 may generate the first regulation signal, so as to implement gating control on the first type gating channel U2 and/or the first type gating channel U3, and further change the actual voltage value of the output end.
That is, when the different first type strobe channels are strobed, the power supply voltages of different voltage values can be output to the power device.
In some examples, when the acquired test mode selection signal is a current test signal, the mode selection unit may provide a power device with a supply voltage having a set current, and the second type gating channel U4 and the second type gating channel U5 may operate, where the sampling module U6 may collect an actual current value output to the power device and compare the actual current value with the set current value to generate a corresponding collection signal to the mode regulation module U1, and then the mode regulation module U1 may generate the second regulation signal according to the collection signal, so as to implement gating control on the second type gating channel U4 and/or the second type gating channel U5, and further change an actual current value of the output end.
That is, when the different second type strobe channels are strobed, the power supply voltages of different current values can be output to the power device.
Or when the current test signal and the voltage test signal are obtained simultaneously, the mode regulation module U1 can generate the first regulation signal and the second regulation signal simultaneously to realize the gating control of the first type gating channel U2 and/or the first type gating channel U3 and the gating control of the second type gating channel U4 and/or the second type gating channel U5, so that the current test environment is in a constant voltage and/or constant current state.
That is, by generating the first adjustment signal and the second adjustment signal, the parameter value of the power device at the set voltage value and/or the set current value can be obtained, the measurement error caused by voltage and/or current fluctuation is reduced, and the aging test performance of the power device can be evaluated more accurately.
In some embodiments, each first type of gating channel may have the same structure.
As an example, a first type of gating channel may include: the first gating switches are connected with the first resistors in a one-to-one correspondence manner, wherein a first end of a part of the first gating switches is connected with the mode regulation and control module, a second end of the first gating switches is connected with a first end of the first resistors, and a second end of the first resistors is grounded; the first end of the first gating switch is connected with the mode regulation module, the second end of the first gating switch is connected with the first end of the first resistor, and the second end of the first resistor is connected with the mode regulation module;
Wherein, there are at least two first resistance's resistance value different in a plurality of first resistance.
Referring next to fig. 2, the first type gating channel U2 may include: the first gate switches K11 to K14 and the first resistors R11 to R14, wherein the first gate switch K11 may be connected to the first resistor R11, the first gate switch K12 may be connected to the first resistor R12, the first gate switch K13 may be connected to the first resistor R13, and the first gate switch K14 may be connected to the first resistor R14.
More specifically, a first terminal of the first gate switch K11 may be connected to the mode adjustment module U1, a second terminal thereof may be connected to a first terminal of the first resistor R11, and a second terminal of the first resistor R11 may be grounded; a first end of the first gating switch K12 may be connected to the mode adjustment module U1, a second end thereof may be connected to a first end of the first resistor R12, and a second end of the first resistor R12 may be grounded; a first end of the first gating switch K13 may be connected to the mode adjustment module U1, a second end thereof may be connected to a first end of the first resistor R13, and a second end of the first resistor R13 may be grounded; a first terminal of the first gate switch K14 may be connected to the mode adjustment module, a second terminal thereof may be connected to a first terminal of the first resistor R14, and a second terminal of the first resistor R14 may be grounded.
That is, the first terminal of the first gating switch may be connected to the mode adjustment module to change the resistance coupled into the circuit when turned on in response to the first adjustment signal.
In some examples, the first resistors R11 to R14 have at least two first resistors having different resistance values, so that the voltage value of the output can be changed by selecting the first resistors having different resistance values.
Referring next to fig. 2, the first type gating channel U3 may include: the first gate switches K21 to K24, and the first resistors R21 to R24, wherein the first gate switch K21 may be connected to the first resistor R21, the first gate switch K22 may be connected to the first resistor R22, the first gate switch K23 may be connected to the first resistor R23, and the first gate switch K24 may be connected to the first resistor R24.
More specifically, a first terminal of the first gating switch K21 may be connected to the mode adjustment module U1 (e.g., an output terminal of the mode adjustment module U1), a second terminal thereof may be connected to a first terminal of the first resistor R21, and a second terminal of the first resistor R21 may be grounded; a first end of the first gating switch K22 may be connected to the mode adjustment module U1, a second end thereof may be connected to a first end of the first resistor R22, and a second end of the first resistor R22 may be grounded; a first end of the first gating switch K23 may be connected to the mode adjustment module U1, a second end thereof may be connected to a first end of the first resistor R23, and a second end of the first resistor R23 may be grounded; a first terminal of the first gate switch K24 may be connected to the mode adjustment module, a second terminal thereof may be connected to a first terminal of the first resistor R24, and a second terminal of the first resistor R24 may be grounded.
That is, the first terminal of the second gating switch may be connected to the mode adjustment module, and the resistance coupled into the circuit may be changed by being turned on in response to the first adjustment signal.
In some examples, the first resistors R21 to R24 have at least two first resistors having different resistance values, so that the voltage value of the output can be changed by selecting the first resistors having different resistance values.
In some examples, in response to the first adjustment signal, when the first type gating channel U2 and the first type gating channel U3 are selected to be turned on, two resistors can be connected to the circuit, for example, the first resistor R11 and the first resistor R21 are connected to the circuit, so that the voltage output to the power device may be:
（1）
wherein,U out characterizing the voltage output to the power device;U b the reference voltage (i.e. reference electrical parameter) which characterizes the output mode regulation module can be 1.25V;R R21 characterizing the resistance value of the first resistor R21;R R11 the resistance value of the first resistor R11 is characterized.
Specifically, when the first resistor R11 and the first resistor R21 are connected to the circuit, a path is formed to the output terminal-R21-R11-ground, and since one end of the first resistor R11 is grounded and the other end is connected to the mode regulation module U1, the voltage drop across the first resistor R11 is U b Based on the principle of resistor voltage division, the voltage at the output end is the voltage drop of the first resistor R11 and the first resistor R21.
The first type gating channel comprises a plurality of first gating switches and a plurality of first resistors, and the resistance values of at least two first resistors in the plurality of first resistors are different, so that the output voltage value can be changed by selecting to access different first resistors, multiple application scenes are applicable, and the control logic can be simplified.
It can be understood that the number of the first type of gate channels, the first resistors included in the first type of gate channels, and the number of the first gate switches shown in fig. 2 are only illustrative, which are used to illustrate that the number of the first gate switches and the number of the resistors are not limited as long as the number of the first gate switches and the number of the resistors are mutually matched, and the resistors connected into the circuit can be changed to output different voltage values to the power device.
In some embodiments, each second type gating channel may have the same structure.
As an example, the second type strobe channel may include: the second gating switches are connected with the second resistors in a one-to-one correspondence manner, wherein a part of first ends of the second gating switches are connected with the sampling module, the second ends of the second gating switches are connected with the first ends of the second resistors, and the second ends of the second resistors are grounded; the second end of the second resistor with a part is connected with the mode regulation module;
Wherein, there are at least two second resistances in the multiple second resistances that have different resistance values.
Referring next to fig. 2, the second type gating channel U4 may include: the second gating switches K31 to K31 and the second resistors R31 to R34, wherein the second gating switch K31 may be connected to the second resistor R31, the second gating switch K32 may be connected to the second resistor R32, the second gating switch K33 may be connected to the second resistor R33, and the second gating switch K34 may be connected to the second resistor R34.
More specifically, a first end of the second gate switch K31 may be connected to the sampling module U6, a second end of the second gate switch K31 may be connected to a first end of the second resistor R31, and a second end of the second resistor R31 may be connected to the mode regulation module U1.
For the connection relation of the remaining second gate switches and second resistors in the second type gate channel U4 in the circuit, reference may be made to the description of the second gate switch K31 and the second resistor R31.
In some examples, the second resistors R31 to R34 have at least two second resistors having different resistance values, so that the output current value can be changed by selecting the second resistors having different resistance values.
Referring next to fig. 2, the second type gating channel U5 may include: the second gate switches K41 to K44, and the second resistors R41 to R44, wherein the second gate switch K41 may be connected to the second resistor R41, the second gate switch K42 may be connected to the first resistor R42, the first gate switch K43 may be connected to the second resistor R43, and the second gate switch K44 may be connected to the second resistor R44.
More specifically, a first terminal of the second gating switch K41 may be connected to the sampling module U6, a second terminal thereof may be connected to a first terminal of the second resistor R41, and a second terminal of the second resistor R41 may be grounded.
For the connection relationship between the remaining second gate switches and the second resistors in the second type gate channel U5, reference may be made to the description of the second gate switches and the first resistors.
In some examples, the second resistors R41 to R44 have at least two second resistors having different resistance values, so that the voltage value of the output can be changed by selecting the second resistors having different resistance values.
In some examples, in response to the second adjustment signal, when the second type gating channel U3 and the first type gating channel U4 are selected to be turned on, two resistors can be connected to the circuit, for example, the second resistor R31 and the second resistor R41 are connected to the circuit, so that the current output to the power device may be:
（2）
（3）
wherein,U R1 characterizing the voltage of the sampling resistor R1;U b the reference voltage (i.e. reference electrical parameter) which characterizes the output mode regulation module can be 1.25V;R R1 the resistance value of the sampling resistor R1 is represented;R R31 characterizing the resistance value of the second resistor R31;R R41 the resistance of the second resistor R41 is characterized.
Specifically, when the second resistor R31 and the second resistor R41 are connected to the circuit, a path is formed to the output terminal-operational amplifier-R31-R21-ground, and since one end of the second resistor R41 is grounded and the other end is connected to the operational amplifier OA, the current in the second resistor R41 is the same as the current in the sampling resistor R1, and the total voltage drop across the second resistor R31 and the second resistor R41 isU b Based on the principle of resistance voltage division, the output current can be determined.
The second type gating channel comprises a plurality of second gating switches and a plurality of second resistors, and the resistance values of at least two second resistors in the second resistors are different, so that the output current value can be changed by selecting to access different second resistors, multiple application scenes are applicable, and the control logic can be simplified.
It can be understood that the number of the second type gating channels, the second resistors included in the second type gating channels, and the number of the second gating switches shown in fig. 2 are only illustrative, which are used to illustrate that the second resistors and the second gating switches can be matched, and the resistors connected into the circuit can be changed to output different current values to the power devices, so long as the number of the second gating switches and the number of the second resistors are mutually matched, the embodiment of the present disclosure does not limit the number of the second gating switches and the number of the second resistors.
In some embodiments, with continued reference to fig. 2, sampling module U6 may include: an operational amplifier OA and a sampling resistor R1, wherein:
a first end of the operational amplifier OA1 may be connected to the first end of the sampling resistor R1 and the output end of the mode regulation module U1, and a second end of the operational amplifier OA1 may be connected to the second type gating channels (e.g., second type gating channels U4 and U5); the output of the operational amplifier OA1 may be connected to the second type gating channel (e.g. the second type gating channel U4) and the feedback end of the mode regulation module U1, respectively;
the second end of the sampling resistor R1 is grounded.
Specifically, when one of the second resistors in the second type gating channels U4 and U5 is connected to the circuit, the first end of the operational amplifier OA1 can obtain the current value of the output end through the sampling resistor R1, the first end of the operational amplifier OA1 can receive the current split by the second type gating channels U4 and U5, and then the operational amplifier OA1 can output a corresponding sampling signal according to the current values of the two input ends, and further the mode regulation module U1 can output a second regulation signal for controlling the second type gating channels U4 and U5 according to the actual sampling signal.
For example, when the current value of the first terminal is greater than the current value of the second terminal, the operational amplifier OA1 may output a sampling signal with a high level "1", and at this time, the mode adjusting module U1 may output a second adjusting signal to reduce the resistance of the second resistor connected to the circuit; for another example, when the current value of the first terminal is smaller than the current value of the second terminal, the operational amplifier OA1 may output a sampling signal with a high level "0", and the mode adjusting module U1 may output a second adjusting signal to increase the resistance of the second resistor connected to the circuit.
Through the comparison of the operational amplifier, when the actual current value is inconsistent with the set current value, the mode regulation module can be enabled to generate a second regulation signal for regulating the output current, so that the power device can work at the set current, and further an accurate aging test result can be obtained.
In some examples, the operating voltage of the power device may be exceeded in consideration of the fact that the voltage value output from the mode selection unit is large. Based on this, with continued reference to fig. 2, the mode selection unit 130 may further include: the voltage reduction unit U7 may be coupled to the output end of the mode regulation module U1 and the sampling module U6, and configured to regulate the output voltage value of the output end of the mode regulation module U1, so as to obtain the actual voltage value.
In some examples, the buck unit may be implemented with buck circuitry. For example, as shown in fig. 2, the step-down unit U7 may include a first diode D1, an inductor L, a first capacitor C1, and a second capacitor C2, where a first end of the first diode D1 may be connected to the sampling module U6 (e.g., the sampling resistor R1), a first end of the first capacitor C1, a first end of the second capacitor C2, and ground, and a second end of the first diode D1 may be connected to a first end of the inductor L and an output end of the mode regulation module U1, and a second end of the inductor L may be connected to a second end of the first capacitor C1 and a second end of the second capacitor C2, respectively.
In some alternative examples, the capacitance value of the first capacitance C1 is variable.
It will be appreciated that the voltage step-down unit may also be other means or devices capable of reducing the voltage.
In some alternative examples, to further improve the test accuracy, with continued reference to fig. 2, the mode selection unit may further include: and a third capacitor C3, where the third capacitor C3 may be connected in parallel with the second type gating channel U4, and the third capacitor C3 may perform a phase shifting function on the output of the operational amplifier.
For example, the second diode D2 may further include a dropping resistor R3 for reducing a voltage drop across the operational amplifier OA, and implementing unidirectional conduction, so that the operational amplifier OA can feed back an operation result to the mode regulation module.
By adopting the mode selection unit in the example, the voltage value and/or the current value output to the power device can be adjusted, so that the power device is in a constant voltage and/or constant current test environment, and the control unit can determine the state of the power device according to the acquired detection signal.
For example, the control unit is configured to determine that the power device is in a normal working state when determining that the level corresponding to the detection signal is a first level; and when the level corresponding to the detection signal is determined to be a second level, determining that the power device is in an abnormal state, wherein the first level and the second level are different.
In some examples, the first level may be a high level "1" and the second level may be a low level "0".
In some alternative examples, detection units having different configurations may be employed to obtain detection signals that are indicative of actual operating parameters of the power device.
As an example, referring to a schematic structural diagram of a detection unit in the example of the present specification shown in fig. 3, as shown in fig. 3, the detection unit 150 may include a first detection module 151, a second detection module 152, and a logic operation module 153, wherein:
The first end of the first detection module 151 may be coupled to a detection unit, and the second end thereof may be connected to a predetermined first voltage V f1 An output terminal coupled to a first terminal of the logic operation module 153 and configured to provide a reference electrical parameter and a preset first voltage V according to the mode selection unit f1 Outputting a first detection signal;
a second end of the second detection module 152 may be coupled to a detection unit, and a first end thereof may be connected to a predetermined second voltage V f2 An output terminal coupled to the second terminal of the logic operation module 153 and configured to provide a reference electrical parameter and a preset second voltage V according to the mode selection unit f2 Outputting a second detection signal;
the third terminal of the logic operation module 153 is coupled between the switch unit and the power device, the fourth terminal thereof is coupled with the control unit, and is adapted to perform logic operation on the actual working parameter, the first detection signal and the second detection signal, and output corresponding detection signals to the control unit.
In some examples, a preset first voltage V f1 Can be larger than a preset second voltage V f2 And is smaller than the reference electrical parameter provided by the detection unit.
For example, a first voltage V f1 May be 1.1V, the second voltage V f2 May be 0.25V, and the voltage corresponding to the reference electrical parameter may be 1.25V.
In some examples, the first detection signal output by the first detection module 151 may be at a high level, the second detection signal output by the second detection module 152 may be at a low level, and if the state of the power device is in a normal operating state, the actual operating voltage detected by the logic operation module 153 may be at a high level, and after the logic operation module 153 performs logic operation, the output operation signal is also at a high level.
That is, when the control unit determines that the level corresponding to the detection signal is a high level, the state of the power device is indicated to be a normal working state; otherwise, the state of the power device is described as an abnormal operation state, e.g., a short circuit state, an open circuit state, etc.
In some examples, the first detection module 151 may include a first operational amplifier OA1, wherein a non-inverting input of the first operational amplifier OA1 may be used as a first end of the first detection module 151, an inverting input thereof may be used as a second end of the first detection module 151, and an output thereof may be used as an output of the first detection module 151.
The second detection module 152 may include a second operational amplifier OA2, wherein a non-inverting input terminal of the second operational amplifier OA2 may be used as the second terminal of the second detection module 152, an inverting input terminal thereof may be used as the first terminal of the second detection module 152, and an output terminal thereof may be used as the output terminal of the second detection module 152.
In some examples, the logic operation module 153 may include an AND-OR logic operation unit OR, where a first end of the logic operation unit AND serves as a first end of the logic operation module 153, AND a second end thereof serves as a third end of the logic operation module 153; the output end of the first-stage logic OR is coupled with the first end of the OR logic operation unit.
The second terminal of the OR logic operator OR may be used as the second terminal of the logic operation module 153, and the output terminal thereof may be used as the output terminal of the logic operation module 153.
It is understood that the structure of the above-described detecting unit is only exemplified. In some other examples, the actual operating parameters of the power device under the electrical parameters may also be detected by a detection circuit formed by existing electronic devices (e.g., resistors, capacitors), etc., to obtain a detection signal.
In some embodiments, to further improve stability during the power device testing process, the on parameters (such as the on duration and the on time) of the switch unit may also be controlled.
Based on this, with continued reference to fig. 1, the test circuit 100 may further include: a pulse width adjusting unit 160, the pulse width adjusting unit 160 may be disposed between the frequency adjusting unit 120 and the switching unit 140, and configured to adjust a pulse width of a target clock signal output to the switching unit 140.
Specifically, by adjusting the pulse width of the target clock signal output to the switching unit, the on time and the on time of the switching unit can be controlled, so that different testing environments can be provided for the power device.
In some embodiments, referring to fig. 1 in combination with a schematic structure of a pulse width modulation unit shown in fig. 4, as shown in fig. 4, the pulse width modulation unit 160 may include:
a first delay branch 161 configured to delay the target clock signal to obtain a first delay signal Ds1;
a second delay branch 162 configured to delay the target clock signal to obtain a second delay signal Ds2;
a logic processing module 163, which may be coupled to the first delay branch 161 and the second delay branch 162, respectively, and configured to generate a turn-on signal for turning on the switching unit 140 according to the first delay signal Ds1 and the second delay signal Ds2;
wherein the delay time lengths of the first delay branch 161 and the second delay branch 162 may be different.
Specifically, since the delay time periods of the first delay branch 161 and the second delay branch 162 may be different, by setting the delay time periods of the first delay branch 161 and the second delay branch 162, the first delay signal Ds1 and the second delay signal Ds2 with different delay time periods may be obtained, and further, the logic processing module 163 may obtain the first delay signal Ds1 and the second delay signal Ds2 at different time periods, and by performing logic processing on the first delay signal Ds1 and the second delay signal Ds2, a logic processing signal with a set pulse width may be output, so that the switching unit 140 may be turned on, the turn-on time and the turn-on duration of the switching unit 140 may be controlled, and the test condition of the power device may be controlled.
In some examples, the first delay leg and the second delay leg may be implemented by devices and/or circuits having delay functions, e.g., the first delay leg and the second delay leg may be implemented by circuits formed by inverters, resistors.
It will be appreciated that while the embodiments provided herein have been described above with respect to various embodiments, the various alternatives identified by the various embodiments may be combined with each other and cross-referenced without conflict, thereby extending what is believed to be the embodiments disclosed and disclosed herein.
For example, in some embodiments, the test circuit may further include: and a voltage type conversion unit which may be configured to convert a voltage type output to the mode selection unit to implement burn-in test of different types of power devices.
The embodiments of the present disclosure further provide a method corresponding to the test circuit described in any of the above embodiments, and the detailed description will be made with reference to the accompanying drawings by way of specific embodiments.
A flowchart of a test method according to an embodiment of the present disclosure, as shown in fig. 5, may be applied to the test circuit according to any of the foregoing embodiments to adjust an electrical parameter output to a power device.
Correspondingly, the method for testing the power device can be specifically implemented according to the following steps:
s11, corresponding test mode selection signals and corresponding mapping data are generated according to the input adjusting instructions.
S12, refreshing the clock signal parameter value in the register according to the mapping data, and taking the refreshed clock signal parameter value as a target clock signal.
S13, generating corresponding electric parameters according to the test mode selection signals.
And S14, when the target clock signal is based, conducting a passage between the test circuit and the power device so that the power device works at the electric parameter.
S15, acquiring the actual working parameters of the power device under the electric parameters, and comparing the actual working parameters with the reference electric parameters to generate corresponding detection signals.
S16, determining the state of the power device according to the detection signal.
By adopting the testing method, the reference frequency signal can be regulated according to the preset reference frequency signal, the target clock signal with the same reference frequency value as the reference frequency signal is generated, the channel between the testing circuit and the power device is conducted, the corresponding electric parameter can be provided for the power device according to the testing mode selection signal, so that the power device works on the electric parameter, the actual working parameter of the power device under the electric parameter is obtained, and the actual working parameter is compared with the reference electric parameter, so that the corresponding detection signal can be generated, and the state of the power device can be determined according to the detection signal.
By adopting the mode, the corresponding electric parameters can be output to the power device in response to the test mode selection signals related to the configuration instructions, and the electric parameters input to the power device are adaptively changed, so that the power device is in different test modes, and the performance of the power device under different electric parameters is obtained.
It should be noted that, in the above embodiments, some steps do not have a necessary sequence, and may be executed synchronously or sequentially without contradiction, and the sequence may be exchanged. For example, when the steps of the test method provided in the present specification are actually performed, the step S12 and the step S13 may be simultaneously performed. The step sequence is not particularly limited in the embodiment of the present specification.
Although the embodiments of the present specification are disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.

Claims (12)

1. The test circuit is characterized by comprising a control unit, a frequency adjusting unit, a mode selecting unit, a switching unit and a detecting unit:
The control unit is configured to output a corresponding test mode selection signal to the mode selection unit and corresponding mapping data to the frequency adjustment unit according to an input configuration instruction; and configured to determine a state of the power device based on the detection signal;
the frequency adjusting unit is internally provided with a register for storing clock signal parameter values, and is configured to refresh the clock signal parameter values in the register according to the mapping data, read the refreshed clock signal parameter values in the register as a target clock signal and output the target clock signal to the switching unit;
the mode selection unit is configured to output corresponding electric parameters to the switch unit according to the test mode selection signal;
the switching unit is configured to conduct a passage between the mode selection unit and the power device when the target clock signal is acquired, so that the power device works on the electric parameter;
the detection unit is configured to acquire an actual working parameter of the power device under the electrical parameter, and compare the actual working parameter with the reference electrical parameter provided by the mode selection unit so as to output a corresponding detection signal to the control unit.
2. The test circuit of claim 1, wherein the test mode selection signal comprises a voltage test signal and/or a current test signal;
the mode selection unit is configured to generate a first adjusting signal for adjusting the actual voltage value according to the obtained actual voltage value and the set voltage value at two ends of the power device when the test mode selection signal is determined to comprise a voltage test signal; and/or generating a second adjusting signal for adjusting the actual current value according to the obtained actual current value and the set current value at the two ends of the power device when the test mode selection signal is determined to comprise a current test signal;
wherein the set voltage value is determined by the voltage test signal; the set current value is determined by the current test signal.
3. The test circuit of claim 2, wherein the mode selection unit comprises: the system comprises a mode regulation module, a plurality of first type gating channels, a plurality of second type gating channels and a sampling module, wherein:
the mode regulation and control module is respectively coupled with the first type gating channels, the second type gating channels and the output end of the sampling module and is configured to generate the first regulation signal according to the obtained actual voltage value and the set voltage value, wherein the actual voltage value is generated when any one of the first type gating channels is gated; and/or configured to generate the second adjustment signal from the acquisition signal output by the sampling module;
A plurality of first type gating channels configured to vary actual voltage values output to the power device and the mode regulation module by gating at least two of the first type gating channels according to the first regulation signal;
the sampling module is respectively coupled with the output end of the mode regulation module and the power device at a first end, coupled with at least one second type gating channel at a second end, and configured to acquire an actual current value output to the power device, compare the actual current value with a set current value, and output a corresponding acquisition signal to the mode regulation module, wherein the actual current value is generated when any one second type gating channel is gated;
and a plurality of second type gating channels configured to change an actual current value output to the power device by gating at least two of the second type gating channels according to the second adjustment signal.
4. The test circuit of claim 3, wherein the first type of strobe channel comprises: the first gating switches are connected with the first resistors in a one-to-one correspondence manner, wherein a first end of a part of the first gating switches is connected with the mode regulation and control module, a second end of the first gating switches is connected with a first end of the first resistors, and a second end of the first resistors is grounded; the first end of the first gating switch is connected with the mode regulation module, the second end of the first gating switch is connected with the first end of the first resistor, and the second end of the first resistor is connected with the mode regulation module;
Wherein, there are at least two first resistance's resistance value different in a plurality of first resistance.
5. The test circuit of claim 3, wherein the second type strobe channel comprises: the second gating switches are connected with the second resistors in a one-to-one correspondence manner, wherein a part of first ends of the second gating switches are connected with the sampling module, the second ends of the second gating switches are connected with the first ends of the second resistors, and the second ends of the second resistors are grounded; the second end of the second resistor with a part is connected with the mode regulation module;
wherein, there are at least two second resistances in the multiple second resistances that have different resistance values.
6. A test circuit according to claim 3, wherein the sampling module comprises: an operational amplifier and a sampling resistor, wherein:
the first end of the operational amplifier is respectively connected with the first end of the sampling resistor and the output end of the mode regulation module, and the second end of the operational amplifier is connected with the second type gating channel; the output of the operational amplifier is respectively connected with the second type gating channel and the feedback end of the mode regulation and control module;
The second end of the sampling resistor is grounded.
7. The test circuit according to any one of claims 3 to 6, wherein the mode selection unit further comprises:
the voltage reduction unit is respectively coupled with the output end of the mode regulation module and the sampling module and is configured to regulate the output voltage value of the output end of the mode regulation module so as to obtain the actual voltage value.
8. The test circuit of claim 1, wherein the control unit is configured to determine that the power device is in a normal operating state when determining that a level corresponding to the detection signal is a first level; and when the level corresponding to the detection signal is determined to be a second level, determining that the power device is in an abnormal state, wherein the first level and the second level are different.
9. The test circuit of claim 1, further comprising:
and a pulse width adjusting unit, disposed between the frequency adjusting unit and the switching unit, configured to adjust a pulse width of a target clock signal output to the switching unit.
10. The test circuit of claim 9, wherein the pulse width modulation unit comprises:
The first delay branch is configured to delay the target clock signal to obtain a first delay signal;
the second delay branch is configured to delay the target clock signal to obtain a second delay signal;
the logic processing module is coupled with the first delay branch circuit and the second delay branch circuit respectively and is configured to generate a conduction signal for conducting the switch unit according to the first delay signal and the second delay signal;
the delay time lengths of the first delay branch and the second delay branch are different.
11. The test circuit of claim 1, further comprising:
and a voltage type conversion unit configured to convert a voltage type output to the mode selection unit.
12. A test method applied to the test circuit of any one of claims 1 to 11, the test method comprising:
generating a corresponding test mode selection signal and corresponding mapping data according to an input adjustment instruction;
refreshing the clock signal parameter value in the register according to the mapping data, and taking the refreshed clock signal parameter value as a target clock signal;
Generating corresponding electrical parameters according to the test mode selection signals;
based on the target clock signal, conducting a passage between the test circuit and the power device so that the power device works at the electric parameter;
acquiring an actual working parameter of the power device under the electrical parameter, and comparing the actual working parameter with a reference electrical parameter to generate a corresponding detection signal;
and determining the state of the power device according to the detection signal.
CN202410027312.5A 2024-01-09 2024-01-09 Test circuit and test method Pending CN117554787A (en)

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