CN114113967A - Source measurement unit test system and test method - Google Patents

Source measurement unit test system and test method Download PDF

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Publication number
CN114113967A
CN114113967A CN202111438367.8A CN202111438367A CN114113967A CN 114113967 A CN114113967 A CN 114113967A CN 202111438367 A CN202111438367 A CN 202111438367A CN 114113967 A CN114113967 A CN 114113967A
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test
current
voltage
control unit
power consumption
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CN114113967B (en
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马国军
张奕凡
李明泽
段云龙
朱勤华
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Jiangsu University of Science and Technology
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Jiangsu University of Science and Technology
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/2601Apparatus or methods therefor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The invention discloses a source measurement unit test system and a source measurement unit test method, wherein the source measurement unit test system comprises a control unit, the control unit converts a test vector into an analog signal through a DAC (digital-to-analog converter), and then sends the analog signal to a V-I control unit, an analog switch is arranged between the DAC and the V-I control unit and used for switching a voltage mode and a current mode, the V-I control unit selects and sets a voltage source or a current source module to output according to the test vector, and the voltage source or the current source module is applied to a device to be tested through a power consumption detection and adjustment module; after passing through a power amplifier and a voltage stabilizing/current stabilizing module, a voltage/current signal to be measured is sent to a V-I control unit and fed back to the control unit through an ADC (analog to digital converter) to form closed-loop control; the power consumption detection and adjustment module detects the power consumption of the output stage of the power amplifier and adjusts the power consumption of the output stage in the feedback loop according to the detection result. Compared with the prior art, the invention has the advantages of low power consumption, flexible configuration, wide test range and the like.

Description

Source measurement unit test system and test method
Technical Field
The present invention relates to semiconductor testing systems and methods, and particularly to a source measurement unit testing system and method.
Background
In recent years, with the rapid development of domestic semiconductor technology, a Source Measurement Unit (SMU) has been sought by more and more enterprises as a core component of a semiconductor device testing apparatus. The source measuring unit is an important instrument for measuring I-V characteristics of various devices, and can simultaneously realize the functions of a programmable constant voltage source, a constant current source, an electronic load and a digital multimeter. The constant-current source can be used as a constant-voltage source to output voltages in positive and negative directions, and can also be used as a constant-current source to output currents in positive and negative directions. Because of this characteristic, when the SMU outputs negative power, it can be used as a load to absorb the positive power output by the power supply, and the SMU also has the function of voltage and current monitoring. Due to the functional diversity and good performance of the SMU, the SMU is widely applied to the fields of semiconductor testing, electronic product production testing and the like.
The two circuit units of the traditional source measurement unit test system are mutually independent, and the voltage source and the current source of the test equipment are switched through the relay, so that the structure has the problem that the existence of the relay can consume a part of power, the output power of the source measurement unit cannot be completely loaded on a device to be tested (DUT), meanwhile, due to the fact that the relay has certain switching internal resistance, certain heat can be generated when current passes through, and the I-V characteristic of a semiconductor device is generally subjected to temperature, and the test result is inaccurate.
Disclosure of Invention
The purpose of the invention is as follows: in order to solve the problems, the invention provides a source measurement unit test system and a test method, which can reduce the power consumption of an output stage of the test system under the condition of flexibly selecting and configuring a voltage source and a current source, and improve the stability of an SMU test system and the voltage and current output capability of an SMU.
The technical scheme is as follows: the technical scheme adopted by the invention is that the source measurement unit test system comprises a control unit for controlling the test flow of the whole system, wherein the control unit converts a test vector into an analog signal through a digital-to-analog converter and then sends the analog signal to a V-I control unit; after passing through a power amplifier and a voltage stabilizing/current stabilizing module, a voltage/current signal to be measured is sent to a V-I control unit and fed back to the control unit through an analog-to-digital converter to form closed-loop control; the power consumption detection and adjustment module detects the power consumption of the output stage of the power amplifier and adjusts the power consumption of the output stage in the feedback loop according to the detection result. The test system also comprises an upper computer, wherein the upper computer sends a test instruction to the control unit through a system bus, and is responsible for analyzing and judging test data and displaying a test result.
The power consumption of the output stage is adjusted in the feedback loop according to the detection result, the adjustment signal is fed back to the V-I control unit to carry out circuit parameter configuration again, and the power supply parameter of the system power supply is adjusted and output, so that the output capability of the source measurement unit is improved. Wherein the power consumption detection is the detection of the power consumption of the output stage of the power amplifier. If the detected power consumption is higher, power consumption adjustment is carried out, and the adjustment mode is as follows: the output voltage of the SMU is used as a reference factor for adjusting power consumption, and when the output voltage of the SMU changes greatly, the output voltage of the DC-DC is correspondingly adjusted, so that the power consumption of an output stage of the circuit is adjusted.
The power consumption detection and adjustment module adopts an integrated switch converter. The test vector includes a mode setting, a drive gain setting, a clamp setting, a comparator level setting, and a current output range selection. The control unit adopts STM32F103VET6, and the digital-to-analog converter and the V-I control unit part adopt an AD5522 model test chip to realize the functions.
The invention also provides a semiconductor device testing method applied to the source measuring unit testing system, which comprises the following steps:
step 1: setting a test vector, sending an instruction to a control unit through an upper computer, sending the test vector to a test chip AD5522 through a serial interface by the control unit, configuring the basic function of the test chip AD5522, and selecting a voltage driving measurement mode by the test chip AD 5522; the calculation formula of the driving voltage at the two ends of the device to be measured in the selected voltage driving measurement mode is as follows:
VOUT=4.5×VREF×(DAC_CODE/216)-(3.5×VREF
×OFFSET_DAC_CODE/216)+DUTGND
where VOUT is the voltage driving the amplifier DAC, VREF is the reference voltage, DAC _ CODE is the CODE value loaded into the DAC X2 register, OFFSET _ DAC _ CODE is the CODE value loaded into the OFFSET DAC, and DUTGND is the device under test ground voltage value.
Step 2: amplifying the voltage of an output end MEASOUT of an AD5522 pin to enable the output range of the SMU to reach the wide-range requirement of the output voltage, and simultaneously, when the internal detection range cannot meet the test requirement, realizing current detection combination of multiple current ranges by using a plurality of current detection resistors and matching with a circuit switch to switch the multiple ranges to realize the wide-range and multi-range current output of the SMU;
and step 3: the power consumption detection and adjustment module tracks and detects the power consumption of the output stages of the AD5522 internal power amplifier and the external power amplifier.
And 4, step 4: testing the device to be tested, feeding the measurement result back to a current signal feedback loop after the current of the current detection resistor is stable, feeding the measurement result into the AD5522 after the current passes through the current stabilization module, and simultaneously feeding data into the ADC for sampling;
and 5: the measurement output results of different ranges are accessed into the multiplexer, a single output signal of the multiplexer is sent into the ADC to finish data sampling, and meanwhile, data are returned to the AD5522 to be used as loop control and current clamping input;
step 6: and returning the sampled current data result to the upper computer, and analyzing to obtain a judgment result.
Has the advantages that: compared with the prior art, the source measurement unit test system has the advantages of low power consumption, flexible configuration, wide test range and the like. In the existing test system, due to the influence of parasitic capacitance parameters in a circuit, an output signal in a feedback loop oscillates, so that the stability of the system is influenced, the dynamic response time of the system is prolonged, the unstable state of the power consumption of an output stage of a power amplifier is further caused, and the output power range of an SMU is also influenced. The invention combines the closed loop feedback and the output stage power consumption detection and adjustment technology, so that the output stage power consumption of the system is always kept at a lower requirement, and the voltage stabilizing module and the current stabilizing module are connected to the closed loop feedback circuit of the system, thereby improving the stability of the SMU test system and the voltage and current output capability of the SMU and having great application value.
Drawings
FIG. 1 is a topological structure diagram of a source-measurement-unit test system according to the present invention;
fig. 2 is a diagram of an internal circuit configuration of the AD 5522;
FIG. 3 is a system block diagram of a source-measurement-unit test system according to the present invention;
FIG. 4 is a flow chart of a source-measurement unit testing method according to the present invention.
Detailed Description
The technical solution of the present invention is further described below with reference to the accompanying drawings and examples.
The source measurement unit test system of the invention has a circuit topology structure diagram as shown in fig. 1, and mainly comprises the following parts:
the test system also comprises an upper computer, the upper computer sends a test instruction to the system control unit through a system bus, and the control module carries out serial data transmission to the digital-to-analog converter DAC according to the test requirement to realize specific output; and is responsible for analyzing and judging the test data and finally displaying the test result.
And the control unit is responsible for controlling the test flow of the whole system, receiving a test parameter setting instruction from the upper computer, simultaneously sending a test vector to the DAC, and reading test data in the ADC sampling stage.
And the digital-to-analog converter DAC is used for converting the digital signal sent by the control unit into a required analog voltage signal and a required current signal. The low-current analog switch of the DAC part is used for switching an applied voltage mode and a current mode, and a switching signal is sent to the V-I control unit. The analog switch is responsible for only the selection function of the signal input link and does not itself pass the power current or power voltage through the DUT, and therefore there is no need to consider the losses of the switch and the resulting heating problems.
The V-I control unit introduces relevant devices to form required circuit modules, such as a clamping circuit, a protection circuit, a temperature alarm circuit and the like, according to specific parameters and functional requirements. The V-I control unit sets specific functions under an application mode and a feedback mode according to specific SMU parameter requirements (test range, test precision, clamping and the like), then is connected with a power amplifier to drive and output, and is applied to a device to be tested.
And the power amplifier realizes voltage or current driving output of the SMU through the power amplification circuit. The amplified analog signals are sent to an analog-to-digital converter (ADC) and a V-I control module through a feedback loop to form closed-loop control, the stability and the test precision of the test system are improved, and data sampled by the ADC are returned to an upper computer for analysis through the control module.
And power consumption detection and adjustment, namely detecting the power consumption of an output stage of the power amplifier to realize dynamic tracking of the power consumption of the output stage, adjusting the power consumption of the output stage in a feedback loop, feeding back a specific adjustment scheme to a V-I Control module, configuring circuit parameters in the module, and adjusting power supply parameters of a system power supply, so that the output capacity of a source measurement unit is improved. The power consumption adjusting module is realized by adopting an integrated switching converter LT8648S, and is set to be a tracking SMU output mode, at this time, the output of LT8648S can follow the output of the SMU all the time, and a clearance voltage value (the clearance voltage refers to the maximum fluctuation value of the SMU voltage output) is reduced on the basis of the SMU output, so that the power consumption of the power amplifier output stage is reduced.
Due to the influence of parasitic capacitance parameters in the circuit, capacitive loads exist in the analog feedback loop, and the phase margin or amplitude margin of the loop gain is changed, so that the stability of the feedback loop is influenced, the oscillation of an output source signal is caused, the time from the oscillation to the stability of the signal is prolonged, and the stability of a test system is influenced. Therefore, the power consumption detection of the output stage is introduced into the output part of the power amplifier, the power consumption adjustment of the output stage is introduced into the feedback loop, and the power consumption of the output stage of the circuit is dynamically tracked, so that the power consumption of the output stage is reduced to a certain extent, and the input and output capacity of the SMU reaches the maximum value which can be provided by a power supply.
And current detection resistance, shunt selection in a feedback mode, and configuration of the output mode of the source measurement unit as a current source output mode, so that the current test of the device to be tested DUT is completed.
The voltage stabilizing module/current stabilizing module is used for stabilizing and stabilizing the output voltage and the output current in the feedback loop, so that the output voltage or the output current of the source measuring unit is basically kept unchanged when the circuit signal fluctuates, the dynamic response time of the system is shortened, and the efficiency of the test system is improved.
Because the power consumption of the output stage of the circuit is always in an unstable state, the output power range of the SMU is influenced, and therefore the voltage stabilizing and current stabilizing modules are arranged in the feedback part, and the stability and the testing efficiency of the system are improved.
And the analog-to-digital converter ADC is used for converting the analog signal into a digital signal, returning the sampled result to the system control unit MCU, and comparing the DUT manual parameters by the upper computer to give a judgment result.
In this embodiment, the main chip of the test portion selects AD5522 of ADI corporation as the main chip of the source measurement unit test system, and the test is completed in a mode of implementing SMU applied Voltage/measurement Current (Force Voltage/Measure Current).
AD5522 is an industry-pioneering four-channel parameter measurement unit from ADI corporation. Inside each channel, 22 16-bit digital-to-analog converters (DACs) are provided for driving the voltage input, clamp input and comparator input, providing 5 programmable current drives and measurements, ranging from ± 5 μ Α to ± 64 mA. Wherein 4 measuring ranges are provided by the internal detection resistor, and the other large current +/-80 mA measuring range is provided by the external resistor. Current scaling beyond 64mA also requires an external buffer to implement. The PMU function is controlled and realized by a serial port SPI or LVDS. The SPI protocol supports 50MHz serial port clock downloading, and the LVDS interface protocol supports 100MHz clock transmission. Each channel of the AD5522 contains five dedicated DAC levels for driving the amplifier, clamp high, clamp low, comparator high and comparator low, respectively. The output of an AD5522 internal register set DAC is controlled by the serial interface SPI or LVDS, the driver amplifier DAC is used to set the value of the applied voltage or applied current, and the clamp DAC is used to protect the DUT. In the voltage applied mode, the current is clamped. Conversely, in the current applied mode, the voltage is clamped. If the voltage or current on the DUT exceeds a set level, the clamp will begin to operate to set the driver amplifier. The clamping may also protect the DUT if a transient voltage or current spike occurs while changing to a different operating mode or programming the device to a different current range, fig. 2 is a diagram of the internal circuit structure of the AD 5522.
In the source measurement unit test system, the working mode of the AD5522 can be set to the fvmi (force Voltage measurement current) mode through the serial interface. In VOLTAGE drive mode, the VOLTAGE drive is mapped directly to the DUT, the VOLTAGE across the DUT is stabilized at FIN (drive AMPLIFIER input VOLTAGE value), and the VOLTAGE across RSENSE is fed to the MEASOUT terminal via the measurement VOLTAGE AMPLIFIER (measurement VOLTAGE AMPLIFIER), and the value of MEASOUT is measured by the analog-to-digital converter ADC sampling.
The voltage drive can be calculated by equation (1):
VOUT=4.5×VREF×(DAC_CODE/216)-(3.5×VREF×OFFSET_DAC_CODE/216)+DUTGND (1)
where VOUT is the voltage driving the amplifier DAC, VREF is the reference voltage, DAC _ CODE is the CODE value loaded into the DAC X2 register, and OFFSET _ DAC _ CODE is the CODE value loaded into the OFFSET DAC. Power-on is that the default code value loaded into the offset DAC is 0XA492, which ranges from + -11.25V when the reference voltage is set to 5V. The AD5522 mainly contains three registers inside: a system control register, a PMU register and a DAC register, wherein the DAC X2 register and the DAC offset register belong to the category of the DAC register.
The basic test flow of the source measurement unit test system is shown in fig. 3, on the basis that closed loop feedback is formed among a test channel, an AD5522 and an analog-to-digital converter ADC, the invention sets output stage power consumption tracking detection of an AD5522 internal power amplifier in a system power supply part, feeds back the detection result to the AD5522 internal part, and adjusts the power consumption of the output stage of the power amplifier, so that the output capacity of the source measurement unit reaches the maximum value provided by the power supply. And a voltage stabilizing module is added in a voltage output feedback loop of the test channel, and a current stabilizing module is added in a current output feedback loop. The purpose of voltage stabilization and current stabilization is to solve the problems of stability of a test system and accuracy of a test result caused by output signal oscillation existing in an SMU circuit system.
The testing flow chart of the system is shown in fig. 4, and the specific testing steps are as follows:
step 1:
firstly, a program is compiled according to a test vector and related parameters which need to be set, an upper computer sends an instruction to a control unit MCU, the MCU sends the test vector to a test chip AD5522 through a serial interface, and the basic functions of the test chip AD5522 are configured, wherein the basic functions comprise basic working mode setting, driving gain setting, clamping setting, comparator level setting, current output range selection and the like, and under the premise of ensuring the stable working of a test circuit, the function of applying voltage and measuring current (FVMI) under a specific range of the AD5522 is realized.
Step 2:
on the basis of the step 1, the working mode of the AD5522 at the moment is determined, and then the voltage of the output end MEASOUT of the pin AD5522 is amplified, so that the output range of the SMU reaches the requirement of wide range of output voltage. Meanwhile, when the internal detection range cannot meet the test requirement, the external range extension resistor is utilized, a plurality of current detection resistors can be adopted to realize current detection combination of a plurality of current ranges, and the circuit switch is matched to switch the plurality of ranges, so that the SMU current output in a wide range and a plurality of ranges is realized.
And step 3:
on the basis of the step 2, tracking detection is carried out on the power consumption of output stages of an internal power amplifier and an external power amplifier of the AD5522, and the specific method is that in a digital power supply DVCC part of the AD5522, a DC-DC converter is adopted as a power supply input adjusting unit of the AD5522, and the power supply output power of the DC-DC converter is changed in real time according to the detected power consumption of the output stages. The DC-DC converter is a voltage reduction module, and is responsible for power consumption adjustment. The detection of the power consumption of the output stage can also be understood as tracking the output of the SMU, i.e. the output power of the DC-DC converter always varies with the output of the SMU, which achieves that the power consumption of the output stage is minimized in case of a certain SMU output power, thereby providing the possibility of full power output under limited heat dissipation conditions.
And 4, step 4:
and 3, testing the DUT (device under test) on the basis of the step 3, feeding back the measurement result to the current signal feedback part after the current of the current detection resistor is stable, sending the measurement result to the AD5522 (which can be used for setting the current clamping parameter of the AD 5522) after the current is stabilized by the current stabilization module, and sending data to the ADC for sampling.
And 5:
on the basis of step 4, the measurement output results of different ranges are connected into the multiplexer, a single output signal of the multiplexer is sent into the ADC to complete data sampling, and meanwhile, data are returned to the AD5522 to serve as loop control and current clamping input.
Step 6:
and 5, returning the sampled current data result to an upper computer on the basis of the step 5, comparing the current data result with a DUT manual, and analyzing to obtain a judgment result.

Claims (7)

1. A source-measurement unit test system, comprising: the test system comprises a control unit for controlling the test flow of the whole system, wherein the control unit converts a test vector into an analog signal through a digital-to-analog converter and then sends the analog signal to a V-I control unit; after passing through a power amplifier and a voltage stabilizing/current stabilizing module, a voltage/current signal to be measured is sent to a V-I control unit and fed back to the control unit through an analog-to-digital converter to form closed-loop control; the power consumption detection and adjustment module detects the power consumption of the output stage of the power amplifier and adjusts the power consumption of the output stage in a feedback loop according to the detection result; the test system also comprises an upper computer, wherein the upper computer sends a test instruction to the control unit through a system bus, and is responsible for analyzing and judging test data and displaying a test result.
2. The source-measurement-unit test system of claim 1, wherein: the power consumption of the output stage is detected and adjusted in the feedback loop according to the detection result, the real-time output voltage of the SMU is taken as reference, the power consumption of the output stage of the power supply part of the system is reduced, the adjustment signal is fed back to the V-I control unit to carry out circuit parameter configuration again, and the power supply parameter of the power supply of the system is adjusted.
3. The source-measurement-unit test system of claim 2, wherein: the power consumption detection and adjustment module adopts an integrated switch converter.
4. The source-measurement-unit test system of claim 1, wherein: the test vector includes a mode setting, a drive gain setting, a clamp setting, a comparator level setting, and a current output range selection.
5. The source-measurement-unit test system of claim 1, wherein: the digital-to-analog converter and the V-I control unit part adopt a test chip AD5522 to realize functions, and the control unit adopts STM32F103VET 6.
6. A semiconductor device testing method applied to the source-measurement-unit testing system of claim 5, comprising the steps of:
step 1: setting a test vector, sending an instruction to a control unit through an upper computer, sending the test vector to a test chip AD5522 through a serial interface by the control unit, configuring the basic function of the test chip AD5522, and selecting a voltage-driven current measurement mode by the test chip AD 5522;
step 2: amplifying the voltage of an output end MEASOUT of an AD5522 pin to enable the output range of the SMU to reach the wide-range requirement of the output voltage, and simultaneously when the internal current range cannot meet the test requirement, realizing current detection combination of multiple current ranges by using a plurality of current detection resistors and matching with a circuit switch to switch the multiple ranges by using an external range extension resistor;
and step 3: the power consumption detection and adjustment module tracks and detects the power consumption of the output stages of the AD5522 internal power amplifier and the external power amplifier;
and 4, step 4: testing the device to be tested, feeding the measurement result back to a current signal feedback loop after the current of the current detection resistor is stable, feeding the measurement result into the AD5522 after the current passes through the current stabilization module, and simultaneously feeding data into the ADC for sampling;
and 5: the measurement output results of different ranges are accessed into the multiplexer, a single output signal of the multiplexer is sent into the ADC to finish data sampling, and meanwhile, data are returned to the AD5522 to be used as loop control and current clamping input;
step 6: and returning the sampled current data result to the upper computer, and analyzing to obtain a judgment result.
7. The semiconductor device testing method according to claim 6, characterized in that: the test chip AD5522 selects a voltage drive measurement mode, and the drive voltage calculation formula at two ends of the device to be tested is as follows:
VOUT=4.5×VREF×(DAC_CODE/216)-(3.5×VREF×OFFSET_DAC_CODE/216)+DUTGND
where VOUT is the voltage driving the amplifier DAC, VREF is the reference voltage, DAC _ CODE is the CODE value loaded into the DAC X2 register, OFFSET _ DAC _ CODE is the CODE value loaded into the OFFSET DAC, and DUTGND is the device under test ground voltage value.
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CN116859223A (en) * 2023-09-05 2023-10-10 西安赛英特科技有限公司 On-line self-checking method and circuit for VI source and VI source
CN116859223B (en) * 2023-09-05 2023-12-08 西安赛英特科技有限公司 On-line self-checking method and circuit for VI source and VI source

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