CN114113967B - Source measurement unit test system and test method - Google Patents
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- CN114113967B CN114113967B CN202111438367.8A CN202111438367A CN114113967B CN 114113967 B CN114113967 B CN 114113967B CN 202111438367 A CN202111438367 A CN 202111438367A CN 114113967 B CN114113967 B CN 114113967B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The invention discloses a source measurement unit test system and a source measurement unit test method, wherein the source measurement unit test system comprises a control unit, wherein the control unit converts a test vector into an analog signal through a DAC (digital-to-analog) and then sends the analog signal to a V-I control unit, an analog switch is arranged between the DAC and the V-I control unit and is used for switching a voltage mode and a current mode, the V-I control unit selects and sets a voltage source or a current source module for output according to the test vector, and the voltage source or the current source module is applied to a device to be tested through a power consumption detection and adjustment module; the voltage/current signal to be measured is sent to a V-I control unit after passing through a power amplifier and a voltage/current stabilizing module, and is fed back to the control unit through an ADC (analog to digital converter) to form closed loop control; the power consumption detection and adjustment module detects the power consumption of the output stage of the power amplifier, and adjusts the power consumption of the output stage in the feedback loop according to the detection result. Compared with the prior art, the invention has the advantages of low power consumption, flexible configuration, wide testing range and the like.
Description
Technical Field
The present invention relates to a semiconductor testing system and method, and more particularly, to a source measurement unit testing system and method.
Background
In recent years, with the rapid development of semiconductor technology in China, a Source Measurement Unit (SMU) has been pursued by more and more enterprises as a core member of semiconductor device testing equipment. The source measuring unit is an important instrument for measuring the I-V characteristics of various devices, and can simultaneously realize the functions of a programmable constant voltage source, a constant current source, an electronic load and a digital multimeter. The constant voltage source can be used as a constant voltage source to output voltages in positive and negative directions, and can also be used as a constant current source to output currents in positive and negative directions. Because of this characteristic, when the SMU outputs negative power, the SMU can be used as a load to absorb the positive power output by the power supply, and meanwhile, the SMU also has the functions of voltage and current monitoring. Due to the functional diversity and good performance of SMU, it is widely used in the fields of semiconductor testing, electronic product production testing, etc.
The two circuit units of the traditional source measurement unit test system are mutually independent, and the voltage source and the current source function of the test equipment are switched through the relay, so that one problem exists in the structure is that a part of power is consumed by the existence of the relay, so that the output power of the source measurement unit cannot be completely loaded on the DUT, meanwhile, due to certain internal resistance of a switch of the relay, certain heat is generated when the current passes through, the I-V characteristic of the semiconductor device is always subjected to temperature, and the test result is inaccurate.
Disclosure of Invention
The invention aims to: in view of the above problems, the invention provides a source measurement unit testing system and a testing method, which can reduce the power consumption of an output stage of a testing system under the condition of flexibly selecting and configuring a voltage source and a current source, and improve the stability of an SMU testing system and the voltage and current output capability of the SMU.
The technical scheme is as follows: the invention adopts the technical scheme that the system comprises a control unit for controlling the test flow of the whole system, wherein the control unit converts a test vector into an analog signal through a digital-to-analog converter and then sends the analog signal to a V-I control unit, an analog switch is arranged between the digital-to-analog converter and the V-I control unit and is used for switching a voltage mode and a current mode, the V-I control unit selects and sets a voltage source or a current source module to output according to the test vector, and the voltage source or the current source module is applied to a device to be tested through a power consumption detection and adjustment module; the voltage/current signal to be measured is sent to a V-I control unit after passing through a power amplifier and a voltage/current stabilizing module, and is fed back to the control unit through an analog-to-digital converter to form closed loop control; the power consumption detection and adjustment module detects the power consumption of the output stage of the power amplifier, and adjusts the power consumption of the output stage in the feedback loop according to the detection result. The test system also comprises an upper computer, wherein the upper computer sends a test instruction to the control unit through a system bus and is responsible for analyzing and judging test data and displaying test results.
The power consumption of the output stage is adjusted in the feedback loop according to the detection result, an adjusting signal is fed back to the V-I control unit to carry out circuit parameter configuration again, and the power supply parameters of the power supply of the system are adjusted and output, so that the output capacity of the source measurement unit is improved. Wherein the power consumption detection is a detection of power consumption of the power amplifier output stage. If the detected power consumption is higher, power consumption adjustment is carried out in the following manner: and when the output voltage of the SMU is changed greatly, the output voltage of the DC-DC is correspondingly adjusted, so that the power consumption of the output stage of the circuit is adjusted.
The power consumption detection and adjustment module adopts an integrated switch converter. The test vectors include a mode setting, a drive gain setting, a clamp setting, a comparator level setting, and a current output range selection. The control unit adopts STM32F103VET6, and the digital-to-analog converter and the V-I control unit part adopt a test chip of AD5522 model to realize the functions.
The invention also provides a semiconductor device testing method applied to the source measuring unit testing system, which comprises the following steps:
step 1: setting a test vector, sending an instruction to a control unit through an upper computer, and sending the test vector to a test chip AD5522 through a serial interface by the control unit to configure the basic function of the test vector, wherein the test chip AD5522 selects a voltage driving measurement mode; the driving voltage calculation formula of the two ends of the device to be measured in the selected voltage driving measurement mode is as follows:
VOUT＝4.5×VREF×(DAC_CODE/2 16 )-(3.5×VREF
×OFFSET_DAC_CODE/2 16 )+DUTGND
where VOUT is the voltage driving the amplifier DAC, VREF is the reference voltage, dac_code is the CODE value loaded into the DAC X2 register, offset_dac_code is the CODE value loaded into the bias DAC, and DUTGND is the device under test ground voltage value.
Step 2: amplifying the voltage of the MEASOUT at the output end of the AD5522 pin to ensure that the output range of the SMU meets the requirement of outputting a voltage with a wide range, and simultaneously, when the internal detection range cannot meet the test requirement, utilizing an external range expansion resistor, adopting a plurality of current detection resistors to realize the current detection combination of a plurality of current ranges, and switching the plurality of ranges by matching with a circuit switch to realize the current output of the SMU with the wide range and the multiple ranges;
step 3: the power consumption detection and adjustment module tracks and detects the power consumption of the output stages of the AD5522 internal power amplifier and the external power amplifier.
Step 4: testing a device to be tested, feeding back a measurement result to a current signal feedback loop after the current passing through a current detection resistor is stable, feeding the measurement result into an AD5522 after passing through a current stabilizing module, and simultaneously feeding data into an ADC for sampling;
step 5: the measurement output results of different measuring ranges are connected into a multiplexer, a single output signal of the multiplexer is sent into an ADC to finish data sampling, and meanwhile, the data is returned to an AD5522 as loop control and current clamping input;
step 6: and returning the sampled current data result to the upper computer, and analyzing to obtain a judgment result.
The beneficial effects are that: compared with the prior art, the invention designs the source measurement unit test system with the advantages of low power consumption, flexible configuration, wide test range and the like. In the existing test system, due to the influence of parasitic capacitance parameters in a circuit, an output signal in a feedback loop oscillates, so that the stability of the system is influenced, the dynamic response time of the system is prolonged, the unstable state of power consumption of an output stage of a power amplifier is further caused, and the output power range of the SMU is also influenced. The invention combines the closed loop feedback and the output stage power consumption detection and adjustment technology, so that the output stage power consumption of the system is always kept at a lower requirement, and the voltage stabilizing module and the current stabilizing module are connected into the closed loop feedback circuit of the system, thereby improving the stability of the SMU test system and the voltage and current output capability of the SMU, and having great application value.
Drawings
FIG. 1 is a topological structure diagram of a source-measurement unit testing system according to the present invention;
FIG. 2 is a diagram of the internal circuitry of the AD 5522;
FIG. 3 is a system block diagram of a source-measurement-unit testing system according to the present invention;
fig. 4 is a flow chart of a source-measurement unit testing method according to the present invention.
Detailed Description
The technical scheme of the invention is further described below with reference to the accompanying drawings and examples.
The invention relates to a source measuring unit testing system, a circuit topology structure diagram is shown in figure 1, and mainly comprises the following parts:
the upper computer is used for facilitating a tester to control the start and stop of the test, setting the test parameters and analyzing and displaying the test data, the test system also comprises the upper computer, the upper computer sends a test instruction to the system control unit through the system bus, and the control module transmits serial data to the digital-to-analog converter DAC according to the test requirement to realize the specific output; and is responsible for analyzing and judging the test data, and finally displaying the test result.
The control unit is responsible for controlling the test flow of the whole system, receiving a test parameter setting instruction from the upper computer, sending a test vector to the DAC, and reading test data in the ADC sampling stage.
And the digital-to-analog converter DAC converts the digital signals sent by the control unit into the required analog voltage signals and current signals. The low-current analog switch of the DAC part is used for switching the applied voltage mode and the current mode, and a switching signal is sent to the V-I control unit. The analog switch is responsible only for the selection function of the signal input link and does not itself pass through the power current or power voltage flowing through the DUT, thus eliminating the need to consider the loss of the switch and the resulting heating problems.
The V-I control unit introduces relevant devices into the part to form a required circuit module, such as a clamping circuit, a protection circuit, a temperature alarm circuit and the like according to specific parameters and functional requirements. The V-I control unit sets specific functions in an application mode and a feedback mode according to specific SMU parameter requirements (test range, test precision, clamping and the like), then connects with a power amplifier to drive output and applies the output to a device to be tested, and because the current detection resistor and the device to be tested are in series connection, after the voltage at two ends of the current detection resistor is stable, the current of the whole loop is also stable, and at the moment, the source measurement mode is a current source output mode.
And the power amplifier is used for realizing voltage or current driving output of the SMU through the power amplifying circuit. The amplified analog signals are sent to an analog-to-digital converter ADC and a V-I control module through a feedback loop to form closed-loop control, stability and testing precision of a testing system are improved, and data sampled by the ADC are returned to an upper computer through the control module for analysis.
And detecting and adjusting the power consumption of the output stage of the power amplifier, realizing the dynamic tracking of the power consumption of the output stage, adjusting the power consumption of the output stage in a feedback loop, feeding back a specific adjustment scheme to a V-I Control module, configuring circuit parameters in the module, and adjusting the power supply parameters of a power supply source of the system, thereby improving the output capacity of the source measurement unit. The power consumption adjustment module is implemented by adopting an integrated switch converter LT8648S, and is set to track an SMU output mode, at this time, the output of the LT8648S can follow the output of the SMU at any time, and the value of a headroom voltage (the headroom voltage refers to the maximum fluctuation value of the SMU voltage output) is reduced on the basis of the SMU output, so that the power consumption of the power amplifier output stage is reduced.
The parasitic capacitance parameter in the circuit affects the existence of capacitive load in the analog feedback loop and causes the change of the phase margin or the amplitude margin of the loop gain, so that the stability of the feedback loop is affected, the oscillation of an output source signal is caused, the time from oscillation to stability of the signal is prolonged, and the stability of the test system is affected. Therefore, the power consumption detection of the output stage is introduced into the output part of the power amplifier, the power consumption adjustment of the output stage is introduced into the feedback loop, and the power consumption of the output stage of the circuit is dynamically tracked, so that the power consumption of the output stage is reduced to a certain extent, and the input and output capacity of the SMU reaches the maximum value which can be provided by a power supply.
And (3) selecting a shunt in a feedback mode by the current detection resistor, configuring an output mode of the source measurement unit as a current source output mode, and completing current test of the DUT to be tested.
The voltage stabilizing module/current stabilizing module is used for stabilizing and stabilizing the output voltage and the output current in the feedback loop, so that when the circuit signal fluctuates, the output voltage or the output current of the source measuring unit is basically kept unchanged, the dynamic response time of the system is reduced, and the efficiency of the test system is improved.
Because the output stage power consumption of the circuit is always in an unstable state, the output power range of the SMU is affected, and therefore the voltage stabilizing and current stabilizing module is arranged in the feedback part, so that the system stability and the test efficiency are improved.
And the analog-to-digital converter ADC converts the analog signal into a digital signal, returns the sampled result to the system control unit MCU, and compares the parameters of the DUT manual by the upper computer to give a judgment result.
In this embodiment, the main chip of the test part selects AD5522 of ADI company as the main chip of the source measurement unit test system, and the test is completed in a mode of realizing SMU applied Voltage/measurement Current (Force Voltage/measurement Current).
AD5522 is the first four-way parameter measurement unit in the industry introduced by ADI corporation. Within each channel 22 16-bit digital-to-analog converters (DACs) are provided for driving voltage inputs, clamping inputs and comparator inputs, providing 5 programmable current drives and measurements, ranging from + -5 mua to + -64 mA. Wherein 4 measuring ranges are provided by an internal detection resistor, and the other large-current +/-80 mA measuring range is provided by an external resistor. Current ranges exceeding + 64mA also require an external buffer to achieve. The PMU function is controlled and realized through serial port SPI or LVDS. The SPI protocol supports 50MHz serial port clock downloading, and the LVDS interface protocol supports 100MHz clock transmission. Each channel of the AD5522 contains five dedicated DAC levels for driving the amplifier, clamping high, clamping low, comparator high and comparator low, respectively. The output of the DAC is set by controlling the registers within the AD5522 through a serial interface SPI or LVDS, driving the amplifier DAC for setting the value of the applied voltage or applied current, and clamping the DAC for protecting the DUT. In the applied voltage mode, the current is clamped. Conversely, in the current-applied mode, the voltage is clamped. If the voltage or current on the DUT exceeds the set level, the clamp will begin to operate to set the driver amplifier. Clamping may also protect the DUT if transient voltage or current spikes occur when changing to a different mode of operation or programming the device to a different current range, fig. 2 is a diagram of the internal circuitry of AD 5522.
In the source-measurement-unit test system, the operation mode of the AD5522 may be set to FVMI (Force Voltage Measure Current) mode through the serial interface. In the voltage driving mode, the voltage driving is directly mapped to the DUT, the voltage at two ends of the DUT is stabilized at FIN (the input voltage value of a driving amplifier), the voltage at two ends of RSENSE is sent to a MEASOUT end through a measuring voltage amplifier (MEASURE VOLTAGE AMPLIFIER), and the value of the MEASOUT is measured through the ADC.
The voltage drive can be calculated by equation (1):
VOUT＝4.5×VREF×(DAC_CODE/2 16 )-(3.5×VREF×OFFSET_DAC_CODE/2 16 )+DUTGND (1)
where VOUT is the voltage driving the amplifier DAC, VREF is the reference voltage, dac_code is the CODE value loaded into the DAC X2 register, and offset_dac_code is the CODE value loaded into the bias DAC. The power-up is that the default code value loaded to the bias DAC is 0XA492, which ranges from + -11.25V when the reference voltage is set to 5V. Inside the AD5522 mainly three registers are contained: the system comprises a system control register, a PMU register and a DAC register, wherein the DAC X2 register and the DAC bias register belong to the category of the DAC register.
The basic test flow of the source measuring unit test system is shown in fig. 3, on the basis of forming closed loop feedback between a test channel and the AD5522 and the analog-to-digital converter ADC, the invention sets the output stage power consumption tracking detection of the power amplifier in the AD5522 in the system power supply part, and feeds the detection result back to the AD5522 to adjust the output stage power consumption of the power amplifier, so that the output capacity of the source measuring unit reaches the maximum value provided by the power supply. And a voltage stabilizing module is added in a voltage output feedback loop of the test channel, and a current stabilizing module is added in a current output feedback loop. The purpose of voltage stabilization and current stabilization is to solve the stability of a test system and the accuracy problem of test results caused by oscillation of output signals in an SMU circuit system.
The test flow chart of the system is shown in fig. 4, and specific test steps are as follows:
step 1:
firstly, programming a program according to a test vector and related parameters which are set as required, sending an instruction to a control unit MCU by an upper computer, sending the test vector to a test chip AD5522 by the MCU through a serial interface, and configuring basic functions of the test chip AD5522, including basic working mode setting, driving gain setting, clamping setting, comparator level setting, current output range selection and the like, and realizing the function of applying voltage measurement current (FVMI) under a specific range of the AD5522 on the premise of ensuring stable operation of a test circuit.
Step 2:
on the basis of the step 1, the working mode of the AD5522 is determined, and then the voltage of the output end MEASOUT of the pin of the AD5522 is amplified, so that the output range of the SMU reaches the requirement of wide range of output voltage. Meanwhile, when the internal detection range cannot meet the test requirement, the external range extension resistor can be used for realizing the current detection combination of a plurality of current ranges by adopting a plurality of current detection resistors, and the plurality of ranges are switched by matching with a circuit switch, so that the current output of the SMU in a wide range and a plurality of ranges is realized.
Step 3:
on the basis of the step 2, the power consumption of the output stage of the internal power amplifier and the external power amplifier of the AD5522 is tracked and detected, and the specific method is that in the digital power supply DVCC part of the AD5522, a DC-DC converter is adopted as a power supply input regulating unit of the AD5522, and the power supply output power of the DC-DC converter is changed in real time according to the detected power consumption of the output stage. The DC-DC converter is a step-down module and is responsible for power consumption adjustment. The detection of the power consumption of the output stage may also be understood as tracking the output of the SMU, i.e. the output power of the DC-DC converter always varies with the output of the SMU, so that the power consumption of the output stage is minimized in case of determination of the output power of the SMU, thus providing the possibility of full power output under limited heat dissipation conditions.
Step 4:
on the basis of the step 3, the DUT is tested, after the current of the current detection resistor is stabilized, the measurement result is fed back to the current signal feedback part, and the current is fed into the AD5522 (which can be used for setting the current clamping parameter of the AD 5522) after passing through the current stabilizing module, and meanwhile, the data is fed into the ADC for sampling.
Step 5:
on the basis of step 4, the measurement output results of different ranges are connected into a multiplexer, and a single output signal of the multiplexer is sent into an ADC to complete data sampling, and meanwhile, the data is returned to an AD5522 as loop control and current clamping input.
Step 6:
and (5) returning the sampled current data result to the upper computer on the basis of the step (5), and carrying out comparison by combining with a DUT manual, and analyzing to obtain a judgment result.
Claims (6)
1. The semiconductor device testing method applied to the source measuring unit testing system comprises a control unit for controlling the whole system testing flow, wherein the control unit converts a testing vector into an analog signal through a digital-to-analog converter and then sends the analog signal to a V-I control unit, an analog switch is arranged between the digital-to-analog converter and the V-I control unit and used for switching a voltage mode and a current mode, the V-I control unit selects and sets a voltage source or a current source module to output according to the testing vector, and the voltage source or the current source module is applied to a device to be tested through a power consumption detection and adjustment module; the voltage/current signal to be measured is sent to a V-I control unit after passing through a power amplifier and a voltage/current stabilizing module, and is fed back to the control unit through an analog-to-digital converter to form closed loop control; the power consumption detection and adjustment module detects the power consumption of the output stage of the power amplifier, and adjusts the power consumption of the output stage in the feedback loop according to the detection result; the test system also comprises an upper computer, the upper computer sends a test instruction to the control unit through a system bus and is responsible for analyzing and judging test data and displaying test results, and the digital-to-analog converter and the V-I control unit part adopt a test chip AD5522 to realize the functions, and the test system is characterized by comprising the following steps:
step 1: setting a test vector, sending an instruction to a control unit through an upper computer, and sending the test vector to a test chip AD5522 through a serial interface by the control unit, wherein the test chip AD5522 selects a voltage driving measurement current mode;
step 2: amplifying the voltage of the MEASOUT at the output end of the AD5522 pin to ensure that the output range of the SMU meets the requirement of outputting a wide range of voltage, and simultaneously, when the internal current range can not meet the test requirement, utilizing an external range expansion resistor, adopting a plurality of current detection resistors to realize the current detection combination of a plurality of current ranges and switching the plurality of ranges by matching with a circuit switch;
step 3: the power consumption detection and adjustment module tracks and detects the power consumption of the output stages of the AD5522 internal power amplifier and the external power amplifier;
step 4: testing a device to be tested, feeding back a measurement result to a current signal feedback loop after the current passing through a current detection resistor is stable, feeding the measurement result into an AD5522 after passing through a current stabilizing module, and simultaneously feeding data into an ADC for sampling;
step 5: the measurement output results of different measuring ranges are connected into a multiplexer, a single output signal of the multiplexer is sent into an ADC to finish data sampling, and meanwhile, the data is returned to an AD5522 as loop control and current clamping input;
step 6: and returning the sampled current data result to the upper computer, and analyzing to obtain a judgment result.
2. The method for testing a semiconductor device according to claim 1, wherein: the test chip AD5522 selects a voltage driving measurement mode, and a driving voltage calculation formula at two ends of the device to be tested is as follows:
VOUT＝4.5×VREF×(DAC_CODE/2 16 )-(3.5×VREF×OFFSET_DAC_CODE/2 16 )+DUTGND
where VOUT is the voltage driving the amplifier DAC, VREF is the reference voltage, dac_code is the CODE value loaded into the DAC X2 register, offset_dac_code is the CODE value loaded into the bias DAC, and DUTGND is the device under test ground voltage value.
3. The method for testing a semiconductor device according to claim 1, wherein: the power consumption of the output stage is adjusted in the feedback loop according to the detection result, namely the real-time output voltage of the SMU is taken as a reference, the power consumption of the output stage of the power supply part of the system is reduced, an adjusting signal is fed back to the V-I control unit to carry out circuit parameter configuration again, and the power supply parameters of the power supply source of the system are adjusted.
4. The method for testing a semiconductor device according to claim 1, wherein: the power consumption detection and adjustment module adopts an integrated switch converter.
5. The method for testing a semiconductor device according to claim 1, wherein: the test vectors include a mode setting, a drive gain setting, a clamp setting, a comparator level setting, and a current output range selection.
6. The method for testing a semiconductor device according to claim 1, wherein: the control unit adopts STM32F103VET6.
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| CN116859223B (en) * | 2023-09-05 | 2023-12-08 | 西安赛英特科技有限公司 | On-line self-checking method and circuit for VI source and VI source |
| CN117348496A (en) * | 2023-11-21 | 2024-01-05 | 广州思林杰科技股份有限公司 | Digital loop control system for source meter |
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