JP2014215048A - Power supply device and test device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To acquire a current flowing through a load without relying on a current sensor.SOLUTION: A waveform arithmetic unit 200, used together with a main power supply for supplying a power supply voltage Vto a load, acquires a third waveform i(t)-i(0) which is an AC component of a load current iwhen an impedance fluctuation occurs in the load. A first waveform acquisition unit 202 acquires, in a steady state of a second environment in which the power supply voltage Vis stabilized by the main power supply, a first waveform v(t) which is a waveform of the power supply voltage Vwhen an impedance fluctuation occurs. A second waveform acquisition unit 206 acquires, in a steady state of the second environment, a second waveform z(t) which is an impulse response waveform of the power supply voltage to a pulse current when the pulse current is supplied to a power supply line. A first deconvolution processing unit 210 calculates a third waveform i(t)-i(0) by deconvoluting the second waveform z(t) against the first waveform v(t).

Description

  The present invention relates to a power supply device.

  When testing a semiconductor integrated circuit (hereinafter referred to as DUT) such as a CPU (Central Processing Unit), DSP (Digital Signal Processor), and memory using CMOS (Complementary Metal Oxide Semiconductor) technology, flip-flops and latches in the DUT are When the clock is supplied, a current flows, and when the clock is stopped, the circuit becomes static and the current decreases. Therefore, the total operating current (load current) of the DUT varies from moment to moment depending on the contents of the test.

  A power supply circuit that supplies power to the DUT is configured using, for example, a regulator, and can ideally supply constant power regardless of the load current. However, an actual power supply circuit has an output impedance that cannot be ignored, and an impedance component that cannot be ignored exists between the power supply circuit and the DUT, so that the power supply voltage fluctuates due to load fluctuations.

  In the technique described in Patent Document 2, in addition to a main power supply that supplies a power supply voltage to a device under test, a compensation circuit including a switch that is controlled to be turned on and off by an output of a driver is provided. The compensation circuit injects (sources) a pulsed compensation current to the power supply terminal of the device under test from a path different from the main power supply in the ON state of the switch element, and / or the pulsed compensation current is tested. It is configured to be drawn (sinked) in a different route from the device. Then, a compensation control pattern for the switch element of the compensation circuit is defined in association with the test pattern so as to cancel the fluctuation of the power supply voltage that may occur according to the test pattern supplied to the device under test. During the actual test, the power supply voltage can be kept constant by switching the switch element of the compensation circuit according to the control pattern while supplying the test pattern to the device under test.

  Alternatively, in the technique described in Patent Document 2, it is possible to appropriately define a control pattern for the switch element and control the waveform of the compensation current, thereby making the power supply voltage a desired waveform. That is, by defining an appropriate control pattern in a test environment in which a DUT is tested using a test apparatus, a power supply voltage supplied to the DUT is used as a platform on which the DUT is actually mounted (hereinafter also referred to as an actual operating environment). It is possible to simulate (emulate) the actual operating environment by varying the power supply voltage generated in (1).

JP 2007-205813 A International Publication No. 10 / 029709A1 Pamphlet JP 2012-098156 A JP 2001-356767 A

  Here, in order to simulate the actual operating environment in the test environment, there is a case where it is desired to know the fluctuation waveform of the load current flowing through the DUT.

  However, in order to measure the load current, it is necessary to insert a current sensor between the power supply circuit and the power supply terminal of the DUT. By inserting the current sensor, a minute resistance, a current transformer, or a current clamp meter is inserted into the power supply line. Therefore, the current sensor causes a further power supply voltage fluctuation. Therefore, in many systems it is difficult to directly measure the load current.

  When it is difficult to measure the load current, it is necessary to estimate the load current waveform by simulation. However, it is not easy to construct a simulation environment, and even if it can be constructed, sufficient accuracy may not be obtained.

  The present invention has been made in such a situation, and one of the exemplary purposes of an aspect thereof is to provide a power supply device capable of calculating a load current waveform without using a current sensor.

One embodiment of the present invention relates to a power supply apparatus. The power supply device supplies a power supply voltage in a second environment different from the first environment to a load that operates by receiving a power supply voltage from a target power supply in the first environment.
The power supply device includes a main power supply and a waveform calculation unit. The main power supply has an output terminal connected to the power supply terminal of the load via the power supply line, and the output voltage output from the output terminal so that the detected value according to the power supply voltage of the power supply terminal approaches a predetermined target value. Feedback control. The waveform calculation unit calculates a third waveform i _DUT (t) −i _DUT (0), which is a waveform of an alternating current component of the load current flowing through the load when a predetermined impedance fluctuation occurs in the load.
The waveform calculation unit obtains a first waveform v _A (t) that is a waveform of the power supply voltage when a predetermined impedance fluctuation occurs in the load in the steady state of the second environment in which the power supply voltage is stabilized by the main power supply. A first waveform acquisition unit to acquire and a second waveform z _A (t) that is an impulse response waveform of the power supply voltage with respect to the pulse current when a predetermined pulse current is supplied to the power supply line in the steady state of the second environment. a second waveform acquisition unit for acquiring, with respect to the first waveform _v a (t), by deconvolution the second waveform _z a (t), the third waveform _{i DUT (t) -i DUT (} 0 And a first deconvolution processing unit for calculating.
According to this aspect, the third waveform i _DUT (t) −i _DUT (0) is used without using a current sensor in a situation where the first waveform v _A (t) and the second waveform z _A (t) are known. Can be calculated.

In addition to (i) the third waveform i _DUT (t) -i _DUT (0), the waveform calculation unit (ii) in the steady state of the first environment where the power supply voltage is stabilized by the target power supply, It may be possible to calculate the fifth waveform v _T (t), which is a waveform of the power supply voltage when a predetermined impedance variation occurs. The waveform calculation unit obtains a fourth waveform z _T (t) that is an impulse response waveform of the power supply voltage with respect to the pulse current when a predetermined pulse current is supplied to the power supply line in the steady state of the first environment. A waveform acquisition unit and a first convolution process for calculating a fifth waveform v _T (t) by performing a convolution operation on the third waveform i _DUT (t) -i _DUT (0) and the fourth waveform z _T (t). May further be included.
According to this aspect, the first waveform v _A (t), the second waveform z _A (t), and the fourth waveform z _T (t) are the fluctuation waveforms of the power supply voltage in the first environment under known conditions. Five waveforms v _T (t) can be calculated.

The fourth waveform acquisition unit obtains a fourth spectrum z _T (f) that is a spectrum of an impulse response waveform of the power supply voltage with respect to the pulse current when a predetermined pulse current is supplied to the power supply line in the steady state of the first environment. A fourth spectrum acquisition unit to be acquired and an inverse Fourier transform unit that calculates the fourth waveform z _T (t) by performing inverse Fourier transform on the fourth spectrum z _T (f) may be included.

When the power supply device controls the power supply voltage to an arbitrary target waveform, (i) the compensation current is injected into the power supply terminal from a path different from the main power supply, and / or (ii) the power supply flows from the main power supply to the load. A compensation circuit configured to draw the compensation current from the current into a path different from the load may be further provided. In addition to (i) the third waveform i _DUT (t) -i _DUT (0), (ii) the fifth waveform v _T (t), the waveform calculation unit (iii) the compensation current to be generated by the compensation circuit It may be possible to calculate the waveform. The waveform calculator deconvolves the second waveform z _A (t) with respect to the difference v _T (t) −v _A (t) between the fifth waveform v _T (t) and the first waveform v _A (t). A second deconvolution processing unit that calculates a sixth waveform i _CMP (t) describing the waveform of the compensation current by calculation may be further included.
According to this aspect, when the first waveform v _A (t), the second waveform z _A (t), and the fourth waveform z _T (t) are known, the fluctuation of the power supply voltage in the first environment in the second environment The waveform of the compensation current i _CMP necessary to emulate the fifth waveform v _T (t) that is a waveform can be calculated.

Another embodiment of the present invention is also a power supply device. The waveform calculation unit obtains a fifth waveform v _T (t) that is a waveform of the power supply voltage when a predetermined impedance fluctuation occurs in the load in the steady state of the first environment where the power supply voltage is stabilized by the target power supply. A fifth waveform acquisition unit to acquire and a fourth waveform z _T (t) that is an impulse response waveform of the power supply voltage with respect to the pulse current when a predetermined pulse current is supplied to the power supply line in the steady state of the first environment. The third waveform i _DUT (t) −i _DUT (0) is obtained by performing a deconvolution operation on the fourth waveform z _T (t) with respect to the fourth waveform acquisition unit to be acquired and the fifth waveform v _T (t). And a third deconvolution processing unit that calculates

According to this aspect, the third waveform i _DUT (t) −i _DUT (0) is used without using a current sensor in a situation where the fifth waveform v _T (t) and the fourth waveform z _T (t) are known. Can be calculated.

The fourth waveform acquisition unit obtains a fourth spectrum z _T (f) that is a spectrum of an impulse response waveform of the power supply voltage with respect to the pulse current when a predetermined pulse current is supplied to the power supply line in the steady state of the first environment. A fourth spectrum acquisition unit to be acquired and an inverse Fourier transform unit that calculates the fourth waveform z _T (t) by performing inverse Fourier transform on the fourth spectrum z _T (f) may be included.

In addition to (i) the third waveform i _DUT (t) -i _DUT (0), the waveform calculation unit (ii) in the steady state of the second environment where the power supply voltage is stabilized by the main power supply, The second waveform z _A (t), which is an impulse response waveform of the power supply voltage with respect to the pulse current when a predetermined pulse current is supplied to the pulse current, may be calculated. The waveform calculation unit obtains a first waveform v _A (t) that is a waveform of the power supply voltage when a predetermined impedance fluctuation occurs in the load in the steady state of the second environment in which the power supply voltage is stabilized by the main power supply. The first waveform acquisition unit and the third waveform i _DUT (t) −i _DUT (0) to be acquired are subjected to deconvolution operation of the first waveform V _A (t), thereby obtaining the second waveform z _A (t And a fourth deconvolution processing unit that calculates ().
According to this aspect, the second waveform z _A (t) is calculated in a situation where the fifth waveform v _T (t), the fourth waveform z _T (t), and the first waveform v _A (t) are known. Can do.

In addition to (i) the third waveform i _DUT (t) -i _DUT (0), the waveform calculation unit (ii) in the steady state of the second environment where the power supply voltage is stabilized by the main power supply, It may be possible to calculate the first waveform v _A (t) that is the waveform of the power supply voltage when a predetermined impedance variation occurs. The waveform calculation unit obtains a second waveform z _A (t) that is an impulse response waveform of the power supply voltage with respect to the pulse current when a predetermined pulse current is supplied to the power supply line in the steady state of the second environment. The waveform acquisition unit and a second convolution process for calculating the first waveform v _A (t) by performing a convolution operation on the third waveform i _DUT (t) -i _DUT (0) and the second waveform z _A (t). May further be included.
According to this aspect, in a situation where the fifth waveform v _T (t), the fourth waveform z _T (t), and the second waveform z _A (t) are known, the system including the target power supply and the load in the first environment A fifth waveform v _T (t), which is an impulse response, can be calculated.

When the power supply device controls the power supply voltage to an arbitrary target waveform, (i) the compensation current is injected into the power supply terminal from a path different from the main power supply, and / or (ii) the power supply flows from the main power supply to the load. A compensation circuit configured to draw the compensation current from the current into a path different from the load may be further provided. In addition to (i) the third waveform i _DUT (t) -i _DUT (0), (ii) the fifth waveform v _T (t), the waveform calculation unit (iii) the compensation current to be generated by the compensation circuit It may be possible to calculate the waveform. The waveform calculator deconvolves the second waveform z _A (t) with respect to the difference v _T (t) −v _A (t) between the fifth waveform v _T (t) and the first waveform v _A (t). A fifth deconvolution processing unit that calculates a sixth waveform i _CMP (t) describing the waveform of the compensation current by calculation may be further included.
According to this aspect, when one of the first waveform v _A (t) and the second waveform z _A (t), the fifth waveform v _T (t), and the fourth waveform z _T (t) are known, In the two environments, the waveform of the compensation current i _CMP required to emulate the fifth waveform v _T (t) that is the fluctuation waveform of the power supply voltage in the first environment can be calculated.

  Another aspect of the present invention relates to a test apparatus. The test apparatus includes any one of the power supply apparatuses described above that supplies a power supply voltage to a device under test that is a load.

  Note that any combination of the above-described constituent elements and the constituent elements and expressions of the present invention replaced with each other between methods and apparatuses are also effective as an aspect of the present invention.

  According to an aspect of the present invention, a load current can be acquired without using a current sensor.

It is a circuit diagram which shows the structure of the test apparatus which concerns on embodiment. It is a wave form diagram showing an example of load current i _DUT , power supply current i _DD , compensation current i _CMP, and source pulse current I _SRC . FIG. 3A is a circuit diagram illustrating the first waveform v _A (t), and FIG. 3B is a circuit diagram illustrating the second waveform v _T (t). The third is a circuit diagram for explaining the waveform _z A (t). The third is a waveform diagram illustrating the waveform _z A (t). FIGS. 6A and 6B are equivalent circuit diagrams of the power supply device 8 and the DUT 1. It is a block diagram which shows the structure of the compensation current waveform calculation part which calculates compensation current I _CMP (t). It is a block diagram which shows the structural example of the deconvolution process part using a Fourier transform. It is a block diagram which shows the structural example of the deconvolution process part using matrix operation. Figure 10 (a), (b) is a diagram showing a third waveform matrix _{z A.} It is a block diagram which shows another structural example of a deconvolution process part. It is a block diagram which shows the structural example of a 2nd waveform acquisition part. It is a block diagram which shows a part of structure of the compensation current waveform calculation part which concerns on a modification. FIG. 4 is a block diagram showing a configuration of a DUT having a plurality of power supply terminals and a plurality of power supply apparatuses that supply a power supply voltage to the DUT. It is a block diagram which shows the structure of the waveform calculating part which concerns on 2nd Embodiment. It is a block diagram which shows the modification of the waveform calculating part of FIG. It is a block diagram which shows the modification of the waveform calculating part of FIG. It is a block diagram which shows the structure of the waveform calculating part which concerns on 3rd Embodiment. It is a block diagram which shows the 1st modification of the waveform calculating part of FIG. It is a block diagram which shows the 2nd modification of the waveform calculating part of FIG.

  The present invention will be described below based on preferred embodiments with reference to the drawings. The same or equivalent components, members, and processes shown in the drawings are denoted by the same reference numerals, and repeated descriptions are omitted as appropriate. The embodiments do not limit the invention but are exemplifications, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

  In this specification, “the state in which the member A is connected to the member B” means that the member A and the member B are physically directly connected, or the member A and the member B are electrically connected. The case where it is indirectly connected through another member that does not affect the state is also included. Similarly, “the state in which the member C is provided between the member A and the member B” refers to the case where the member A and the member C or the member B and the member C are directly connected, as well as an electrical condition. It includes the case of being indirectly connected through another member that does not affect the connection state.

(First embodiment)
FIG. 1 is a circuit diagram showing a configuration of a test apparatus 2 according to the first embodiment. FIG. 1 shows a semiconductor device (hereinafter referred to as DUT) 1 to be tested in addition to a test apparatus 2.

The DUT 1 includes a plurality of pins, at least one of which is a power supply terminal P1 for receiving the power supply voltage V _DD , and at least one other is a ground terminal P2. A plurality of input / output (I / O) terminals P3 are provided to receive data from the outside or to output data to the outside, and at the time of testing, test signals (tests) output from the test apparatus 2 Pattern) S _TEST is received or data corresponding to the test signal S _TEST is output to the test apparatus 2. FIG. 1 shows a configuration for giving a test signal to the DUT 1 among the configurations of the test apparatus 2, and a configuration for evaluating a signal from the DUT 1 is omitted.

  The test apparatus 2 includes a power supply device 8, a pattern generator PG, a plurality of timing generators TG and a waveform shaper FC, and a plurality of drivers DR.

  The test apparatus 2 includes a plurality of n channels CH1 to CHn, some of which (CH1 to CH4) are allocated to the plurality of I / O terminals P3 of the DUT1. Although FIG. 1 shows a case where n = 6, the actual number of channels of the test apparatus 2 is on the order of hundreds to thousands.

The power supply device 8 may include a main power supply 10, a compensation circuit 12, a part of the pattern generator PG, drivers DR ₅ and ₆ , and interface circuits 4 ₅ and ₆ .

The main power supply 10 has an output terminal connected to the power supply terminal P1 of the DUT 1 that is a load via a power supply line, and outputs so that a detection value corresponding to the power supply voltage V _DD of the power supply terminal P1 approaches the target value. The output voltage _VOUT output from the terminal is feedback controlled. For example, the main power supply 10 is configured by a linear regulator, a switching regulator, or the like, and feedback-controls the power supply voltage V _DD supplied to the power supply terminal P1 so as to coincide with the target value V _REF . The capacitor Cs is provided to smooth the power supply voltage V _DD . The main power supply 10 generates a power supply voltage for other blocks inside the test apparatus 2 in addition to a power supply voltage for the DUT 1. An output current from the main power supply 10 to the power supply terminal P1 of the DUT 1 is referred to as a power supply current i _DD .

Since the main power supply 10 is a voltage / current source having a finite response speed, it may not be able to follow a sudden change in its load current, that is, the load current i _DUT of the _DUT 1. For example, when the load current i _DUT changes stepwise, the power supply voltage V _DD may overshoot or undershoot, or be accompanied by subsequent ringing. Variations in the power supply voltage V _DD prevent accurate testing of DUT 1. This is because when an error is detected in DUT 1, it cannot be distinguished whether it is due to defective manufacturing of DUT 1 or due to fluctuations in power supply voltage V _DD .

The compensation circuit 12 is provided to compensate for the response speed of the main power supply 10. The designer of the DUT 1 can estimate the time transition such as the operation rate of the internal circuit of the DUT 1 in a state where a certain known test signal S _TEST (test pattern S _PTN ) is supplied, so the load current i _{DUT of the DUT} 1 can be estimated. The time waveform can be accurately predicted. Here, the prediction includes calculation using computer simulation, actual measurement for devices having the same configuration, and the method is not particularly limited.

On the other hand, if the response speed (gain, feedback band) of the main power supply 10 is known, the power supply current i _DD or the power supply voltage V _DD generated by the main power supply 10 in response to the predicted load current i _DUT is also predicted. can do. Then, by compensating for the difference between the predicted load current i _DUT and the power source current i _DD supplied from the power source to be emulated by the compensation circuit 12, an arbitrary power source voltage waveform can be emulated.

A differential or integral relationship is established between the power supply voltage V _DD and the power supply current i _DD . Specifically, depending on whether the impedance of the main power supply 10 and the path from the main power supply 10 to the power supply terminal P1 is dominant, capacitive, inductive, or resistive, the relationship between voltage and current differentiation and integration Is determined.

The compensation circuit 12 includes a source current source 12b and a sink current source 12c. Each of the source current source 12b and the sink current source 12c includes a switch using, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), and each is controlled in accordance with the control signals _SCNT1 and _SCNT2 .

When the source current source 12b is turned on in response to the control signal _SCNT1 , a compensation pulse current (also referred to as source pulse current) I _SRC is generated. The compensation circuit 12 injects the source pulse current I _SRC into the power supply terminal P1 from a different path from the main power supply 10. Sink current source 12c is provided between another fixed voltage terminal (for example, ground terminal) and power supply terminal P1 of DUT1. When the sink current source 12c is turned on in response to the control signal _{S CNT2,} the compensation pulse current _{I SINK} (also referred to as a sink pulse current) is generated. Compensation circuit 12 draws from the power supply current _{i DD} flowing into the power source terminal P1, the sync pulse current _{I SINK,} a separate path from the DUT1.

The following equation is established from the current conservation law among the load current i _DUT flowing into the power supply terminal P1 of the DUT 1, the power supply current i _DD output from the main power supply 10 and the compensation current i _CMP output from the compensation circuit 12.
i _DUT = i _DD + i _CMP
i _CMP = I _SRC -I _SINK
That is, the positive component of the compensation current _{i CMP} is supplied from the source current source 12b as the source pulse current _{I SRC,} negative components of compensation current _{i CMP} is supplied from the sink current source 12c as a sink pulse current _{I SINK} .

Of the driver _DR 1 _{~DR 6,} the driver DR ₆ is assigned to the source current source 12b, the driver DR ₅ are assigned to the sink current source 12c. The other at least one driver DR _{1 to} DR ₄ is assigned to at least one I / O terminal P 3 of the DUT 1.

The waveform shaper FC and the timing generator TG are collectively referred to as an interface circuit 4. The plurality of 4 ₁ to 4 ₆ are provided for each of the channels CH _{1 to} CH ₆ , in other words, for each of the drivers DR ₁ to DR ₆ . The i-th (1 ≦ i ≦ 6) interface circuit 4 _{i shapes the} input pattern signal S _PTNi into a signal format suitable for the driver DR, and outputs it to the corresponding driver DR _i .

The pattern generator PG generates a pattern signal _SPTN for the interface circuits 4 ₁ to 4 ₆ based on the test program. Specifically, for the drivers DR _{1 to} DR ₄ assigned to the I / O terminal P3 of the DUT 1, the pattern generator PG tests the test pattern S _PTNi that describes the test signal S _TEST that each driver DR _i should generate. Is output to the interface circuit 4 _i corresponding to the driver DR _i . The test pattern S _PTNi includes data indicating the level in each cycle (unit interval) of the test signal S _TEST and data describing the timing at which the signal level transitions.

The pattern generator PG generates a compensation control pattern _{SPTN_CMP} determined according to the necessary compensation current i _CMP . Control pattern _{S PTN_CMP} includes a control pattern _{S PTN_CMP1} describing a control signal _{S CNT1} to be generated driver DR ₆ which is assigned to the source current source 12b is sink current source 12c to the assigned driver DR ₅ is controlled to be generated A control pattern S _{PTN_CMP2} describing the signal S _CNT2 is included. Each of the control patterns S _{PTN_CMP1} and S _{PTN_CMP2} includes data designating on / off states of the source current source 12b and the sink current source 12c in each cycle, and data describing timing for switching on / off.

The pattern generator PG generates control patterns S _{PTN_CMP1} and S _{PTN_CMP2} that can compensate for the test patterns S _{PTN1 to} S _PTN4 , that is, according to the variation of the load current of the DUT 1, and the corresponding interface circuit 4 _6. 4 and ₅ are output.

As described above, if the test patterns S _{PTN1 to} S _PTN4 are known, the time waveform of the load current i _DUT of the _DUT 1 can be predicted, and the compensation current i _CMP that should be generated to keep the power supply voltage V _DD constant, ie, The time waveforms of I _SRC and I _SINK can be calculated.
If the predicted load current i _DUT is greater than the power supply current i _DD , the compensation circuit 12 generates a source compensation current I _SRC to compensate for the insufficient current. Since the current waveform required for the source compensation current I _SRC can be predicted, the source current source 12b is controlled so that it can be appropriately obtained. For example, the source current source 12b may be controlled by pulse width modulation. Alternatively, pulse amplitude modulation, ΔΣ modulation, pulse density modulation, pulse frequency modulation, or the like may be used.

FIG. 2 is a waveform diagram showing an example of the load current i _DUT , the power supply current i _DD , the compensation current i _CMP, and the source pulse current I _SRC . It is assumed that the load current i _{DUT of the DUT} 1 to which a certain test signal S _TEST is supplied increases stepwise. In response to this, the power supply current i _DD is supplied from the main power supply 10, but it does not become an ideal step waveform due to the limitation of the response speed, and the current to be supplied to the DUT 1 is insufficient. As a result, unless the compensation current I _SRC is supplied, the power supply voltage V _DD decreases as shown by a broken line.

The compensation circuit 12 generates a source compensation current i _CMP corresponding to the difference between the load current i _DUT and the power supply current i _DD . The source compensation current i _CMP is given by a source pulse current I _SRC generated according to the control signal S _CNT1 . The source compensation current i _CMP needs to be the maximum amount immediately after the load current i _DUT changes, and then needs to be gradually reduced. Therefore, for example, the required source compensation current i _CMP can be generated by reducing the on-time (duty ratio) of the source current source 12b with time using PWM (pulse width modulation).

When all the channels of the test apparatus 2 operate synchronously according to the test rate, the cycle of the control signal _{SCNT1 is} the cycle of data supplied to the DUT 1 (unit interval), an integral multiple thereof, or a fraction of an integer. Equivalent to. For example, in the unit interval is 4ns system control if the period of the signal _{S CNT1} is 4ns, each pulse of the ON period _{T ON} contained in the control signal _{S CNT1} is, can be adjusted between 0～4Ns. The response speed of the main power source 10 is on the order of a few hundred ns~ number .mu.s, the waveform of the compensation current i _CMP can be controlled by hundreds of pulses contained in the control signal S _CNT1. A method of deriving the control signal _SCNT1 necessary for generating the source compensation current I _{SRC from} the waveform will be described later.

On the contrary, when the load current i _DUT is smaller than the power supply current i _DD , the compensation circuit 12 generates the sink pulse current I SINK so as to obtain the sink compensation current i _CMP , and _draws out the excessive current.

By providing the compensation circuit 12, it is possible to compensate for the lack of response speed of the main power supply 10 and to keep the power supply voltage V _DD constant as shown by the solid line in FIG. Alternatively, as described below, an arbitrary power supply characteristic can be obtained by emulating an arbitrary power supply characteristic.

  The above is the basic configuration of the test apparatus 2. Next, emulation of arbitrary power supply characteristics will be described. Hereinafter, a virtual power source having an arbitrary characteristic to be emulated is referred to as a target power source 11.

FIG. 3A is a circuit diagram illustrating the first waveform v _A (t), and FIG. 3B is a circuit diagram illustrating the second waveform v _T (t). Z _PS is the impedance of the main power source _{10, Z DUT} indicates the impedance of DUT1. As shown in FIG. 3A, the compensation circuit 12 is not operated, the power supply voltage is supplied to the DUT 1 only by the main power supply 10, and the power supply voltage V _DD is stabilized to the predetermined target value V _REF. think of. When the DUT 1 operates in a predetermined sequence in this steady state and the impedance Z _{DUT of the DUT} 1 fluctuates, the feedback of the main power supply 10 cannot follow the fluctuation of the impedance Z _DUT , and the power supply voltage V _DD fluctuates. The fluctuation waveform of the power supply voltage at this time, that is, the difference between the power supply voltage waveform when the impedance fluctuation occurs and the power supply voltage waveform when the impedance fluctuation does not occur is referred to as a first waveform v _A (t).

As shown in FIG. 3B, consider a steady state in which a power supply voltage is supplied to the DUT 1 by a virtual target power supply 11 instead of the main power supply 10 and the power supply voltage V _DD is stabilized at a target value V _REF . The impedance of the target power supply 1 is denoted as Z _TGT . In this steady state, when the impedance Z _{DUT of the DUT} 1 varies, the power supply voltage V _DD varies. The fluctuation waveform of the power supply voltage at this time is a target waveform to be emulated, and is hereinafter referred to as a second waveform v _T (t). When the target power supply 11 is an ideal power supply, the second waveform v _T (t) is a constant voltage.

The power supply device 8 according to the present embodiment optimizes the waveform of the compensation current i _CMP generated by the compensation circuit 12 during the actual operation, thereby _converting the waveform of the power supply voltage V _DD into an arbitrary second waveform v _T Approach (t).

Hereinafter, a technique for deriving a waveform of the compensation current i _CMP required for emulating an arbitrary power supply characteristic will be described.

FIG. 4 is a circuit diagram illustrating the third waveform z _A (t). FIG. 5 is a waveform diagram illustrating the third waveform z _A (t).
When the compensation circuit 12 is stopped and the power supply voltage V _DD is supplied from the main power supply 10 to the DUT 1 and a predetermined impedance fluctuation occurs in the DUT 1, the power supply voltage V _DD fluctuates according to the first waveform V _A (t). . The control system including a main power source 10 and DUT1, when injected pulse current _{I P} at time _{t i,} the power supply voltage _{V DD,} the first waveform _V A (t) different waveforms _{V A} '(t) It becomes. In this case, change in the power supply voltage _{V DD} caused by the pulse current _{I P,} i.e. the impulse response _z A (t) is given by the difference between the waveforms _{V A} '(t) and _V A (t). Hereinafter, this impulse response z _A (t) is referred to as a third waveform. It should be noted that the third waveform z _A (t) has a different waveform depending on the impedance Z _DUT of the _DUT 1, in other words, depending on the time t _i at which the pulse current _IP is supplied.

The fifth waveform z _T (t) is also defined in the same manner as the third waveform z _A (t). That is, when the main power supply 10 is replaced with the target power supply 11 and the pulse current I _P is supplied to a node to which the compensation circuit 12 is connected at a certain time ti, the power supply voltage V _DD caused by the pulse current I _P The fluctuation is the fifth waveform z _T (t).

In the embodiment, it is assumed that the system is linear, and the theory of superposition holds. Thus, for example, if the amplitude of the pulse current _{I P} is a K times (K is an arbitrary real number), the third waveform _z A (t), the amplitude of variation of the fifth waveform _z T (t) becomes K times.

When the combined impedance of the parallel circuit of DUT 1 and main power supply 10 can be considered constant regardless of the impedance variation of DUT 1, the third waveform z _A (t) and the fifth waveform z _T (t) _The waveform is the same regardless of the time t _{i at} which _P is supplied. For example, this assumption is satisfied when the impedance of DUT 1 is sufficiently higher than the impedance of main power supply 10. In this case, the third waveform z _A (t) and the fifth waveform z _T (t) may each be obtained as an impulse response in a state where the DUT 1 is not operated.

Returning to FIG. The first waveform v _A (t) is given by Equation (5a) using the third waveform z _A (t) and the load current i _DUT (t). Here, “*” indicates a convolution operator.
v _A (t) = V _REF −i _DUT (t) * z _A (t) (5a)

Similarly, referring to FIG. 3B, the second waveform v _T (t) is given by the equation (5b) using the fifth waveform z _T (t) and the load current i _DUT (t).
v _T (t) = V _REF −i _DUT (t) * z _T (t) (5b)

FIGS. 6A and 6B are equivalent circuit diagrams of the power supply device 8 and the DUT 1. When the DUT 1 operates according to the test pattern S _TEST , the impedance Z _DUT varies with time, and as a result, the load current i _DUT (t) also varies with time.

As shown in FIG. 6B, the waveform of the power supply voltage fluctuation when the unit pulse current _IP is supplied to the parallel circuit of the main power supply 10 and DUT 1 is z _A (t). When the impedance of the compensation circuit 12 is sufficiently high, the waveform v (t) of the power supply voltage when the compensation current i _CMP (t) is supplied by the compensation circuit 12 is given by Expression (6).
v (t) = V _REF −i _DUT (t) * z _A (t) + i _CMP (t) * z _A (t) (6)

In order to emulate an arbitrary power supply characteristic, it is sufficient that v (t) given by Expression (6) is equal to the second waveform v _T (t) that is the target waveform given by Expression (5b).
V _REF −i _DUT (t) * z _T (t) = V _REF −i _DUT (t) * z _A (t) + i _CMP (t) * z _A (t) (7)

Generating the compensation current i _CMP (t) satisfying the equation (7) is a necessary condition for emulating an arbitrary power supply characteristic.

When formula (7) is transformed, formula (8) is obtained.
i _CMP (t) * z _A (t) = v _T (t) −v _A (t) (8)

That is, the compensation current i _CMP (t) can be obtained by deconvolution of the impulse response z _A (t) with respect to v _T (t) −v _A (t).

The above is the method for deriving the compensation current i _CMP (t) in the power supply device 8. Next, the configuration of the power supply device 8 will be described.

FIG. 7 is a block diagram illustrating a configuration of the compensation current waveform calculation unit 100 that calculates the compensation current I _CMP (t). The compensation current waveform calculation unit 100 is configured as a part of the pattern generator PG of FIG. The compensation current waveform calculation unit 100 may be configured by an electronic computer such as a personal computer or a workstation. In this case, the electronic computer that is the compensation current waveform calculation unit 100 may perform part of the processing for calculating the compensation current i _CMP (t) in real time during the emulation operation. Alternatively, prior to the emulation operation, the compensation current i _CMP (t) is calculated in advance, and the data indicating the waveform of the compensation current i _CMP (t) or the control pattern _{SPTN_CMP} is stored in the pattern memory provided in the pattern generator PG. You may store in.

The pattern generator PG includes a compensation current waveform calculation unit 100 and a pulse modulator 110. The compensation current waveform calculation unit 100 calculates the compensation current i _CMP (t). The pulse modulator 110 receives data describing the compensation current i _CMP (t) to be generated by the compensation circuit 12, and generates a control pattern S _{PTN_CMP1} and 2 by _performing pulse modulation on the data. Here, the pulse modulation may include pulse amplitude modulation, pulse width modulation, pulse density modulation, other pulse modulations, and combinations thereof.

The compensation current waveform calculation unit 100 includes a first waveform acquisition unit 102, a second waveform acquisition unit 104, a third waveform acquisition unit 106, and a deconvolution processing unit 108.
The first waveform acquisition unit 102 acquires the first waveform v _A (t) described above. The first waveform v _A (t) is a fluctuation waveform of the power supply voltage when the impedance of the load is fluctuated in a state where the compensation circuit 12 is stopped and the main power supply 10 supplies the power supply voltage V _DD to the load DUT 1. It is.

The second waveform acquisition unit 104 acquires a second waveform v _T (t) that is a target waveform of the power supply voltage to be emulated. The third waveform acquisition unit 106 acquires the third waveform z _A (t). Third waveform z _A as described above _(t), when supplying the power supply voltage V _DD to DUT1 by the main power source 10, when the compensation circuit 12 supplies a predetermined pulse current I _P to the node to be connected It is an impulse response waveform.

  The first waveform acquisition unit 102, the second waveform acquisition unit 104, and the third waveform acquisition unit 106 may acquire each waveform by arithmetic processing, or may read a waveform measured in advance from a memory.

The deconvolution processing unit 108 applies the third waveform z _A (t) to the difference v _T (t) −v _A (t) between the second waveform v _T (t) and the first waveform v _A (t). A fourth waveform i _CMP (t) describing the waveform of the compensation current i _CMP is calculated by performing a deconvolution operation.

  The above is the configuration of the compensation current waveform calculation unit 100.

  Although the algorithm of the deconvolution process by the deconvolution processing unit 108 is not particularly limited, for example, a blind deconvolution method, a Fourier transform, or a matrix operation may be used.

FIG. 8 is a block diagram illustrating a configuration example of the deconvolution processing unit 108a using Fourier transform. The deconvolution processing unit 108a includes a Fourier transform unit 112, a fourth spectrum generation unit 114, and an inverse Fourier transform unit 116.
The Fourier transform unit 112 performs a first spectrum V _A (f) and a second spectrum V obtained by Fourier transforming the first waveform v _A (t), the second waveform v _T (t), and the third waveform z _A (t). _T (f), a third spectrum Z _A (f) is generated. The fourth spectrum generation unit 114 generates a fourth spectrum I _CMP ( _CMP ) (1) based on the first spectrum V _A (f), the second spectrum V _T (f), and the third spectrum Z _A (f). f) is generated.
I _CMP (f) = {V _T (f) −V _A (f)} / Z _A (f) (1)

The inverse Fourier transform unit 116 generates a fourth waveform i _CMP (t) that describes the waveform of the compensation current i _{CMP by performing} an inverse Fourier transform on the fourth spectrum I _CMP (f).

According to the deconvolution processing unit 108a, the fourth waveform i _CMP (t) can be generated by Fourier transform and inverse transform. The Fourier transform unit 112 and the inverse Fourier transform unit 116 may perform fast Fourier transform and inverse fast Fourier transform, respectively.

  FIG. 9 is a block diagram illustrating a configuration example of the deconvolution processing unit 108b using matrix calculation. The deconvolution processing unit 108b includes a first waveform matrix generation unit 120, a second waveform matrix generation unit 122, a third waveform matrix generation unit 124, an inverse matrix generation unit 126, a fourth waveform matrix generation unit 128, and a fourth waveform generation unit. 130 is included.

First waveform matrix generator 120, based on the first waveform _v A (t), 1 rows and N columns (N is an integer of 2 or more) for generating a first waveform matrix _{v A} of. The first waveform matrix v _A includes, as elements, values v _A [0], v _A [1]..., V _A [N−1] of the first waveform v _A (t) at discrete N times. .

Second waveform matrix generating unit 122, based on the second waveform _v T (t), to generate a second waveform matrix _{v T} of one row and N columns. The second waveform matrix v _T includes the values v _T [0], v _T [1]..., V _T [N−1] of the second waveform v _T (t) at discrete N times as elements. .

Third waveform matrix generator 124 generates a third waveform matrix _{z A} of N rows and N columns. The i-th row (1 ≦ i ≦ N) of the third waveform matrix z _A is discrete from the third waveform z _{A, i−1} (t) when the pulse current _IP is supplied at time (i−1). Values Z _{A, i-1} [0], z _{A, i-1} [1]..., Z _{A, i-1} [N-1] sampled at N times. Figure 10 (a), (b) is a diagram showing a third waveform matrix _{z A.}

When the impedance of the load DUT 1 is sufficiently higher than the impedance of the power supply device 8, their combined impedance can be approximated to be equal to the impedance of the power supply device 8. In this case, the impulse response waveform z _A (t) with respect to the pulse current I _P of the power supply voltage V _DD does not depend on the timing of supplying the pulse current I _P.
In this case, as shown in FIG. 10B, the row vector of the i-th row (1 ≦ i ≦ N) of the third waveform matrix z _A is 1 in the column direction. The waveform can be shifted by the element.

Returning to FIG. The inverse matrix generation unit 126 generates an inverse matrix z _A ⁻¹ of the third waveform matrix z _A. The fourth waveform matrix generator 128, a fourth waveform matrix _{i CMP} of one row and N columns describing the waveform of the compensation current _{i CMP,} produced by the matrix operation of equation (2).
_{i CMP = [v T -v A} ] [z A -1] ... (2)

The fourth waveform generation unit 130 converts the fourth waveform matrix i _CMP into a fourth waveform i _CMP (t).

According to the deconvolution processing unit 108b, the fourth waveform i _CMP (t) can be generated by matrix calculation.

The first waveform matrix v _A , the second waveform matrix v _T , the third waveform matrix z _A , and the fourth waveform matrix i _CMP have 1 row N columns, 1 row N columns, N rows N columns, 1 rows N columns, respectively. It is not limited to a matrix. The first waveform matrix v _A , the second waveform matrix v _T , the third waveform matrix z _A , and the fourth waveform matrix i _CMP have 1 row N columns, 1 row N columns, M rows N columns, and 1 rows M columns, respectively. It may be a matrix. At this time, since the third waveform matrix _{z A} is not a square matrix, the inverse matrix of _{^{z A} [z A} ^-1] is not determined. In this case, the inverse matrix [z _A ⁻¹ ] may be obtained as a generalized inverse matrix of z _A (or called a pseudo inverse matrix), and the equation (2) may be calculated.

If z _A is not a square matrix, N = k × M is desirable. When the impedance of the load DUT1 is sufficiently higher than the impedance of the power supply device 8, the first waveform matrix v _A , the second waveform matrix v _T , the third waveform matrix z _A , and the fourth waveform matrix i _CMP are It is desirable that there are 1 row (k × M) column, 1 row (k × M) column, M row (k × M) column, and 1 row and M column, respectively. k is a natural number. In this case, the row vector of the i-th row (1 ≦ i ≦ M) of the third waveform matrix z _A shown in FIG. 10B is equal to the row vector of the (i−1) -th row by k elements in the column direction. It may be a shifted waveform.

Note that k may be a non-integer. When the impedance of the load DUT 1 is sufficiently higher than the impedance of the power supply device 8, the row vector of the i-th row (1 ≦ i ≦ N) of the third waveform matrix z _A is the (i−1) -th row. A waveform obtained by shifting the row vector by k ′ elements in the column direction may be used. k ′ is an integer adjacent to k. Alternatively, a waveform shifted by k elements may be generated by interpolation processing.

FIG. 11 is a block diagram illustrating another configuration example of the deconvolution processing unit 108c. The deconvolution processing unit 108 c includes a fifth waveform acquisition unit 132, a load current acquisition unit 134, a Fourier transform unit 136, a sixth waveform generation unit 138, and a fourth waveform generation unit 140.
The fifth waveform acquisition unit 132 acquires the fifth waveform z _T (t). As shown in FIG. 4B, the fifth waveform z _T (t) is generated by the compensation circuit 12 when the target power supply 11 to be emulated supplies the power supply voltage V _DD to the DUT 1 instead of the main power supply 10. It is an impulse response waveform of the power supply voltage V _DD with respect to the pulse current I _P when a predetermined pulse current I _P is supplied to the node to be connected. The load current acquisition unit 134 acquires the load current i _DUT (t) when the impedance variation occurs in the DUT 1.

The Fourier transform unit 136 generates the third spectrum Z _A (f) and the fifth spectrum Z _T (f) by performing Fourier transform on the third waveform z _A (t) and the fifth waveform z _T (t), respectively. To do. The sixth waveform generation unit 138 generates the sixth waveform A (t) by performing inverse Fourier transform on Z _T (f) / Z _A (f). The fourth waveform generation unit 140 generates a fourth waveform i _CMP (t) given by Expression (3) based on the sixth waveform A (t) and the load current i _DUT (t). “*” Indicates a convolution operator.
i _CMP (t) = A (t) * i _DUT (t) −i _DUT (t) (3)

According to the deconvolution processing unit 108c, the fourth waveform i _CMP (t) can be generated by Fourier transform and convolution calculation.

  FIG. 12 is a block diagram illustrating a configuration example of the second waveform acquisition unit 104. The second waveform acquisition unit 104 includes a fifth waveform acquisition unit 132, a load current acquisition unit 134, and a calculation unit 142.

The fifth waveform acquisition unit 132 and the load current acquisition unit 134 are the same as those in FIG. The computing unit 142 generates the second waveform v _T (t) given by Expression (4) based on the target value V _REF , the fifth waveform z _T (t), and the load current i _DUT (t).
v _T (t) = V _REF −i _DUT (t) * z _T (t) (4)
“*” Indicates a convolution operator. Thereby, when the characteristics of the target power supply 11 are known, the second waveform v _T (t) for various waveforms of the load current I _DUT can be calculated.

  Although the present invention has been described based on the embodiments, the embodiments merely show the principle and application of the present invention, and the embodiments depart from the idea of the present invention defined in the claims. Many modifications and changes in the arrangement are allowed within the range not to be performed.

(Modification 1)
Since the actual power supply 8 has non-linearity, a part of the arithmetic processing by the power supply 8 by the compensation current waveform calculation unit 100 is performed on the assumption that the system is linear. Therefore, the waveform v _E (t) of the power supply voltage V _DD when the compensation current i _CMP corresponding to the fourth waveform i _CMP (t) is supplied from the compensation circuit 12 is the second waveform v _T (t ) Does not completely match, and an error ΔV is generated. This problem can be solved by the following modification.

FIG. 13 is a block diagram illustrating a part of the configuration of the compensation current waveform calculation unit 100a according to the modification. In FIG. 13, blocks that overlap with FIG. 7 are omitted. The compensation current waveform calculation unit 100a further includes a seventh waveform acquisition unit 150 and an error calculation unit 152 in addition to the configuration of FIG. The seventh waveform acquisition unit 150 calculates a seventh waveform v _E (t) that is a fluctuation waveform of the power supply voltage when the compensation circuit 12 supplies the compensation current _ICMP described by the fourth waveform i _CMP (t). To do. The seventh waveform v _E (t) can be calculated from Equation (6).

The error calculator 152 calculates an error ΔV (t) between the seventh waveform v _E (t) and the second waveform v _T (t). The compensation current waveform calculation unit 100 recursively calculates the fourth waveform i _CMP (t) so that the error approaches zero.

  According to this modification, the fluctuation waveform of the power supply voltage when the compensation circuit 12 is operated can be made closer to the target waveform.

(Modification 2)
In the embodiment, the case where the compensation circuit 12 includes the source current source 12b and the sink current source 12c has been described. However, the present invention is not limited to this, and only one of the configurations may be employed. When only the source current source 12b is provided, a steady current _IDC is generated in the source current source 12b. When the power supply current i _DD is insufficient with respect to the load current i _DUT , the current I _SRC generated by the source current source 12b is relatively increased from the steady current I _DC . On the other hand, when the power supply current i _DD is excessive with respect to the load current i _DUT , the current I _SRC generated by the source current source 12b is relatively decreased from the steady current I _DC .
When only the sink current source 12c is provided, a steady current _IDC is generated in the sink current source 12c. When the power supply current _{i DD} is insufficient with respect to the load current _{i DUT} is the current _{I SINK} of the current sink 12c occurs, relatively reduce the steady current _{I DC.} Conversely, when the power supply current _{i DD} is excessive relative to the load current _{i DUT} is the current _{I SINK} of the current sink 12c is generated, to relatively increase the steady-state current _{I DC.}
Thus, the current consumption of the entire test device is increased steady current I _DC component therewith in exchange for, only a single switch, the compensation current I _SRC, it is possible to generate I _SINK.

(Modification 3)
In the embodiment, the case where the power supply device 8 including the main power supply 10, the compensation circuit 12, and the compensation current waveform calculation unit 100 is used for the test device has been described. However, the present invention is not limited to this, and any device can be used. Can be used. For example, the power supply device 8 according to the embodiment may be used as a power supply device used in the actual use state of the DUT 1.

(Modification 4)
In the embodiment, the case where the compensation circuit 12 generates the compensation current i _CMP as a pulse current has been described. However, the compensation current i _CMP may be a continuous current.

(Modification 5)
In the embodiment, the case of dynamically controlling the voltage of a single node has been described. However, the present invention is not limited to this, and can be applied to the case of controlling the voltage of a plurality of nodes.
FIG. 14 is a block diagram illustrating a configuration of a DUT 1 having a plurality of power supply terminals and a plurality of power supply devices that supply a power supply voltage to the DUT 1. The DUT 1 includes two power supply terminals P1 _{[1] and [2]} . The output terminal of the first power supply 8 _[1] is connected to the power supply terminal P1 _[1] via the power supply line, and the output voltage _VDD is controlled by feedback control so that the voltage V _{DD1 of the} power supply terminal approaches the target value _VREF1. Adjust _OUT1 . Similarly, the output terminal of the second power supply device 8 _[2] is connected to the power supply terminal P1 _[2] via the power supply line, and feedback control is performed so that the voltage V _{DD2 of the} power supply terminal approaches the target value _VREF2. Adjust the output voltage _VOUT2 .

In this modification, by controlling the compensation currents i _CMP1 and i _CMP2 generated by the compensation circuits 12 _[1] and 12 _[2] , the power supply voltages V _DD1 and V _DD2 are set to the second waveform v that is an arbitrary target waveform. It is made to coincide with _T1 (t) and v _T2 (t).

Consider a steady state in which the compensation circuits 12 _[1] and 12 _[2] are stopped and the two power supply voltages V _DD1 and V _DD2 are stabilized to the target values V _REF1 and V _REF2 , respectively. In this state, the fluctuation waveforms of the two power supply voltages V _DD1 and V _DD2 when the impedance of the DUT 1 fluctuates are _denoted by v _A1 (t) and v _A2 (t). This corresponds to the first waveform v _A (t) in the embodiment.

Two power supply voltages when the unit pulse current _IP is supplied from the compensation circuit 12 _[1] in a steady state where the two power supply voltages V _DD1 and V _DD2 are stabilized to the target values V _REF1 and V _REF2 , respectively. The fluctuation waveforms of V _DD1 and V _DD2 are assumed to be z _A11 (t) and z _A12 (t).
Similarly, in a steady state, when the unit pulse current _IP is supplied from the compensation circuit 12 _[2] , the fluctuation waveforms of the two power supply voltages V _DD1 and V _DD2 are expressed as z _A21 (t) and z _A22 (t). And z _A11 (t), z _A12 (t), z _A21 (t), and z _A22 (t) correspond to the third waveform z _A (t) in the embodiment.

Fluctuation waveforms v ₁ (t) and v ₂ of the power supply voltages V _DD1 and V _DD2 when arbitrary compensation currents i _CMP1 (t) and i _CMP2 (t) are supplied from the compensation circuits 12 _[1] and 12 _[2]. (T) is given by equations (9) and (10), respectively, by the superposition principle.
v ₁ (t) = v _A1 (t) + i _CMP1 (t) * z _A11 (t) + i _CMP2 (t) * z _A12 (t)
... (9)
v ₂ (t) = v _A2 (t) + i _CMP1 (t) * z _A21 (t) + i _CMP2 (t) * z _A22 (t)
(10)

Substituting v ₁ (t) = v _T1 (t) and v ₂ (t) = v _T2 (t) into equations (9) and (10) yields equations (11) and (12).
v _T1 (t) −v _A1 (t) = i _CMP1 (t) * z _A11 (t) + i _CMP2 (t) * z _A12 (t) (11)
v _T2 (t) −v _A2 (t) = i _CMP1 (t) * z _A21 (t) + i _CMP2 (t) * z _A22 (t) (12)

According to this modified example, i _CMP1 (t) and i _CMP2 (t) are unknowns, and the simultaneous equations (11) and (12) are solved to make the two power supply voltages V _DD1 and V _DD2 have arbitrary waveforms. can do.

(Second Embodiment)
In the second embodiment, acquisition of a power supply current waveform in an actual operating environment that does not depend on a current sensor will be described.

First, the correspondence between waveforms in the first embodiment and the second and third embodiments will be described.
First Embodiment Second and Third Embodiments v _A (t) First waveform First waveform v _T (t) Second waveform Fifth waveform z _A (t) Third waveform Second waveform i _CMP (T) Fourth waveform Sixth waveform z _T (t) Fifth waveform Fourth waveform i _DUT (t) Load current Third waveform

As shown in FIG. 1, the power supply device 8 according to the second embodiment also supplies the power supply voltage V _DD to the DUT 1 that is a load. In the actual operating environment (first environment), the DUT 1 operates by receiving a power supply voltage from a target power supply (11) (not shown). The DUT 1 operates in response to the power supply voltage V _DD from the main power supply 10 (and the compensation circuit 12) in the test environment (second environment).

The power supply device 8 includes a waveform calculation unit in addition to the main power supply 10. As shown in FIG. 1, the output terminal of the main power supply 10 is connected to the power supply terminal P1 of the DUT 1 via a power supply line. The main power supply 10 performs feedback control of the output voltage _VOUT output from the output terminal so that the detection value corresponding to the power supply voltage V _DD of the power supply terminal P1 approaches a predetermined target value.

In the actual operating environment, in a steady state where the power supply voltage V _DD is stabilized by the target power supply, if a predetermined impedance fluctuation occurs in the DUT 1, the power supply voltage V _DD is fluctuated. Similarly, even in the test environment, when a predetermined impedance fluctuation occurs in the DUT 1 in a steady state where the power supply voltage V _DD is stabilized by the main power supply, the power supply voltage V _DD is fluctuated.

As the power supply voltage V _DD varies, the load current I _DUT flowing through the DUT 1 also varies. The waveform calculation unit described in the second embodiment includes a third waveform i _DUT (t) -i _DUT that is a waveform of an alternating current component of the load current i _DUT that flows through the DUT 1 when a predetermined impedance variation occurs in the DUT 1. (0) is calculated by an arithmetic process without using a current sensor.

  FIG. 15 is a block diagram illustrating a configuration of the waveform calculation unit 200 according to the second embodiment. The waveform calculation unit 200 constitutes a part of the power supply device 8 of the test apparatus 2 together with the main power supply 10.

The waveform calculation unit 200 includes a first waveform acquisition unit 202, a second waveform acquisition unit 206, and a first deconvolution processing unit 210.
First waveform obtaining unit 202, first in the steady state of the test environment supply voltage V _DD is stabilized by the main power supply 10 is a waveform of the power supply voltage V _DD when a predetermined impedance variation occurs in the DUT1 1 _A waveform v _A (t) is acquired. The first waveform acquisition unit 202 corresponds to the first waveform acquisition unit 102 in the first embodiment.

The second waveform acquisition unit 206 is a second waveform z _A that is an impulse response waveform of the power supply voltage V _DD with respect to the pulse current I _P when a predetermined pulse current I _P is supplied to the power supply line in a steady state of the test environment. (T) is acquired. The second waveform acquisition unit 206 corresponds to the third waveform acquisition unit 106 in the first embodiment.

The first deconvolution processing unit 210 performs a deconvolution operation on the second waveform z _A (t) with respect to the first waveform v _A (t), whereby the third waveform i _DUT (t) −i _DUT ( 0) is calculated. i _DUT (0) is an initial value of the load current i _DUT (0) at time t = 0 when the impedance variation starts.

The above is the configuration of the waveform calculation unit 200. Next, the principle will be described.
Please refer to FIG. Current source for generating a pulse current I _P, i.e. the compensation circuit 12, and is sufficiently faster than the main power supply 10. In all the time t, the AC component _v T (t) = 0 of the target waveform of the power supply voltage _{V DD,} that is, the compensation current _{i CMP} the power supply voltage _{V DD} is calculated under conditions not changed (t) is It is equal to the alternating current component i _DUT (t) −i _DUT (0) of the load current flowing through DUT 1. This is because the fluctuation of the power supply voltage becomes zero when a current is injected from the outside by an amount corresponding to the fluctuation of the load current.

That is, in the equation (8), i _CMP (t) obtained when v _T (t) = 0 is equivalent to i _DUT (t) −i _DUT (0), and thus the equation (8a) is obtained. .
{I _DUT (t) −i _DUT (0)} * z _A (t) = − v _A (t) (8a)

Therefore, the third waveform i, which is the fluctuation waveform of the load current, is obtained by deconvolution of the second waveform z _A (t) that is the impulse response with respect to the waveform obtained by inverting the sign of the first waveform v _A (t). _DUT (t) -i _DUT (0) can be calculated.

That is, the processing of the first deconvolution processing unit 210 of the waveform calculation unit 200 of FIG. 15 is performed by the deconvolution processing unit 108 when v _T (t) = 0 in the compensation current waveform calculation unit 100 of FIG. It is equivalent to processing.

In the conventional architecture, in order to detect the waveform of the load current i _DUT , it is necessary to insert a current sensor on the path. However, since the impedance of the system is disturbed by the current sensor, it depends on the presence or absence of the current sensor. The load current i _DUT is different, and it is often difficult to measure the accurate load current i _DUT . According to the waveform calculation unit 200 of FIG. 15, it is possible to calculate the fluctuation waveform of the load current i _DUT without using a current sensor.

  For example, the waveform calculation unit 200 of FIG. 15 may be used as the load current acquisition unit 134 of FIG. 12 of the first embodiment.

  The waveform calculation unit 200 is not limited to the case where the compensation circuit 12 is faster than the main power supply 10, but can be applied to the case where the response speed is comparable to that of the main power supply 10. At first glance, when the main power supply 10 is somewhat fast, it seems that a part of the high frequency component of the load current flowing in the DUT 1 is supplied by the main power supply 10 itself, making it impossible to measure the load current correctly. Absent. This is because, in the measurement process, a calculation for obtaining a setting condition of a current source in which the fluctuation in the supply current from the main power supply 10 is zero has been performed, and it is a precondition in the present embodiment that the main power supply 10 is low speed. is not.

Further, the compensation circuit 12 can be understood as a variable current source that generates a current corresponding to a set value in response to a set value of digital or analog. When the response delay of the compensation circuit 12 is slow, the following processing may be performed. That is, the current waveform generated by the compensation circuit 12 when a set value serving as a predetermined unit input is given to the compensation circuit 12 is acquired in advance as an impulse response. The current waveform actually generated by the compensation circuit 12 can be accurately obtained by convolving the impulse response waveform with the actual set value for the compensation circuit 12 (that is, the waveform of the compensation current i _CMP described above). it can. The impulse response of the compensation circuit 12 may be acquired by connecting a known load to the compensation circuit 12 and performing waveform measurement before or after shipment from the factory.

FIG. 16 is a block diagram showing a modification of the waveform calculation unit of FIG. 16 is configured to be able to calculate (ii) the fifth waveform v _T (t) in addition to (i) the third waveform i _DUT (t) −i _DUT (0). The fifth waveform v _T (t) indicates the power supply voltage V V when a predetermined impedance fluctuation occurs in the DUT 1 in the steady state of the first environment (actual operating environment) where the power supply voltage V _DD is stabilized by the target power supply. It is a waveform of _DD .

  The waveform calculation unit 200a further includes a fourth waveform acquisition unit 232 and a first convolution processing unit 242 in addition to the first waveform acquisition unit 202, the second waveform acquisition unit 206, and the first deconvolution processing unit 210 that have already been described. Including.

The fourth waveform acquisition unit 232 acquires the fourth waveform z _T (t). The fourth waveform z _T (t) is an impulse response waveform of the power supply voltage V _DD with respect to the pulse current when a predetermined pulse current is supplied to the power supply line in the steady state of the actual operating environment.

It may be easier to measure the spectrum than directly measuring the impulse response waveform of the power supply voltage V _DD . In this case, the fourth waveform acquisition unit 232 may include a fourth spectrum acquisition unit 232a and an inverse Fourier transform unit 232b. The fourth spectrum acquisition unit 232a acquires the fourth spectrum z _T (f) which is an impulse response waveform or a step response spectrum. The fourth spectrum z _T (f) can be obtained by actually measuring the frequency response of the system or by simulation. The inverse Fourier transform unit 232b acquires the fourth waveform z _T (t) by performing inverse Fourier transform on the fourth spectrum z _T (f).

The first convolution processing unit 242 calculates the fifth waveform v _T (t) by performing a convolution operation on the third waveform i _DUT (t) −i _DUT (0) and the fourth waveform z _T (t).
v _T (t) = {i _DUT (t) −i _DUT (0)} * z _T (t)

When it is desired to know the fluctuation waveform v _T (t) of the power supply voltage V _DD in the actual operating environment, it may be difficult to actually measure it or calculate it by simulation. According to the waveform calculation unit 200a of FIG. 16, when the first waveform v _A (t), the second waveform z _A (t), and the fourth waveform z _T (t) are known, the fluctuation of the power supply voltage V _DD The waveform v _T (t) can be obtained by calculation.

  This waveform calculation unit 200a can also be used as the fifth waveform acquisition unit 132 in the first embodiment.

FIG. 17 is a block diagram illustrating a modification of the waveform calculation unit of FIG. The waveform calculation unit 200b of FIG. 17 is used in the power supply device 8 including the main power supply 10 and the compensation circuit 12. In addition to (i) the third waveform i _DUT (t) -i _DUT (0), (ii) the fifth waveform v _T (t), the waveform calculation unit 200b performs (iii) compensation to be generated by the compensation circuit 12. The waveform of the current i _CMP can be calculated.

The waveform calculation unit 200b of FIG. 17 further includes a second deconvolution processing unit 208 in addition to the waveform calculation unit 200a of FIG. The second deconvolution processing unit 208 uses the second waveform z _A (t) for the difference v _T (t) −v _A (t) between the fifth waveform v _T (t) and the first waveform v _A (t). ) To calculate a sixth waveform i _CMP (t) describing the waveform of the compensation current i _CMP . The second deconvolution processing unit 208 is nothing but the deconvolution processing unit 108 in FIG.

According to the waveform calculation unit 200b of FIG. 17, when the first waveform v _A (t), the second waveform z _A (t), and the fourth waveform z _T (t) are known, the actual operation that becomes the target waveform The power supply voltage waveform v _T (t) in the environment can be calculated, and the waveform i _CMP (t) of the compensation current i _CMP necessary for realizing the target waveform v _T (t) can be calculated.

(Third embodiment)
In the third embodiment, similarly to the second embodiment, acquisition of a power supply current waveform in an actual operating environment that does not depend on a current sensor will be described. In the second embodiment, it is assumed that the first waveform v _A (t) and the second waveform z _A (t) are known, but they are not always known, and instead they are replaced. Thus, the fifth waveform v _T (t) and the fourth waveform z _T (t) may be known. In the third embodiment, a technique for generating various waveforms in such a situation will be described.

  FIG. 18 is a block diagram illustrating a configuration of a waveform calculation unit 300 according to the third embodiment. The waveform calculation unit 300 constitutes a part of the power supply device 8 of the test apparatus 2 together with the main power supply 10.

  The waveform calculation unit 300 includes a fifth waveform acquisition unit 301, a fourth waveform acquisition unit 332, and a third deconvolution processing unit 310.

The fifth waveform acquisition unit 301, in the steady state of the actual operating environment supply voltage V _DD is stabilized by the target power is a waveform of the power supply voltage V _DD when a predetermined impedance variation occurs in the DUT1 5 A waveform v _T (t) is acquired.

The fourth waveform acquisition unit 332 is an impulse response waveform of the power supply voltage V _DD with respect to the pulse current I _P when a predetermined pulse current I _P is supplied to the power supply line V _DD in the steady state of the actual operating environment. The waveform z _T (t) is acquired. The fourth waveform acquisition unit 332 may be configured in the same manner as the fourth waveform acquisition unit 232 in FIG.

The third deconvolution processing unit 310 performs a deconvolution operation on the fourth waveform z _T (t) with respect to the fifth waveform v _T (t), whereby the third waveform i _DUT (t) −i _DUT (0 ) Is calculated.

According to the waveform calculation unit 300, when the fifth waveform v _T (t) and the fourth waveform z _T (t) are known, the third waveform i that is a fluctuation waveform of the load current is used without using the current sensor. _DUT (t) -i _DUT (0) can be calculated.

  FIG. 19 is a block diagram showing a first modification of the waveform calculation unit of FIG.

  The waveform calculation unit 300a of FIG. 19 includes a first waveform acquisition unit 302, a fourth deconvolution processing unit 314, and a fifth deconvolution processing unit 308 in addition to the waveform calculation unit 300 of FIG.

The waveform calculation unit 300a is configured to be able to calculate (ii) the second waveform z _A (t) in addition to (i) the third waveform i _DUT (t) −i _DUT (0). Second waveform z _{A (t)} is in the steady state of the test environment supply voltage V _DD is stabilized by the main power source 10, when supplying a predetermined pulse current I _P to the power supply line, the pulse current I _P It is an impulse response waveform of the power supply voltage V _DD to.

The first waveform acquisition unit 302 and the fourth deconvolution processing unit 314 are provided for calculating the second waveform z _A (t).

First waveform acquisition unit 302, first in the steady state of the test environment supply voltage V _DD is stabilized by the main power supply 10 is a waveform of the power supply voltage V _DD when a predetermined impedance variation occurs in the DUT1 1 _A waveform v _A (t) is acquired.

The fourth deconvolution processing unit 314 performs a deconvolution operation on the first waveform V _A (t) with respect to the third waveform i _DUT (t) −i _DUT (0), thereby obtaining the second waveform z _A (t ) Is calculated.

In addition to (i) the third waveform i _DUT (t) -i _DUT (0), (ii) the fifth waveform v _T (t), the waveform calculation unit 300 a should generate (iii) the compensation circuit 12. The waveform i _CMP (t) of the compensation current i _CMP can be calculated. For this purpose, the waveform calculation unit 300a further includes a fifth deconvolution processing unit 308.

The fifth deconvolution processing unit 308 uses the second waveform z _A (t) for the difference v _T (t) −v _A (t) between the fifth waveform v _T (t) and the first waveform v _A (t). ) To calculate a sixth waveform i _CMP (t) describing the waveform of the compensation current iCMP (t). The fifth deconvolution processing unit 308 corresponds to the second deconvolution processing unit 208 in FIG.

As described above, according to the waveform calculation unit 300a of FIG. 19, various waveforms i _DUT (t) −i _DUT (0), z _A (t), i _CMP (t) can be calculated.

  FIG. 20 is a block diagram showing a second modification of the waveform calculation unit of FIG. 20 includes a second waveform acquisition unit 306, a second convolution processing unit 320, and a fifth deconvolution processing unit 308 in addition to the waveform calculation unit 300 of FIG.

The waveform calculation unit 300b is configured to be able to calculate (ii) the first waveform v _A (t) in addition to (i) the third waveform i _DUT (t) −i _DUT (0). The first waveform v _A (t) is a waveform of the power supply voltage V _DD when a predetermined impedance fluctuation occurs in the DUT 1 in the steady state of the test environment where the power supply voltage V _DD is stabilized by the main power supply 10. .

The second waveform acquisition unit 306 and the second convolution processing unit 320 are provided for calculating the first waveform v _A (t).

The second waveform acquisition unit 306 is a second waveform z _A that is an impulse response waveform of the power supply voltage V _DD with respect to the pulse current I _P when a predetermined pulse current I _P is supplied to the power supply line in a steady state of the test environment. (T) is acquired. The second waveform acquisition unit 306 corresponds to the second waveform acquisition unit 206 of FIG.

The second convolution processing unit 320 calculates the first waveform v _A (t) by performing a convolution operation on the third waveform i _DUT (t) −i _DUT (0) and the second waveform z _A (t).

In addition to (i) the third waveform i _DUT (t) -i _DUT (0), (ii) the fifth waveform v _T (t), the waveform calculation unit 300b should generate (iii) the compensation circuit 12. The waveform of the compensation current i _CMP can be calculated.

A fifth deconvolution processing unit 308 is provided for this purpose. The fifth deconvolution processing unit 308 in FIG. 20 is similar to the fifth deconvolution processing unit 308 in FIG. 19, and the difference v _T (t) between the fifth waveform v _T (t) and the first waveform v _A (t). _A sixth waveform i _CMP (t) is calculated by performing a deconvolution operation on the second waveform z _A (t) with respect to −v _A (t).

As described above, according to the waveform calculation unit 300b of FIG. 20, various waveforms i _DUT (t) −i _DUT (0), v _A (t), and i _CMP (t) can be calculated.

  The deconvolution processing unit described in the second and third embodiments can be realized by Fourier transform or matrix calculation, as described in the first embodiment.

DESCRIPTION OF SYMBOLS 1 ... DUT, 2 ... Test apparatus, PG ... Pattern generator, TG ... Timing generator, FC ... Waveform shaper, 4 ... Interface circuit, DR ... Driver, 8 ... Power supply device, 10 ... Main power supply, 11 ... Target power supply DESCRIPTION OF SYMBOLS 12 ... Compensation circuit 20 ... Voltage measurement part 22 ... Control pattern production | generation part 12a ... Auxiliary power supply 12b ... Source switch 12c ... Sink switch P1 ... Power supply terminal P2 ... Grounding terminal P3 ... I / O terminal DESCRIPTION OF SYMBOLS 100 ... Compensation current waveform calculation part 102 ... 1st waveform acquisition part 104 ... 2nd waveform acquisition part 106 ... 3rd waveform acquisition part 108 ... Deconvolution process part 110 ... Pulse modulator 112 ... Fourier transform 114, fourth spectrum generation unit, 116, inverse Fourier transform unit, 120, first waveform matrix generation unit, 122, second waveform matrix generation unit, 124, third. Shape matrix generation unit 126 ... Inverse matrix generation unit 128 ... Fourth waveform matrix generation unit 130 ... Fourth waveform generation unit 132 ... Fifth waveform acquisition unit 134 ... Load current acquisition unit 136 ... Fourier transform unit 138: Sixth waveform generation unit, 140: Fourth waveform generation unit, 142: Calculation unit, 150: Seventh waveform acquisition unit, 152: Error calculation unit, 200: Waveform calculation unit, 202: First waveform acquisition unit, 206 2nd waveform acquisition unit, 210 ... 1st deconvolution processing unit, 232 ... 4th waveform acquisition unit, 232a ... 4th spectrum acquisition unit, 232b ... Inverse Fourier transform unit, 208 ... 2nd deconvolution processing unit, 242 ... First convolution processing unit, 300 ... waveform calculation unit, 301 ... fifth waveform acquisition unit, 332 ... fourth waveform acquisition unit, 310 ... third deconvolution processing unit, 302 ... first waveform acquisition Department, 314 ... fourth deconvolution processing section, 308 ... fifth deconvolution processing section, 306 ... acquiring unit second waveform, 320 ... second convolution processing unit.

Claims (11)

A power supply device that supplies a power supply voltage in a second environment different from the first environment to a load that operates by receiving a power supply voltage from a target power supply in the first environment,
The power supply device
The output terminal is connected to the power supply terminal of the load via a power supply line, and the output voltage output from the output terminal is adjusted so that the detection value according to the power supply voltage of the power supply terminal approaches a predetermined target value. A main power supply for feedback control;
A waveform calculation unit that calculates a third waveform i _DUT (t) -i _DUT (0) that is a waveform of an alternating current component of a load current flowing through the load when a predetermined impedance variation occurs in the load;
With
The waveform calculation unit
In a steady state of the second environment where the power supply voltage is stabilized by the main power supply, a first waveform v _A (t) that is a waveform of the power supply voltage when the predetermined impedance fluctuation occurs in the load A first waveform acquisition unit to acquire;
_A second waveform acquisition that acquires a second waveform z _A (t) that is an impulse response waveform of a power supply voltage with respect to the pulse current when a predetermined pulse current is supplied to the power supply line in a steady state of the second environment. And
_A first waveform for calculating the third waveform i _DUT (t) -i _DUT (0) by _{performing a} deconvolution operation on the second waveform z _A (t) with respect to the first waveform v _A (t). A deconvolution processing unit;
A power supply device comprising: In addition to (i) the third waveform i _DUT (t) -i _DUT (0), (ii) the steady state of the first environment in which the power supply voltage is stabilized by the target power supply. In a state, it is possible to calculate a fifth waveform v _T (t) that is a waveform of a power supply voltage when the predetermined impedance fluctuation occurs in the load,
The waveform calculation unit
A fourth waveform for obtaining a fourth waveform z _T (t) that is an impulse response waveform of the power supply voltage with respect to the pulse current when a predetermined pulse current is supplied to the power supply line in a steady state of the first environment. An acquisition unit;
A first convolution processing unit that calculates the fifth waveform v _T (t) by performing a convolution operation on the third waveform i _DUT (t) -i _DUT (0) and the fourth waveform z _T (t); ,
The power supply device according to claim 1, further comprising: When controlling the power supply voltage to an arbitrary target waveform, the power supply device (i) injects a compensation current into the power supply terminal from a path different from the main power supply, and / or (ii) the main power supply A compensation circuit configured to draw a compensation current to a path different from the load from a power supply current flowing from the load to the load;
In addition to (i) the third waveform i _DUT (t) -i _DUT (0), (ii) the fifth waveform v _T (t), the waveform calculating unit generates (iii) the compensation circuit. The power compensation current waveform can be calculated,
The waveform calculation unit calculates the second waveform z _A (t) with respect to the difference v _T (t) −v _A (t) between the fifth waveform v _T (t) and the first waveform v _A (t). The power supply device according to claim 2, further comprising a second deconvolution processing unit that calculates a sixth waveform i _CMP (t) describing a waveform of the compensation current by performing a deconvolution operation on . The fourth waveform acquisition unit
A fourth spectrum z _T (f), which is a spectrum of an impulse response waveform of the power supply voltage with respect to the pulse current when a predetermined pulse current is supplied to the power supply line in a steady state of the first environment, is obtained. A 4-spectrum acquisition unit;
An inverse Fourier transform unit for performing an inverse Fourier transform on the fourth spectrum z _T (f) and calculating the fourth waveform z _T (t);
The power supply device according to claim 2, further comprising: A power supply device that supplies a power supply voltage in a second environment different from the first environment to a load that operates by receiving a power supply voltage from a target power supply in the first environment,
The power supply device
The output terminal is connected to the power supply terminal of the load via a power supply line, and the output voltage output from the output terminal is adjusted so that the detection value according to the power supply voltage of the power supply terminal approaches a predetermined target value. A main power supply for feedback control;
A waveform calculation unit that calculates a third waveform i _DUT (t) -i _DUT (0) that is a waveform of an alternating current component of a load current flowing through the load when a predetermined impedance variation occurs in the load;
With
The waveform calculation unit
In a steady state of the first environment where the power supply voltage is stabilized by the target power supply, a fifth waveform v _T (t) that is a waveform of the power supply voltage when the predetermined impedance fluctuation occurs in the load. A fifth waveform acquisition unit to acquire;
A fourth waveform for obtaining a fourth waveform z _T (t) that is an impulse response waveform of the power supply voltage with respect to the pulse current when a predetermined pulse current is supplied to the power supply line in a steady state of the first environment. An acquisition unit;
A third waveform i _DUT (t) −i _DUT (0) is calculated by _{performing a} deconvolution operation on the fourth waveform z _T (t) with respect to the fifth waveform v _T (t). A deconvolution processing unit;
A power supply device comprising: In addition to (i) the third waveform i _DUT (t) −i _DUT (0), (ii) the steady state of the second environment in which the power supply voltage is stabilized by the main power supply. In a state, it is possible to calculate a second waveform z _A (t) that is an impulse response waveform of the power supply voltage with respect to the pulse current when a predetermined pulse current is supplied to the power supply line.
The waveform calculation unit
In a steady state of the second environment where the power supply voltage is stabilized by the main power supply, a first waveform v _A (t) that is a waveform of the power supply voltage when the predetermined impedance fluctuation occurs in the load A first waveform acquisition unit to acquire;
_A fourth waveform z _A (t) is calculated by performing a deconvolution operation on the first waveform V _A (t) with respect to the third waveform i _DUT (t) −i _DUT (0). A deconvolution processing unit;
The power supply device according to claim 5, further comprising: When controlling the power supply voltage to an arbitrary target waveform, the power supply device (i) injects a compensation current into the power supply terminal from a path different from the main power supply, and / or (ii) the main power supply A compensation circuit configured to draw a compensation current to a path different from the load from a power supply current flowing from the load to the load;
In addition to (i) the third waveform i _DUT (t) -i _DUT (0), (ii) the fifth waveform v _T (t), the waveform calculating unit generates (iii) the compensation circuit. The power compensation current waveform can be calculated,
The waveform calculation unit calculates the second waveform z _A (t) with respect to the difference v _T (t) −v _A (t) between the fifth waveform v _T (t) and the first waveform v _A (t). The power supply device according to claim 6, further comprising a fifth deconvolution processing unit that calculates a sixth waveform i _CMP (t) describing a waveform of the compensation current by performing a deconvolution operation on . In addition to (i) the third waveform i _DUT (t) −i _DUT (0), (ii) the steady state of the second environment in which the power supply voltage is stabilized by the main power supply. In a state, it is possible to calculate a first waveform v _A (t) that is a waveform of a power supply voltage when the predetermined impedance fluctuation occurs in the load,
The waveform calculation unit
_A second waveform acquisition that acquires a second waveform z _A (t) that is an impulse response waveform of a power supply voltage with respect to the pulse current when a predetermined pulse current is supplied to the power supply line in a steady state of the second environment. And
_A second convolution processing unit for calculating the first waveform v _A (t) by performing a convolution operation on the third waveform i _DUT (t) -i _DUT (0) and the second waveform z _A (t); ,
The power supply device according to claim 5, further comprising: When controlling the power supply voltage to an arbitrary target waveform, the power supply device (i) injects a compensation current into the power supply terminal from a path different from the main power supply, and / or (ii) the main power supply A compensation circuit configured to draw a compensation current to a path different from the load from a power supply current flowing from the load to the load;
In addition to (i) the third waveform i _DUT (t) -i _DUT (0), (ii) the fifth waveform v _T (t), the waveform calculating unit generates (iii) the compensation circuit. The power compensation current waveform can be calculated,
The waveform calculation unit calculates the second waveform z _A (t) with respect to the difference v _T (t) −v _A (t) between the fifth waveform v _T (t) and the first waveform v _A (t). The power supply apparatus according to claim 8, further comprising a fifth deconvolution processing unit that calculates a sixth waveform i _CMP (t) describing a waveform of the compensation current by performing a deconvolution operation on . The fourth waveform acquisition unit
A fourth spectrum z _T (f), which is a spectrum of an impulse response waveform of the power supply voltage with respect to the pulse current when a predetermined pulse current is supplied to the power supply line in a steady state of the first environment, is obtained. A 4-spectrum acquisition unit;
An inverse Fourier transform unit for performing an inverse Fourier transform on the fourth spectrum z _T (f) and calculating the fourth waveform z _T (t);
The power supply device according to claim 5, comprising:   11. A test apparatus comprising the power supply apparatus according to claim 1, wherein a power supply voltage is supplied to a device under test that is a load.

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