CN117457602B - High-heat-flow chip packaging structure and service temperature real-time regulation and control method thereof - Google Patents
High-heat-flow chip packaging structure and service temperature real-time regulation and control method thereof Download PDFInfo
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- CN117457602B CN117457602B CN202311774865.9A CN202311774865A CN117457602B CN 117457602 B CN117457602 B CN 117457602B CN 202311774865 A CN202311774865 A CN 202311774865A CN 117457602 B CN117457602 B CN 117457602B
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 29
- 238000000034 method Methods 0.000 title claims abstract description 20
- 230000033228 biological regulation Effects 0.000 title abstract description 7
- 230000017525 heat dissipation Effects 0.000 claims abstract description 55
- 238000001816 cooling Methods 0.000 claims abstract description 46
- 239000007788 liquid Substances 0.000 claims abstract description 33
- 229910052710 silicon Inorganic materials 0.000 claims description 72
- 239000010703 silicon Substances 0.000 claims description 72
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 70
- 239000000758 substrate Substances 0.000 claims description 34
- 230000004907 flux Effects 0.000 claims description 23
- 229910000679 solder Inorganic materials 0.000 claims description 15
- 238000007789 sealing Methods 0.000 claims description 14
- 230000001681 protective effect Effects 0.000 claims description 11
- 230000008569 process Effects 0.000 claims description 9
- 239000003822 epoxy resin Substances 0.000 claims description 8
- 229920000647 polyepoxide Polymers 0.000 claims description 8
- 230000001276 controlling effect Effects 0.000 claims description 4
- 230000001105 regulatory effect Effects 0.000 claims description 4
- XVIZMMSINIOIQP-UHFFFAOYSA-N 1,2-dichloro-3-(2-chlorophenyl)benzene Chemical compound ClC1=CC=CC(C=2C(=CC=CC=2)Cl)=C1Cl XVIZMMSINIOIQP-UHFFFAOYSA-N 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 7
- 230000010354 integration Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000012536 packaging technology Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000007123 defense Effects 0.000 description 2
- 239000012530 fluid Substances 0.000 description 2
- 230000007774 longterm Effects 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 238000007792 addition Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000002826 coolant Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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- 235000012239 silicon dioxide Nutrition 0.000 description 1
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- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/467—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing gases, e.g. air
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
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- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The invention discloses a high heat flow chip packaging structure and a service temperature real-time regulation and control method thereof, which belong to the technical field of chip heat dissipation. Meanwhile, the fans are arranged above the chip, and a heat dissipation mode of combining air cooling and micro-channel liquid cooling is utilized to realize multi-stage regulation and control, so that the requirements of the functional chip on different heat dissipation under different service conditions are met.
Description
Technical Field
The invention belongs to the technical field of chip heat dissipation, and particularly relates to a high-heat-flow chip packaging structure and a service temperature real-time regulation and control method thereof.
Background
In recent years, with the rapid development of new semiconductor materials and packaging interconnection technologies, portable consumer electronic products and products for military industry modules have raised higher and higher requirements on small size, low cost and performance reliability of packaged products. The continuous reduction of the size of electronic components and the continuous increase of the packaging density can lead to the continuous increase of the heat flux density of chips, and the heat flux density of chips in electronic products such as national defense, aviation and the like is even more than 200W/cm 2 。
In order to achieve the development goals of smaller size, higher packaging density and lower cost of components in the industry, advanced packaging technologies such as 2.5D/3D packaging and the like have become the key packaging technology of the system packaging and have become the important development direction in the future. The 2.5D/3D package interconnects a plurality of chips through the silicon substrate by the through silicon via technology, and the chips are stacked on top of the silicon substrate containing the through silicon vias, so that the silicon substrate is a bridge between the chips and the substrate, more I/O bandwidth can be provided for the system, and compared with the traditional packaging technology, the advanced packages such as the 2.5D/3D package have the advantages of high packaging efficiency, high integration level and the like. Along with the continuous improvement of chip performance, the 2.5D/3D package can generate higher heat flux density while realizing high-performance transmission of the chip, and for electronic components and micro devices adopting the high-heat flux package, the traditional forced air cooling heat dissipation is difficult to meet the heat dissipation requirement of the micro devices due to small size and small heat dissipation area of the devices, and the traditional air cooling heat dissipation also has the problems of large size, high noise and the like.
In order to cope with the problems of difficult heat dissipation and large radiator volume of the high-heat-flow chip package, the microchannel-based cooling technology is recognized as one of advanced technologies with great development potential. Since the 20 th century microchannel heat dissipation technology was proposed, over 40 years of history have been reached, and the advantages of high heat exchange coefficient, large area-volume ratio, easy packaging, high integration, small volume, low heat dissipation noise and the like are widely studied by domestic and foreign students.
At present, the micro-channel heat dissipation technology using water as a heat exchange working medium is widely applied to the field of chip heat dissipation due to the characteristics of high heat exchange efficiency, compact structure, small volume and the like. However, the conventional micro-channel heat dissipation structure lacks the capability of autonomously controlling the heat dissipation mode according to the heat flux density, and if the maximum load operation of the micro-channel heat dissipation structure is maintained during the low power consumption operation of the components, energy waste is generated. And traditional microchannel heat radiation structure arranges more at the chip top, has ignored the heat dissipation demand of chip bottom and chip and base plate junction, therefore, its maximum radiating efficiency is limited, and the cold and hot uneven problem about appearing easily. In addition, the traditional micro-channel heat dissipation structure is mostly rectangular, and the problems of uneven temperature distribution and the like can be generated at the head end and the tail end of the micro-channel.
Disclosure of Invention
The present invention is directed to a high heat flow chip package structure, which solves the above-mentioned problems in the prior art. The micro-channel heat dissipation technology is applied to high heat flow packaging, so that the problem of packaging heat dissipation can be well solved, and the traditional air cooling heat dissipation is combined, so that the long-term uniformity and stability of the chip temperature can be effectively maintained, and an important basic support is provided for reducing the chip size and promoting the development of the chip to miniaturization and high integration.
The invention provides a high heat flow chip packaging structure, which comprises a top cover 1, a storage chip 2, a logic chip 3 and a substrate 11, wherein the substrate 11 is provided with the top cover 1 and a sealing layer 8 positioned in the top cover 1, the sealing layer 8 is provided with a silicon base layer 7, the bottom of the silicon base layer 7 is provided with a plurality of lower micro-channels 701, and a silicon base cover plate 9 is sleeved outside the silicon base layer 7;
the silicon substrate 7 is provided with a wiring layer 6, and the memory chip 2 and the logic chip 3 are arranged on the wiring layer 6 side by side;
the inner side surface of the top cover 1 is provided with a plurality of upper micro-channels 103, the inner side surface of the top cover 1 is covered with a cover plate 104, and the other surface of the cover plate 104 is contacted with the tops of the memory chip 2 and the logic chip 3.
As a further scheme of the invention: the two sides of the top cover 1 are provided with an upper layer micro-channel working medium inlet 1031 and an upper layer micro-channel working medium outlet 1032 which are respectively communicated with the two ends of the upper layer micro-channel 103;
a lower-layer micro-channel working medium inlet 101 is formed in the top cover 1 positioned on the same side as the upper-layer micro-channel working medium inlet 1031, and a lower-layer micro-channel working medium outlet 102 is formed in the top cover 1 positioned on the same side as the upper-layer micro-channel working medium outlet 1032;
the two sides of the silicon-based cover plate 9 are provided with a silicon-based cover plate working medium inlet 901 and a silicon-based cover plate working medium outlet 902 which are respectively communicated with two ends of the lower-layer micro-channel 701, the silicon-based cover plate working medium inlet 901 corresponds to the position of the lower-layer micro-channel working medium inlet 101, and the silicon-based cover plate working medium outlet 902 corresponds to the position of the lower-layer micro-channel working medium outlet 102.
As a further scheme of the invention: the micro pump 15 and the base plate 11 are arranged on the PCB 16, the lower-layer micro-channel working medium inlet 101 and the upper-layer micro-channel working medium inlet 1031 are respectively communicated with the micro pump 15 outlet through hoses 24, and the micro pump 15 inlet is communicated with the liquid storage tank 23 outlet; an upper micro electromagnetic valve 21 is arranged on a hose 24 communicated with the upper micro channel working medium inlet 1031, and a lower micro electromagnetic valve 22 is arranged on the hose 24 communicated with the lower micro channel working medium inlet 101; the lower layer micro-channel working medium outlet 102 and the upper layer micro-channel working medium outlet 1032 are respectively communicated with the inlet of the liquid storage tank 23 through hoses 24.
As a further scheme of the invention: the upper layer micro-channel 103 is one of a rectangular micro-channel, a trapezoid micro-channel, a triangular micro-channel, a rectangular micro-channel with triangular ribs and a rectangular micro-channel with front sparse and rear dense triangular ribs.
As a further scheme of the invention: the outer sides of the lower-layer micro-channel working medium inlet 101 and the lower-layer micro-channel working medium outlet 102 are respectively provided with a sliding plate 20, the sliding plates 20 are provided with through holes corresponding to the positions of the lower-layer micro-channel working medium inlet 101 and the lower-layer micro-channel working medium outlet 102, and the other sides of the sliding plates 20 are provided with protective covers 19;
the top cover 1 is also provided with a concave guide rail 17, two ends of the sliding plate 20 are provided with I-shaped lug plates 201, and one end of each I-shaped lug plate 201 is inserted into the corresponding concave guide rail 17 and is fixed on the end face of the corresponding concave guide rail 17.
As a further scheme of the invention: the memory chip 2 and the logic chip 3 are fixed on the wiring layer 6 through a plurality of solder balls 4, and gaps among the solder balls 4 are filled with epoxy resin 5.
As a further scheme of the invention: silicon through holes 702 are formed in the silicon substrate 7, the silicon substrate 7 is arranged above the sealing layer 8, the sealing layer 8 is fixedly connected with the substrate 11 through the solder balls 4, and gaps among the solder balls 4 are filled with epoxy resin 5.
As a further scheme of the invention: the novel solar energy heat collector is characterized by further comprising a fixing frame 12 arranged on the base plate 11, a motor 13 is arranged on the inner top surface of the fixing frame 12, a fan 14 is arranged below the motor 13 and connected with an output shaft of the motor 13, and the fan 14 is located above the top cover 1.
The invention also provides a method for regulating and controlling the service temperature of the high heat flow chip packaging structure in real time, when the heat flow density detected by the logic chip 3 and the memory chip 2 is lower than 10W/cm 2 When the motor 13 starts the fan 14, the logic chip 5 and the memory chip 4 are subjected to air cooling and heat dissipation;
when the heat flux density detected by the logic chip 3 and the memory chip 2 is not lower than 10W/cm 2 And below 50W/cm 2 When the fan 14 is turned off, the logic chip 3 and the memory chip 2 transmit an opening signal to the micro pump 15 and the upper micro electromagnetic valve 21 through the PCB 16, the micro pump 15 is started and pumps cooling working medium to the upper micro channel 103, and single-sided liquid cooling heat dissipation is carried out on the logic chip 3 and the memory chip 2;
when the heat flux density detected by the logic chip 3 and the memory chip 2 is not lower than 50W/cm 2 And less than 100W/cm 2 When the micropump 26, the upper micro solenoid valve 21 and the lower micro solenoid valve 22 are openedThe upper layer micro-channel 103 and the lower layer micro-channel 701 pump cooling working medium at the same time, and perform double-sided liquid cooling heat dissipation on the upper and lower surfaces of the logic chip 3 and the memory chip 2;
when the heat flux density detected by the logic chip 3 and the memory chip 2 is not lower than 100W/cm 2 In this case, the motor 13, the micropump 26, the upper micro solenoid valve 21, and the lower micro solenoid valve 22 are simultaneously activated to perform double-sided liquid cooling heat dissipation on the upper and lower surfaces of the logic chip 3 and the memory chip 2, and simultaneously to assist air cooling heat dissipation.
As a further scheme of the invention: the heat flux density values detected by the logic chip 3 and the storage chip 2 are derived from temperature values acquired in the service process of the logic chip 3 and the storage chip 2, and the highest heat flux density value of the chip surface is obtained through chip operation.
Compared with the prior art, the invention has the beneficial effects that:
1. according to the invention, the micro-channels are etched on the top cover and the silicon base layer, so that the micro-channels are arranged on two sides of the chip, and cooling working media can be injected into the micro-channels to cool the functional chip on two sides. Meanwhile, the fans are arranged above the chip, and a heat dissipation mode of combining air cooling and micro-channel liquid cooling is utilized to realize multi-stage regulation and control, so that the requirements of the functional chip on different heat dissipation under different service conditions are met.
2. The invention relates to a high-heat-flow chip packaging structure with a double-layer micro-channel liquid cooling heat dissipation structure, which provides a feasible micro-channel optimal heat dissipation structure and a method for high-reliability heat management of electronic devices packaged by high-heat-flow density chips, and verifies that the heat dissipation structure is 300W/cm through numerical simulation 2 The feasibility under the working condition of high heat flux density has the characteristics of high reliability and high universality, and has good application prospect in small-volume chip packaging of high heat flux density electronic devices such as national defense, aviation and the like.
Drawings
The present invention is further described below with reference to the accompanying drawings for the convenience of understanding by those skilled in the art.
FIG. 1 is a schematic diagram of the structure of the present invention;
FIG. 2 is a side view of a high heat flow chip package structure;
FIG. 3 is a front view of a two-layer microchannel liquid cooled structure;
FIG. 4 is a schematic view of the structure of the present invention (hose not installed);
FIG. 5 is a schematic view of the structure of the top cover;
FIG. 6 is an enlarged view of a portion of an upper layer microchannel;
FIG. 7 is an enlarged view of a portion of an upper layer microchannel (II);
FIG. 8 is an enlarged view of a portion of an upper layer microchannel (III);
FIG. 9 is an enlarged view of a portion of an upper layer microchannel (IV);
FIG. 10 is a partial enlarged view of the upper layer microchannel (V);
FIG. 11 is a schematic view of a silicon-based cover plate structure (I);
FIG. 12 is a schematic view of a silicon-based cover plate structure (II);
FIG. 13 is a schematic structural view of a silicon base layer;
FIG. 14 is an enlarged partial cross-sectional view of a silicon base layer;
FIG. 15 is a schematic view illustrating assembly of the inlet end cap and the slide plate;
FIG. 16 is a schematic view of a structure of a concave rail;
fig. 17 is a cross-sectional view of fig. 16.
In the figure: 1-top cover; 101-a lower layer micro-channel working medium inlet; 102-a lower layer micro-channel working medium outlet; 103-upper layer micro-channels; 1031-an upper layer micro-channel working medium inlet; 1032-upper layer micro-channel working medium outlet; 104-cover plate; 2-a memory chip; 3-logic chip; 4-solder balls; 5-epoxy resin; 6-wiring layers; a 7-silicon-based layer; 701-lower layer microchannel; 702-through silicon vias; 8-sealing layers; 9-silicon-based cover plate; 901-a working medium inlet of a silicon-based cover plate; 902-a working medium outlet of a silicon-based cover plate; 10-a bottom plate; 11-a substrate; 12-fixing frame; 13-a motor; 14-a fan; 15-micropump; 151-micropump working matter inlet; 152-a micropump working matter outlet; 16-a PCB board; 17-concave guide rail; 171-threaded holes; 172-grooves; 18-fastening a screw; 19-a protective cover; 20-sliding plate; 201-I-shaped ear plates; 21-upper layer miniature electromagnetic valve; 22-lower layer miniature electromagnetic valve; 23-a liquid storage tank; 231-working medium inlet of liquid storage tank; 232-a working medium outlet of the liquid storage tank; 24-hose.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the particular embodiments described herein are illustrative only and are not intended to limit the invention, i.e., the embodiments described are merely some, but not all, of the embodiments of the invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by a person skilled in the art without making any inventive effort, are intended to be within the scope of the present invention.
Referring to fig. 1, in the high heat flow chip packaging structure of the present invention, the packaged substrate 11 is disposed on the PCB 16, the PCB 16 is further provided with the micropump 15, the substrate 11 and the micropump 15 perform electrical signal interaction through the PCB 16, and when the heat flow density of the functional chips such as the memory chip 2 or the logic chip 3 exceeds a certain value, the micropump 15 is started and stopped according to the heat dissipation requirement, so that the heat dissipation efficiency is greatly improved, and the long-term uniformity and stability of the temperature of the functional chips are effectively maintained. A reservoir 23 is also included to provide cooling medium. The micro pump working medium inlet 151 is communicated with the liquid storage tank working medium outlet 232 through the hose 24, the micro pump working medium outlet 152 is communicated with the inside of the packaging structure through the hose 24, and the liquid storage tank working medium inlet 231 is communicated with the inside of the packaging structure, so that the liquid cooling working medium forms a cycle.
Referring to fig. 2, a fixing frame 12 is welded on a substrate 11, and the fixing frame 12 adopts a hollow structure, so that heat dissipation can be better while materials are reduced. The top cover 1 is arranged in the fixing frame 12, the motor 13 is arranged on the inner top surface of the fixing frame 12, the fan 14 is arranged below the motor 13 and connected with the output shaft of the motor 13, and the fan 14 is arranged above the top cover 1 to provide air cooling and heat dissipation for the functional chips.
Referring to fig. 3, a fixing frame 12 is disposed on a substrate 11, a sealing layer 8 is disposed on the substrate 11 and is located in the fixing frame 12, the sealing layer 8 is made of silicon dioxide material, the sealing layer 8 is fixed on the substrate 11 through solder balls 4, and gaps between the solder balls 4 are filled with epoxy resin 5 for improving reliability of the chip. The silicon base layer 7 is arranged on the sealing layer 8, the silicon through holes 702 are formed in the silicon base layer 7 and are used for communicating the wiring layer 6 and the substrate 11, and the lower micro-channels 701 are formed in the bottom of the silicon base layer 7, so that the silicon base layer 7 can transmit electric signals between the functional chip and the substrate 11 and can radiate the functional chip, the micro-channels are additionally arranged in the packaging structure, the radiating efficiency is improved, the need for additionally arranging the micro-channels is reduced, the micro-channels and the functional chip are packaged together, and the size of the radiating structure is reduced. The silicon base layer 7 is sleeved with a silicon base cover plate 9, a working medium inlet and outlet is provided for the lower micro-channel 701, and a bottom plate 10 is arranged between the silicon base cover plate 9 and the substrate 11. The silicon substrate 7 is provided with a wiring layer 6 for connecting functional chips such as the logic chip 3 and the memory chip 2 and simultaneously realizing communication between the chips and the substrate 11. The memory chip 2 and the logic chip 3 are arranged on the wiring layer 6 side by side through the solder balls 4, and gaps between the solder balls 4 for electric signal transmission are filled with epoxy resin 5 for improving the reliability of the chip. And the wiring layers 6 on the silicon base layer 7 are communicated with each other to realize efficient and high-density interconnection between functional chips. A plurality of upper micro-channels 103 are formed in the inner side surface of the top cover 1, the upper micro-channels 103 are integrated on the top cover 1, and the functional chip is supported and protected and simultaneously is cooled, so that the functional chip is ensured to work normally. The inner side surface of the top cover 1 is tightly connected with the cover plate 104 through a bonding process, and the other surface of the cover plate 104 is contacted with the tops of the memory chip 2 and the logic chip 3. The top cover 1 is made of copper, so that protection is provided for the functional chip and heat dissipation requirements can be provided. The logic chip 3 is connected with the silicon base layer 7 and the silicon base layer 7 is connected with the substrate 11 through the solder balls 4, and the epoxy resin 5 is filled between the gaps of the solder balls 4, so that the functional chip can be well protected, the thermal stress caused by thermal expansion is reduced, and the reliability of the functional chip is improved.
Referring to fig. 4, the top cover 1 has a square structure, two sliding plates 20 are disposed outside the top cover 1, the two sliding plates 20 are disposed on two opposite sides of the top cover 1, one side of the sliding plate 20 is attached to the top cover 1, and a protective cover 19 is disposed on the other side. The top cover 1 is also provided with two concave guide rails 17, the two concave guide rails 17 are respectively arranged on the other two opposite sides of the top cover 1, and two ends of a sliding plate 20 are respectively inserted into the two concave guide rails 17 and are fixed on the end surfaces of the concave guide rails 17 through fastening screws 18.
Referring to fig. 5, a lower layer micro-channel working medium inlet 101 and an upper layer micro-channel working medium inlet 1031 are provided on one side of the top cover 1, and a lower layer micro-channel working medium outlet 102 and an upper layer micro-channel working medium outlet 1032 are provided on the opposite side. The inlet ends of the upper layer micro-channels 103 are collected to the upper layer micro-channel working medium inlets 1031, and the outlet ends are collected to the upper layer micro-channel working medium outlets 1032. The two sides of the top cover 1 are provided with groove structures in advance, and the groove structures are communicated with the upper layer micro-channel 103 and the upper layer micro-channel working medium inlet 1031, or are communicated with the upper layer micro-channel 103 and the upper layer micro-channel working medium outlet 1032 for guiding working medium fluid.
Specifically, the outer parts of the lower-layer micro-channel working medium inlet 101 and the lower-layer micro-channel working medium outlet 102 are respectively provided with a sliding plate 20, the protective cover 19 is provided with through holes corresponding to the positions of the lower-layer micro-channel working medium inlet 101 or the lower-layer micro-channel working medium outlet 102, and the sliding plate 20 is provided with through holes corresponding to the positions of the lower-layer micro-channel working medium inlet 101 and the upper-layer micro-channel working medium inlet 1031 or through holes corresponding to the positions of the lower-layer micro-channel working medium outlet 102 and the upper-layer micro-channel working medium outlet 1032. The micro pump working medium outlet 152 passes through the protective cover 19 through the hose 24 and is divided into two branches in the cavity of the protective cover 19, one branch passes through the slide plate 20 and is communicated with the lower-layer micro channel working medium inlet 101, the other branch passes through the slide plate 20 and is communicated with the upper-layer micro channel working medium inlet 1031, the upper-layer micro electromagnetic valve 21 is arranged on the hose 24 which is communicated with the upper-layer micro channel working medium inlet 1031, and the lower-layer micro electromagnetic valve 22 is arranged on the hose 24 which is communicated with the lower-layer micro channel working medium inlet 101. The reservoir working medium inlet 231 passes through the protective cover 19 through the hose 24 and is divided into two branches in the cavity of the protective cover 19, one branch passes through the slide plate 20 to be communicated with the lower-layer micro-channel working medium outlet 102, and the other branch passes through the slide plate 20 to be communicated with the upper-layer micro-channel working medium outlet 1032.
Referring to fig. 6, the upper layer micro-channel 103 may be configured as a rectangular micro-channel, which has a simple structure, is convenient to process, and has better temperature uniformity and lower thermal resistance in the middle channel region.
Referring to fig. 7, the upper layer micro-channel 103 may be configured as a trapezoid micro-channel, which has a simple structure, is convenient to process, and has a low local maximum temperature.
Referring to fig. 8, the upper layer micro-channel 103 may be configured as a triangular micro-channel, which has a simple structure, is convenient to process, and has a low local maximum temperature.
Referring to fig. 9, the upper layer micro-channel 103 may be configured as a rectangular micro-channel with triangular ribs, and the rectangular micro-channel with triangular ribs formed by adding triangular ribs with uniform spacing into the conventional rectangular micro-channel can play a good role in turbulence in the fluid flowing process, thereby increasing heat exchange efficiency and improving heat dissipation performance of the micro-channel.
Referring to fig. 10, the upper layer micro-channel 103 may be configured as a rectangular micro-channel with front and rear dense triangular ribs, and the space between the triangular ribs is configured as a rectangular micro-channel with front and rear dense triangular ribs, so as to enhance the turbulence intensity at the rear end of the micro-channel, thereby enhancing the heat exchange efficiency at the rear end of the micro-channel and improving the temperature uniformity of the micro-channel.
It should be noted that, the upper layer micro-channel 103 may be one of the rectangular micro-channels, the trapezoidal micro-channels, the triangular micro-channels, the rectangular micro-channels with triangular ribs, and the rectangular micro-channels with front and rear dense triangular ribs described in fig. 6-10.
Referring to fig. 11, 12 and 13, grooves for guiding flow are etched on two sides of the silicon-based cover plate 9, and the grooves are matched with the bottom plate 10, arranged on the substrate 11 and tightly attached to the periphery of the silicon-based layer 7, so that a silicon-based cover plate working medium inlet 901 and a silicon-based cover plate working medium outlet 902 are formed, and are respectively communicated with two ends of the lower-layer micro-channel 701, the silicon-based cover plate working medium inlet 901 corresponds to the position of the lower-layer micro-channel working medium inlet 101, the silicon-based cover plate working medium outlet 902 corresponds to the position of the lower-layer micro-channel working medium outlet 102, and can be used for conveying cooling working medium for the lower-layer micro-channel 701 on the silicon-based layer 7.
Referring to fig. 14, a plurality of through silicon vias 702 are formed in the silicon substrate 7, the through silicon vias 702 penetrate through the wiring layer 6 for transmitting electrical signals, and a lower micro-channel 701 is formed between each two adjacent through silicon vias 702.
Referring to fig. 15, a protective cover 19 is disposed on the side of the sliding plate 20, and a placement cavity is formed between the protective cover 19 and the sliding plate 20 to accommodate an upper micro solenoid valve 21 and a lower micro solenoid valve 22. The two ends of the slide plate 20 are provided with I-shaped lug plates 201, and the I-shaped lug plates 201 are inserted into the concave guide rails 17.
Referring to fig. 16 and 17, a groove 172 is formed in the concave guide rail 17 to be matched with the i-shaped ear plate 201, and a threaded hole 171 is formed in the end face to be matched with the fastening screw 18.
The circulation process of the cooling working medium comprises the following steps: the cooling working medium is stored in the liquid storage tank 23, the micro pump 15 is started, enters the micro pump 15 from the liquid storage tank working medium outlet 232 through the hose 24 and the micro pump working medium inlet 151, and is divided into two paths through the micro pump working medium outlet 152 and the hose 24. One path enters the upper micro-channel 103 through the upper micro-solenoid valve 21 and the upper micro-channel working medium inlet 1031, absorbs heat, flows out of the upper micro-channel 103 through the upper micro-channel working medium outlet 1032, enters the hose 24 and merges with the other path of cooling working medium, and flows back to the liquid storage tank 23 through the liquid storage tank working medium inlet 231. The other path enters the flow guide groove at the inner inlet end of the silicon-based cover plate through the lower micro electromagnetic valve 22, the lower micro channel working medium inlet 101 and the silicon-based cover plate working medium inlet 901, then flows through the lower micro channel 701 to absorb heat, enters the flow guide groove at the inner outlet end of the silicon-based cover plate, enters the hose 24 from the silicon-based cover plate working medium outlet 902 and the lower micro channel working medium outlet 102 to be converged with the other path of cooling working medium, and flows back to the liquid storage tank 23 through the liquid storage tank working medium inlet 231.
The invention also provides a method for regulating and controlling the service temperature of the high heat flow chip packaging structure in real time, when the heat flow density detected by the logic chip 3 and the memory chip 2 is lower than 10W/cm 2 When the motor 13 starts the fan 14, the logic chip 5 and the memory chip 4 are subjected to air cooling and heat dissipation;
when the heat flux density detected by the logic chip 3 and the memory chip 2 is not lower than 10W/cm 2 And below 50W/cm 2 When the fan 14 is turned off, the logic chip 3 and the memory are turned offThe storage chip 2 transmits an opening signal to the micro pump 15 and the upper micro electromagnetic valve 21 through the PCB 16, the micro pump 15 is started and pumps cooling working medium to the upper micro channel 103, and single-sided liquid cooling heat dissipation is carried out on the logic chip 3 and the storage chip 2;
when the heat flux density detected by the logic chip 3 and the memory chip 2 is not lower than 50W/cm 2 And less than 100W/cm 2 When the micro-pump cooling device is used, the logic chip 3 and the memory chip 2 transmit opening signals to the micro-pump 26, the upper micro-electromagnetic valve 21 and the lower micro-electromagnetic valve 22 through the PCB 16, the micro-pump 15 starts the upper micro-channel 103 and the lower micro-channel 701 to pump cooling working media at the same time, and double-sided liquid cooling heat dissipation is carried out on the upper surface and the lower surface of the logic chip 3 and the memory chip 2;
when the heat flux density detected by the logic chip 3 and the memory chip 2 is not lower than 100W/cm 2 When the logic chip 3 and the memory chip 2 transmit opening signals to the micropump 26, the upper micro electromagnetic valve 21 and the lower micro electromagnetic valve 22 through the PCB 16, and simultaneously start the motor 13 to perform double-sided liquid cooling heat dissipation on the upper surface and the lower surface of the logic chip 3 and the memory chip 2, and simultaneously assist air cooling heat dissipation.
The heat flux density values detected by the logic chip 3 and the memory chip 2 are derived from temperature values acquired in the service process of the logic chip 3 and the memory chip 2, and the highest heat flux density value of the chip surface is obtained through chip operation.
The average temperature of the service of the functional chip regulated by adopting the real-time regulation method of the service temperature of the high heat flow chip packaging structure is verified by a numerical simulation method, and the result shows that the heat flow density reaches 10W/cm 2 When the micro fan is used for air cooling and heat dissipation, the average temperature of the service of the functional chip can be controlled to be about 80 ℃, and the single-sided liquid cooling and heat dissipation of the upper micro channel 103 is adopted in an auxiliary mode, so that the average temperature of the service of the functional chip can be about 30 ℃; when the heat flux density reaches 50W/cm 2 When the heat dissipation adopts the upper layer micro-channel 103 to dissipate heat, the average temperature of the service of the functional chip can be controlled to be about 70 ℃, and the double-layer liquid cooling heat dissipation combined by the upper layer micro-channel 103 and the lower layer micro-channel 701 is adopted, the average temperature of the service of the functional chip can be controlled to be about 30 ℃; when the heat flux density reaches 100W/cm 2 When the heat dissipation adopts a mixed heat dissipation mode of combining an upper layer micro-channel with a lower layer micro-channel with air cooling, the average temperature of the service of the functional chip can be controlled to be about 40 ℃; in addition, a heat dissipation mode of combining liquid cooling heat dissipation and air cooling of an upper micro-channel and a lower micro-channel is adopted, and the functional chip is 300W/cm 2 The average temperature of the service can be controlled to be about 70 ℃ to stably work under the high heat flow of the water heater.
The foregoing is merely illustrative of the structures of this invention and various modifications, additions and substitutions for those skilled in the art can be made to the described embodiments without departing from the scope of the invention or from the scope of the invention as defined in the accompanying claims.
Claims (10)
1. The high heat flow chip packaging structure is characterized by comprising a top cover (1), a storage chip (2), a logic chip (3) and a substrate (11), wherein the top cover (1) and a sealing layer (8) are arranged on the substrate (11), the sealing layer (8) is positioned in the top cover (1), a silicon base layer (7) is arranged on the sealing layer (8), a plurality of lower micro-channels (701) are formed in the bottom of the silicon base layer (7), and a silicon base cover plate (9) is sleeved outside the silicon base layer (7);
a wiring layer (6) is arranged on the silicon substrate (7), the memory chip (2) and the logic chip (3) are arranged on the wiring layer (6) side by side, a plurality of through silicon vias (702) are arranged in the silicon substrate (7), the through silicon vias (702) penetrate through the wiring layer (6), and a lower layer micro-channel (701) is arranged between every two adjacent through silicon vias (702);
a plurality of upper micro-channels (103) are formed in the inner side surface of the top cover (1), a cover plate (104) is covered on the inner side surface of the top cover (1), and the other surface of the cover plate (104) is contacted with the tops of the storage chip (2) and the logic chip (3);
the micro-channel and the functional chip are packaged together, so that the need of additionally installing the micro-channel is reduced, and the size of the heat dissipation structure is reduced.
2. The high heat flow chip packaging structure according to claim 1, wherein the two sides of the top cover (1) are provided with an upper layer micro-channel working medium inlet (1031) and an upper layer micro-channel working medium outlet (1032) which are respectively communicated with two ends of the upper layer micro-channel (103);
a lower-layer micro-channel working medium inlet (101) is formed in the top cover (1) positioned on the same side as the upper-layer micro-channel working medium inlet (1031), and a lower-layer micro-channel working medium outlet (102) is formed in the top cover (1) positioned on the same side as the upper-layer micro-channel working medium outlet (1032);
the two sides of the silicon-based cover plate (9) are provided with a silicon-based cover plate working medium inlet (901) and a silicon-based cover plate working medium outlet (902) which are respectively communicated with two ends of the lower-layer micro-channel (701), the silicon-based cover plate working medium inlet (901) corresponds to the lower-layer micro-channel working medium inlet (101), and the silicon-based cover plate working medium outlet (902) corresponds to the lower-layer micro-channel working medium outlet (102).
3. The high heat flow chip packaging structure according to claim 2, further comprising a micro pump (15) and a liquid storage tank (23), wherein the micro pump (15) and the substrate (11) are both arranged on the PCB (16), the lower layer micro channel working medium inlet (101) and the upper layer micro channel working medium inlet (1031) are respectively communicated with the outlet of the micro pump (15) through hoses (24), and the inlet of the micro pump (15) is communicated with the outlet of the liquid storage tank (23); an upper micro electromagnetic valve (21) is arranged on a hose (24) communicated with the upper micro channel working medium inlet (1031), and a lower micro electromagnetic valve (22) is arranged on the hose (24) communicated with the lower micro channel working medium inlet (101); the lower-layer micro-channel working medium outlet (102) and the upper-layer micro-channel working medium outlet (1032) are respectively communicated with the inlet of the liquid storage tank (23) through hoses (24).
4. The high heat flow chip package structure of claim 2, wherein the upper layer microchannel (103) is one of a rectangular microchannel, a trapezoidal microchannel, a triangular microchannel, a rectangular microchannel with triangular ribs, a rectangular microchannel with front and rear dense triangular ribs.
5. The high heat flow chip packaging structure according to claim 2, wherein a sliding plate (20) is respectively arranged outside the lower layer micro-channel working medium inlet (101) and the lower layer micro-channel working medium outlet (102), through holes corresponding to the positions of the lower layer micro-channel working medium inlet (101) and the lower layer micro-channel working medium outlet (102) are arranged on the sliding plate (20), and a protective cover (19) is arranged on the other side of the sliding plate (20);
the top cover (1) is also provided with a concave guide rail (17), two ends of the sliding plate (20) are provided with I-shaped lug plates (201), and one end of each I-shaped lug plate (201) is inserted into the concave guide rail (17) and fixed on the end face of the concave guide rail (17).
6. The high heat flow chip package structure according to claim 1, wherein the memory chip (2) and the logic chip (3) are fixed on the wiring layer (6) through a plurality of solder balls (4), and gaps among the solder balls (4) are filled with epoxy resin (5).
7. The high heat flow chip package structure according to claim 1, wherein through silicon vias (702) are formed in the silicon substrate (7), the silicon substrate (7) is disposed above the sealing layer (8), the sealing layer (8) is fixedly connected with the substrate (11) through solder balls (4), and gaps between the solder balls (4) are filled with epoxy resin (5).
8. The high heat flow chip packaging structure according to claim 1, further comprising a fixing frame (12) arranged on the substrate (11), wherein a motor (13) is arranged on the inner top surface of the fixing frame (12), a fan (14) is arranged below the motor (13) and connected with an output shaft of the motor (13), and the fan (14) is arranged above the top cover (1).
9. A real-time service temperature control method for a high heat flow chip package structure according to claim 8, characterized in that when a logic chip (3) and a memory chip are connected together2) The detected heat flux density is lower than 10W/cm 2 When the fan (14) is started by the motor (13), the logic chip (5) and the memory chip (4) are subjected to air cooling and heat dissipation;
when the heat flux density detected by the logic chip (3) and the memory chip (2) is not lower than 10W/cm 2 And below 50W/cm 2 When the fan (14) is turned off, the logic chip (3) and the memory chip (2) transmit opening signals to the micro pump (15) and the upper micro electromagnetic valve (21) through the PCB (16), the micro pump (15) is started and pumps cooling working medium to the upper micro channel (103), and single-sided liquid cooling heat dissipation is carried out on the logic chip (3) and the memory chip (2);
when the heat flux density detected by the logic chip (3) and the memory chip (2) is not lower than 50W/cm 2 And less than 100W/cm 2 When the micro pump (26), the upper micro electromagnetic valve (21) and the lower micro electromagnetic valve (22) are started, cooling working media are pumped to the upper micro channel (103) and the lower micro channel (701) simultaneously, and double-sided liquid cooling heat dissipation is carried out on the upper surface and the lower surface of the logic chip (3) and the upper surface and the lower surface of the storage chip (2);
when the heat flux density detected by the logic chip (3) and the memory chip (2) is not lower than 100W/cm 2 When the micro-pump (26), the motor (13), the micro-pump (26), the upper micro-electromagnetic valve (21) and the lower micro-electromagnetic valve (22) are started simultaneously, cooling working media are pumped simultaneously to the upper micro-channel (103) and the lower micro-channel (701), and air cooling is assisted when double-sided liquid cooling heat dissipation is carried out on the upper surface and the lower surface of the logic chip (3) and the upper surface and the lower surface of the memory chip (2).
10. The method for regulating and controlling the service temperature of the high-heat-flow chip packaging structure in real time according to claim 9, wherein the heat flow density value detected by the logic chip (3) and the storage chip (2) is derived from the temperature value acquired in the service process of the logic chip (3) and the storage chip (2), and the highest heat flow density value of the chip surface is obtained through chip operation.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US7990711B1 (en) * | 2010-02-24 | 2011-08-02 | International Business Machines Corporation | Double-face heat removal of vertically integrated chip-stacks utilizing combined symmetric silicon carrier fluid cavity and micro-channel cold plate |
| CN108400121A (en) * | 2018-01-16 | 2018-08-14 | 中南大学 | A kind of radiator for high heat flux density chip |
| CN115793804A (en) * | 2022-09-22 | 2023-03-14 | 温州城市大学 | Computer heat sink |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US6903929B2 (en) * | 2003-03-31 | 2005-06-07 | Intel Corporation | Two-phase cooling utilizing microchannel heat exchangers and channeled heat sink |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7990711B1 (en) * | 2010-02-24 | 2011-08-02 | International Business Machines Corporation | Double-face heat removal of vertically integrated chip-stacks utilizing combined symmetric silicon carrier fluid cavity and micro-channel cold plate |
| CN108400121A (en) * | 2018-01-16 | 2018-08-14 | 中南大学 | A kind of radiator for high heat flux density chip |
| CN115793804A (en) * | 2022-09-22 | 2023-03-14 | 温州城市大学 | Computer heat sink |
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