CN117420347B - Zero-crossing current detection circuit of DC-DC converter - Google Patents
Zero-crossing current detection circuit of DC-DC converter Download PDFInfo
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- CN117420347B CN117420347B CN202311743994.1A CN202311743994A CN117420347B CN 117420347 B CN117420347 B CN 117420347B CN 202311743994 A CN202311743994 A CN 202311743994A CN 117420347 B CN117420347 B CN 117420347B
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/175—Indicating the instants of passage of current or voltage through a given value, e.g. passage through zero
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- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention discloses a zero-crossing current detection circuit of a DC-DC converter, and relates to the technical field of power supply detection. The power supply comprises a current circuit, a voltage dividing circuit, a control circuit, an auxiliary circuit and a comparator COMP, wherein the input ends of the current circuit and the voltage dividing circuit are connected with a power supply INTMC. The invention controls the closing states of a third N-type MOS tube MN3, a fourth N-type MOS tube MN4, a fifth N-type MOS tube MN5 and a sixth N-type MOS tube MN6 through the closing states of an upper power tube and a lower power tube of the DC-DC converter, thereby changing the voltage of a voltage detection point SW, and detecting the voltage of the voltage detection point SW to obtain a zero-crossing current detection result of the DC-DC converter; whether the current in the DC-DC converter reaches the zero point or not is obtained by detecting the voltage of the voltage detection point SW, detection errors caused by the phase difference between the zero crossing point of the voltage and the zero crossing point of the current are avoided, and detection accuracy is improved.
Description
Technical Field
The invention relates to the technical field of power supply detection, in particular to a zero-crossing current detection circuit of a DC-DC converter.
Background
In the DC-DC converter circuit, when the load is in a light load condition, the output of the error amplifier is smaller in a continuous conduction mode, and the upper power tube conduction signal still cannot be turned over when the inductance current is zero. In order to ensure the characteristic of high light load efficiency of the system, the system is ensured to enter a discontinuous conduction mode by detecting the zero crossing point, when the lower power tube is conducted, the inductance current is reduced until the inductance current is reduced to zero current, the lower power tube is turned off, at the moment, the upper power tube and the lower power tube are both turned off, and the load is powered through an output capacitor, so that the light load efficiency function is realized.
In the prior art, voltage zero crossing point detection is mostly adopted for AC zero crossing point detection, namely actions such as a switch, a relay, a silicon controlled rectifier and the like in a zero crossing point moment control circuit are utilized, so that phenomena such as power consumption, heating, switching arc and the like can be reduced, the circuit has good stability and safety, and the service life of equipment is prolonged.
The defects of the prior art are as follows: for an alternating current circuit with a pure resistive load, the voltage zero crossing point and the current zero crossing point are synchronous, but in an actual circuit, the pure resistive load is few, most of the pure resistive load is a capacitive load or an inductive load, the voltage zero crossing point and the current zero crossing point always have a phase difference, and the detection is not accurate enough.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a zero-crossing current detection circuit for a DC-DC converter.
The embodiment of the invention provides a zero-crossing current detection circuit of a DC-DC converter, which comprises the following components: the input ends of the current circuit and the voltage dividing circuit are connected with a power supply INTMVCC;
the control circuit includes: the first N-type MOS transistor MN1, the second N-type MOS transistor MN2, the third N-type MOS transistor MN3, the fourth N-type MOS transistor MN4, the fifth N-type MOS transistor MN5 and the sixth N-type MOS transistor MN6;
the first output end of the voltage dividing circuit is connected with the drain electrode of the first N-type MOS tube MN1, and the second output end of the voltage dividing circuit is connected with the drain electrode of the second N-type MOS tube MN 2; the first output end of the current circuit is connected with one end of a resistor R1, the other end of the resistor R1 is connected with the grid electrode of the first N-type MOS tube MN1, and the second output end of the current circuit is connected with the grid electrode of the second N-type MOS tube MN 2;
the source electrode of the first N-type MOS tube MN1 is connected with the drain electrode of the third N-type MOS tube MN3 and the drain electrode of the fourth N-type MOS tube MN 4; the source electrode of the second N-type MOS tube MN2 is connected with the drain electrode of the fifth N-type MOS tube MN5 and the drain electrode of the sixth N-type MOS tube MN6;
the grid electrode of the third N-type MOS tube MN3 and the grid electrode of the sixth N-type MOS tube MN6 are connected with an upper power tube of the DC-DC converter through a port SN; the grid electrode of the fourth N-type MOS tube MN4 and the grid electrode of the fifth N-type MOS tube MN5 are connected with the lower power tube of the DC-DC converter through a port S;
the source of the fourth N-type MOS transistor MN4 is connected to one end of a resistor R5, the other end of the resistor R5 is connected to a voltage detection point SW, the source of the fifth N-type MOS transistor MN5 is connected to one end of a resistor R6, and the other end of the resistor R6 is connected to a power ground PGND;
and controlling the closing states of the third N-type MOS tube MN3, the fourth N-type MOS tube MN4, the fifth N-type MOS tube MN5 and the sixth N-type MOS tube MN6 through the closing states of the upper power tube and the lower power tube of the DC-DC converter so as to change the voltage of the voltage detection point SW, and detecting the voltage of the voltage detection point SW to obtain a zero-crossing current detection result of the DC-DC converter.
In addition, the first output end of the voltage dividing circuit is further connected to the positive input end of the comparator COMP, the second output end of the voltage dividing circuit is further connected to the negative input end of the comparator COMP, and when the voltage of the voltage detection point SW is 0, that is, the zero-crossing detection result is zero voltage, the level of the output end QZX of the comparator COMP is inverted.
In addition, the voltage dividing circuit includes: a resistor R2 and a resistor R3; one end of the resistor R2 and one end of the resistor R3 are connected with the power supply INTMC, the drain electrode of the first N-type MOS tube MN1 is connected with the other end of the resistor R2, and the end is used as a first output end of the voltage dividing circuit; the drain electrode of the second N-type MOS transistor MN2 is connected to the other end of the resistor R3, and the other end is used as the second output end of the voltage divider circuit.
In addition, the control circuit further includes: the source electrode of the third N-type MOS tube MN3 is connected with one end of a resistor R4, and the other end of the resistor R4 is grounded; the source electrode of the sixth N-type MOS transistor MN6 is connected to one end of the resistor R7, and the other end of the resistor R7 is grounded.
In addition, the current circuit includes: the current source IBIAS1, the first P type MOS tube MP1, the second P type MOS tube MP2, the seventh N type MOS tube MN7, the eighth N type MOS tube MN8 and the ninth N type MOS tube MN9;
one end of the current source IBIAS1, the source of the first P-type MOS tube MP1, and the source of the second P-type MOS tube MP2 are all connected to the power supply INTVCC;
the other end of the current source IBIAS1 is connected with the drain electrode of the seventh N-type MOS transistor MN7, the gate electrode of the eighth N-type MOS transistor MN8, and the gate electrode of the ninth N-type MOS transistor MN9;
the gate of the first P-type MOS transistor MP1 is connected to the drain of the first P-type MOS transistor MP1, the gate of the second P-type MOS transistor MP2, and the drain of the eighth N-type MOS transistor MN 8.
In addition, the device also comprises an auxiliary circuit, wherein the auxiliary circuit comprises a fourth P-type MOS tube MP4; the source electrode of the fourth P-type MOS tube MP4 is connected with the power source INTMC, the drain electrode of the fourth P-type MOS tube MP4 is connected with the source electrode of the sixth N-type MOS tube MN6, and the grid electrode of the fourth P-type MOS tube MP4 is connected with the grid electrode of the first P-type MOS tube MP1, the drain electrode of the first P-type MOS tube MP1 and the grid electrode of the second P-type MOS tube MP 2.
In addition, the auxiliary circuit further comprises a third P-type MOS tube MP3; the source electrode of the third P-type MOS tube MP3 and the grid electrode of the third P-type MOS tube MP3 are connected with the power source INTMC, and the drain electrode of the third P-type MOS tube MP3 is connected with the source electrode of the third N-type MOS tube MN 3.
In addition, the method further comprises the following steps: the auxiliary circuit further comprises a tenth N-type MOS tube; the grid electrode of the tenth N-type MOS tube MN10 and the drain electrode of the tenth N-type MOS tube MN10 are connected with the grid electrode of the second N-type MOS tube MN2, the source electrode of the tenth N-type MOS tube MN10 is connected with one end of a resistor R8, and the other end of the resistor R8 is grounded.
Compared with the prior art, the zero-crossing current detection circuit of the DC-DC converter has the following beneficial effects:
the closing states of the third N-type MOS tube MN3, the fourth N-type MOS tube MN4, the fifth N-type MOS tube MN5 and the sixth N-type MOS tube MN6 are controlled through the closing states of the upper power tube and the lower power tube of the DC-DC converter so as to change the voltage of the voltage detection point SW, and the voltage of the voltage detection point SW is detected to obtain a zero-crossing current detection result of the DC-DC converter. Whether the current in the DC-DC converter reaches the zero point or not is obtained by detecting the voltage of the voltage detection point SW, detection errors caused by the phase difference between the zero crossing point of the voltage and the zero crossing point of the current are avoided, and detection accuracy is improved.
Drawings
FIG. 1 is a circuit diagram of a zero crossing current detection circuit of a DC-DC converter provided in one embodiment;
fig. 2 is a circuit diagram of a comparator COMP of a zero-crossing current detection circuit of a DC-DC converter provided in one embodiment.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
In one embodiment, a zero-crossing current detection circuit of a DC-DC converter is provided, as shown in fig. 1, including:
a voltage divider circuit comprising: a resistor R2 and a resistor R3; one end of the resistor R2 and one end of the resistor R3 are connected with a power supply INTMC, the drain electrode of the first N-type MOS tube MN1 is connected with the other end of the resistor R2, and the end serves as a first output end of the voltage dividing circuit; the drain electrode of the second N-type MOS transistor MN2 is connected to the other end of the resistor R3, and the other end is used as the second output end of the voltage divider circuit.
A control circuit, comprising: the first output end of the voltage dividing circuit is connected with the drain electrode of the first N-type MOS tube MN1, and the second output end of the voltage dividing circuit is connected with the drain electrode of the second N-type MOS tube MN 2; the first output end of the current circuit is connected with one end of a resistor R1, the other end of the resistor R1 is connected with the grid electrode of a first N-type MOS tube MN1, and the second output end of the current circuit is connected with the grid electrode of a second N-type MOS tube MN 2; the source electrode of the first N-type MOS tube MN1 is connected with the drain electrode of the third N-type MOS tube MN3 and the drain electrode of the fourth N-type MOS tube MN 4; the source electrode of the second N-type MOS tube MN2 is connected with the drain electrode of the fifth N-type MOS tube MN5 and the drain electrode of the sixth N-type MOS tube MN6; the grid electrode of the third N-type MOS tube MN3 and the grid electrode of the sixth N-type MOS tube MN6 are connected with an upper power tube of the DC-DC converter through a port SN; the grid electrode of the fourth N-type MOS tube MN4 and the grid electrode of the fifth N-type MOS tube MN5 are connected with a lower power tube of the DC-DC converter through a port S; the source of the fourth N-type MOS tube MN4 is connected with one end of a resistor R5, the other end of the resistor R5 is connected with a voltage detection point SW, the source of the fifth N-type MOS tube MN5 is connected with one end of a resistor R6, and the other end of the resistor R6 is connected with a power ground end PGND. The source electrode of the third N-type MOS tube MN3 is connected with one end of a resistor R4, and the other end of the resistor R4 is grounded; the source electrode of the sixth N-type MOS tube MN6 is connected with one end of a resistor R7, and the other end of the resistor R7 is grounded.
A current circuit, comprising: the current source IBIAS1, the first P type MOS tube MP1, the second P type MOS tube MP2, the seventh N type MOS tube MN7, the eighth N type MOS tube MN8 and the ninth N type MOS tube MN9; one end of the current source IBIAS1, the source electrode of the first P type MOS tube MP1 and the source electrode of the second P type MOS tube MP2 are all connected with a power supply INTMC; the other end of the current source IBIAS1 is connected with the drain electrode of the seventh N-type MOS tube MN7, the grid electrode of the eighth N-type MOS tube MN8 and the grid electrode of the ninth N-type MOS tube MN9; the grid electrode of the first P type MOS tube MP1 is connected with the drain electrode of the first P type MOS tube MP1, the grid electrode of the second P type MOS tube MP2 and the drain electrode of the eighth N type MOS tube MN 8.
An auxiliary circuit comprising: the source electrode of the fourth P-type MOS tube MP4 is connected with a power source INTMC, the drain electrode of the fourth P-type MOS tube MP4 is connected with the source electrode of the sixth N-type MOS tube MN6, and the grid electrode of the fourth P-type MOS tube MP4 is connected with the grid electrode of the first P-type MOS tube MP1, the drain electrode of the first P-type MOS tube MP1 and the grid electrode of the second P-type MOS tube MP 2. The source electrode of the third P-type MOS tube MP3, the grid electrode of the third P-type MOS tube MP3 is connected with a power source INTMC, and the drain electrode of the third P-type MOS tube MP3 is connected with the source electrode of the third N-type MOS tube MN 3. The grid electrode of the tenth N-type MOS tube MN10 and the drain electrode of the tenth N-type MOS tube MN10 are connected with the grid electrode of the second N-type MOS tube MN2, the source electrode of the tenth N-type MOS tube MN10 is connected with one end of a resistor R8, and the other end of the resistor R8 is grounded.
As shown in fig. 2, the comparator COMP includes a second current circuit, a first-stage amplifying structure, a second-stage amplifying structure, and a third-stage amplifying structure, which has high accuracy and speed.
A second current circuit comprising: a current source IBIAS2, an eleventh N-type MOS transistor MN11; one end of the current source IBIAS2 is connected with a power source INTMC, and the other end of the current source IBIAS2 is connected with the drain electrode of the eleventh N-type MOS tube MN11, the grid electrode of the twelfth N-type MOS tube MN12, the grid electrode of the thirteenth N-type MOS tube MN13 and the grid electrode of the fourteenth N-type MOS tube MN14; the source electrode of the eleventh N-type MOS transistor MN11 is grounded.
A primary amplifying structure comprising: resistor R9, resistor R10, twelfth N-type MOS transistor MN12, fifteenth N-type MOS transistor MN15, sixteenth N-type MOS transistor MN16; one end of the resistor R9 and one end of the resistor R10 are both connected with a power supply INTMC, the other end of the resistor R9 is connected with the drain electrode of the fifteenth N-type MOS tube MN15, and one end of the resistor R10 is connected with the drain electrode of the sixteenth N-type MOS tube MN16; the source electrode of the fifteenth N-type MOS tube MN15 and the source electrode of the sixteenth N-type MOS tube MN16 are connected with the drain electrode of the twelfth N-type MOS tube MN 12; the source electrode of the twelfth N-type MOS transistor MN12 is grounded, and the source electrode of the thirteenth N-type MOS transistor MN13 is grounded. The primary amplifying structure adopts a resistor load to push the first pole to a far position, and smaller offset voltage and thermal noise are obtained.
A secondary amplifying structure comprising: fifth P-type MOS tube MP5, sixth P-type MOS tube MP6, seventeenth N-type MOS tube MN17, eighteenth N-type MOS tube MN18, thirteenth N-type MOS tube MN13; the source electrode of the fifth P-type MOS tube MP5 and the source electrode of the sixth P-type MOS tube MP6 are both connected with a power supply INTMC; the grid electrode of the fifth P type MOS tube MP5, the drain electrode of the fifth P type MOS tube MP5 and the drain electrode of the seventeenth N type MOS tube MN17 are connected with the grid electrode of the sixth P type MOS tube MP6, and the drain electrode of the sixth P type MOS tube MP6 is connected with the drain electrode of the eighteenth N type MOS tube MN 18; the source electrode of the seventeenth N-type MOS tube MN17 and the source electrode of the eighteenth N-type MOS tube MN18 are connected with the drain electrode of the thirteenth N-type MOS tube MN13, and the source electrode of the thirteenth N-type MOS tube MN13 is grounded. The two-stage amplifying structure adopts a five-tube differential pair structure to realize the conversion from double-end input to single-end output.
A three stage amplifying structure comprising: seventh P-type MOS tube MP7, fourteenth N-type MOS tube MN14; the source electrode of the seventh P-type MOS tube MP7 is connected with a power source INTMC, and the grid electrode of the seventh P-type MOS tube MP7 is connected with the drain electrode of the sixth P-type MOS tube MP 6; the drain electrode of the seventh P-type MOS tube MP7 and the drain electrode of the fourteenth N-type MOS tube MN14 are connected with the input end of the inverter INV1, and the source electrode of the fourteenth N-type MOS tube MN14 is grounded; an output terminal of the inverter INV1 is connected to an input terminal of the inverter INV2, and an output terminal of the inverter INV2 is connected to an output terminal QZX of the zero current detection circuit. The three-stage amplifying structure is a common source amplifier, and the gain is further improved.
The gate of the fifteenth N-type MOS transistor MN15 is used as the positive input terminal of the comparator COMP, the gate of the sixteenth N-type MOS transistor MN16 is used as the negative input terminal of the comparator COMP, and the output terminal of the inverter INV3 is used as the output terminal QZX of the comparator COMP.
The specific detection mode is as follows: when the lower power tube in the DC-DC converter is conducted and the upper power tube is turned off, the fourth N-type MOS tube MN4 and the fifth N-type MOS tube MN5 are conducted, the third N-type MOS tube MN3 and the sixth N-type MOS tube are turned off, inductance current in the DC-DC converter flows to the voltage detection point SW through the on-resistance of the lower power tube, the voltage of the voltage detection point SW carries inductance current information, the value of the voltage detection point SW is negative, when the current is gradually reduced, the voltage of the voltage detection point SW is gradually increased, and when the voltage is increased to zero, the voltage represents that the inductance current flowing through the voltage detection point is zero, and a signal of the output end QZX of the zero current detection circuit is turned over.
When the lower power tube in the DC-DC converter is turned off and the upper power tube is turned on, the fourth N-type MOS tube MN4 and the fifth N-type MOS tube MN5 are turned off, the third N-type MOS tube MN3 and the sixth N-type MOS tube MN6 are turned on, the current information collecting function is shielded, and the zero current detection circuit output end QZX is normally low level.
Because the circuit has delay, offset voltage is properly added into the circuit, when the lower power tube is turned off, the inductance current is precisely zero, and the added offset voltage is as follows:
wherein IBLAS1 is the current of the current source blast 1, and R1 is the resistance of the resistor R1.
The above examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (8)
1. A zero-crossing current detection circuit of a DC-DC converter, comprising: the input ends of the current circuit and the voltage dividing circuit are connected with a power supply INTMVCC;
the control circuit includes: the first N-type MOS transistor MN1, the second N-type MOS transistor MN2, the third N-type MOS transistor MN3, the fourth N-type MOS transistor MN4, the fifth N-type MOS transistor MN5 and the sixth N-type MOS transistor MN6;
the first output end of the voltage dividing circuit is connected with the drain electrode of the first N-type MOS tube MN1, and the second output end of the voltage dividing circuit is connected with the drain electrode of the second N-type MOS tube MN 2; the first output end of the current circuit is connected with one end of a resistor R1, the other end of the resistor R1 is connected with the grid electrode of the first N-type MOS tube MN1, and the second output end of the current circuit is connected with the grid electrode of the second N-type MOS tube MN 2;
the source electrode of the first N-type MOS tube MN1 is connected with the drain electrode of the third N-type MOS tube MN3 and the drain electrode of the fourth N-type MOS tube MN 4; the source electrode of the second N-type MOS tube MN2 is connected with the drain electrode of the fifth N-type MOS tube MN5 and the drain electrode of the sixth N-type MOS tube MN6;
the grid electrode of the third N-type MOS tube MN3 and the grid electrode of the sixth N-type MOS tube MN6 are connected with an upper power tube of the DC-DC converter through a port SN; the grid electrode of the fourth N-type MOS tube MN4 and the grid electrode of the fifth N-type MOS tube MN5 are connected with the lower power tube of the DC-DC converter through a port S;
the source of the fourth N-type MOS transistor MN4 is connected to one end of a resistor R5, the other end of the resistor R5 is connected to a voltage detection point SW, the source of the fifth N-type MOS transistor MN5 is connected to one end of a resistor R6, and the other end of the resistor R6 is connected to a power ground PGND;
and controlling the closing states of the third N-type MOS tube MN3, the fourth N-type MOS tube MN4, the fifth N-type MOS tube MN5 and the sixth N-type MOS tube MN6 through the closing states of the upper power tube and the lower power tube of the DC-DC converter so as to change the voltage of the voltage detection point SW, and detecting the voltage of the voltage detection point SW to obtain a zero-crossing current detection result of the DC-DC converter.
2. A zero-crossing current detection circuit of a DC-DC converter as claimed in claim 1, wherein the first output terminal of the voltage dividing circuit is further connected to a positive input terminal of a comparator COMP, and the second output terminal of the voltage dividing circuit is further connected to a negative input terminal of the comparator COMP, and when the voltage at the voltage detection point SW is 0, i.e. the zero-crossing detection result is zero voltage, the level of the output terminal QZX of the comparator COMP is inverted.
3. A zero-crossing current detection circuit of a DC-DC converter as set forth in claim 1, wherein said voltage dividing circuit comprises: a resistor R2 and a resistor R3; one end of the resistor R2 and one end of the resistor R3 are connected with the power supply INTMC, the drain electrode of the first N-type MOS tube MN1 is connected with the other end of the resistor R2, and the end is used as a first output end of the voltage dividing circuit; the drain electrode of the second N-type MOS transistor MN2 is connected to the other end of the resistor R3, and the other end is used as the second output end of the voltage divider circuit.
4. The zero-crossing current detection circuit of a DC-DC converter according to claim 1, wherein the control circuit further comprises: the source electrode of the third N-type MOS tube MN3 is connected with one end of a resistor R4, and the other end of the resistor R4 is grounded; the source electrode of the sixth N-type MOS transistor MN6 is connected to one end of the resistor R7, and the other end of the resistor R7 is grounded.
5. A zero-crossing current detection circuit of a DC-DC converter as set forth in claim 4, wherein said current circuit comprises: the current source IBIAS1, the first P type MOS tube MP1, the second P type MOS tube MP2, the seventh N type MOS tube MN7, the eighth N type MOS tube MN8 and the ninth N type MOS tube MN9;
one end of the current source IBIAS1, the source of the first P-type MOS tube MP1, and the source of the second P-type MOS tube MP2 are all connected to the power supply INTVCC;
the other end of the current source IBIAS1 is connected with the drain electrode of the seventh N-type MOS transistor MN7, the gate electrode of the eighth N-type MOS transistor MN8, and the gate electrode of the ninth N-type MOS transistor MN9;
the gate of the first P-type MOS transistor MP1 is connected to the drain of the first P-type MOS transistor MP1, the gate of the second P-type MOS transistor MP2, and the drain of the eighth N-type MOS transistor MN 8.
6. The zero-crossing current detection circuit of a DC-DC converter according to claim 5, further comprising an auxiliary circuit comprising a fourth P-type MOS transistor MP4; the source electrode of the fourth P-type MOS tube MP4 is connected with the power source INTMC, the drain electrode of the fourth P-type MOS tube MP4 is connected with the source electrode of the sixth N-type MOS tube MN6, and the grid electrode of the fourth P-type MOS tube MP4 is connected with the grid electrode of the first P-type MOS tube MP1, the drain electrode of the first P-type MOS tube MP1 and the grid electrode of the second P-type MOS tube MP 2.
7. The zero-crossing current detection circuit of a DC-DC converter according to claim 6, wherein the auxiliary circuit further comprises a third P-type MOS transistor MP3; the source electrode of the third P-type MOS tube MP3 and the grid electrode of the third P-type MOS tube MP3 are connected with the power source INTMC, and the drain electrode of the third P-type MOS tube MP3 is connected with the source electrode of the third N-type MOS tube MN 3.
8. The zero-crossing current detection circuit of a DC-DC converter of claim 6 wherein said auxiliary circuit further comprises a tenth N-type MOS transistor; the grid electrode of the tenth N-type MOS tube MN10 and the drain electrode of the tenth N-type MOS tube MN10 are connected with the grid electrode of the second N-type MOS tube MN2, the source electrode of the tenth N-type MOS tube MN10 is connected with one end of a resistor R8, and the other end of the resistor R8 is grounded.
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| CN202311743994.1A CN117420347B (en) | 2023-12-19 | 2023-12-19 | Zero-crossing current detection circuit of DC-DC converter |
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| CN202311743994.1A CN117420347B (en) | 2023-12-19 | 2023-12-19 | Zero-crossing current detection circuit of DC-DC converter |
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| CN117420347B true CN117420347B (en) | 2024-02-20 |
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| US9774258B2 (en) * | 2015-08-10 | 2017-09-26 | Nxp Usa, Inc. | Zero-current crossing detection circuits |
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