CN117353821A

CN117353821A - Optical module

Info

Publication number: CN117353821A
Application number: CN202311126731.6A
Authority: CN
Inventors: 王安忆; 王麟
Original assignee: Hisense Broadband Multimedia Technology Co Ltd
Current assignee: Hisense Broadband Multimedia Technology Co Ltd
Priority date: 2020-04-22
Filing date: 2020-04-22
Publication date: 2024-01-05
Also published as: CN111555810B; CN111555810A

Abstract

The optical module and the data transmission method provided by the application comprise the following steps: one end of the circuit board is provided with a golden finger; the MCU is arranged on the circuit board and is connected with the golden finger through the I2C interface so as to communicate the MCU with the upper computer I2C; the MAC chip is arranged on the circuit board, is connected with the MCU through a serial port and is connected with the golden finger through the MCU; wherein the MCU is configured to: receiving target data which need to be sent to the MAC chip by the upper computer through the I2C interface, and storing the target data into a first buffer area; the target data stored in the first buffer area is sent to the MAC chip through the serial port; receiving the return value data of the MAC chip through the serial port, and storing the return value data into the second buffer area; and receiving a reading instruction of the upper computer, and sending the return value data stored in the second buffer area to the upper computer through the I2C interface. The MAC chip is debugged by the upper computer through I2C communication, so that the upper computer can conveniently debug the MAC chip.

Description

Optical module

The present application is a divisional application, the application number of the original application is 202010322673.4, the original application date is 22 of 2020, 04 month, and the entire content of the original application is incorporated herein by reference.

Technical Field

The present disclosure relates to the field of optical communications technologies, and in particular, to an optical module and a data transmission method.

Background

In the new business and application modes of cloud computing, mobile internet, video, etc., the optical communication technology can be used. In optical communication, the optical module is a tool for realizing mutual conversion of optical and electrical signals, and is one of key devices in optical communication equipment. In the use of the optical module, the optical module is connected with an upper computer such as an optical network terminal through a golden finger, and then a chip on the optical module is communicated with the upper computer through the golden finger. For example, the MCU on the optical module communicates with the upper computer I2C through the I2C pin of the golden finger.

Among the optical modules, there is a PON block optical module, which includes a MAC (Media Access control, medium access control) chip, where an upper computer needs to perform setting and reading of a physical address of the MAC chip by communicating with the MAC chip, and a main working state and a debugging mode of the MAC chip are implemented through a serial port. However, since the golden finger interface of the PON STICK optical module needs to refer to protocols such as SFP-MSA, and the number of pins of the golden finger is limited, and there are no redundant pins for implementing serial communication between the MAC chip and the host computer, debugging the MAC chip by the PON STICK optical module is a great difficulty.

Disclosure of Invention

The embodiment of the application provides an optical module and a data transmission method, which are used for realizing that an upper computer debugs an MAC chip through I2C communication.

In a first aspect, the present application provides an optical module comprising:

the circuit board is provided with a golden finger at one end;

the MCU is arranged on the circuit board and comprises an I2C interface and an MCU serial port, and the golden finger is connected through the I2C interface so that the MCU is communicated with an upper computer I2C;

the MAC chip is arranged on the circuit board and comprises an MAC chip serial port, and the MAC chip serial port is connected with the MCU serial port;

wherein the MCU is configured to:

receiving target data which need to be sent to the MAC chip by an upper computer through an I2C interface, and storing the target data into a first buffer area;

transmitting the target data stored in the first buffer area to the MAC chip through an MCU serial port;

receiving the return value data of the MAC chip through an MCU serial port, and storing the return value data into a second buffer area;

and receiving a reading instruction of the upper computer, and enabling the upper computer to read the return value data of the second buffer area through an I2C interface.

In a second aspect, the present application provides a data transmission method applied to an optical module, where the optical module includes an MCU and a MAC chip; the method comprises the following steps:

the MCU receives target data which need to be sent to the MAC chip by the upper computer through an I2C interface, and stores the target data into a first buffer area;

the MCU sends the target data stored in the first buffer area to the MAC chip through an MCU serial port;

the MCU receives the return value data of the MAC chip through a serial port and stores the return value data into a second buffer area;

and the MCU receives a reading instruction of the upper computer, so that the upper computer reads the return value data of the second buffer area through an I2C interface.

According to the optical module and the data transmission method, the I2C interface of the MCU in the optical module is connected with the golden finger, and the MAC chip is connected with the MCU through the serial port. Wherein: when the MCU is connected with the upper computer through the golden finger, the MCU establishes I2C communication with the upper computer; if the upper computer needs to send target data to the MAC chip, the MCU receives the target data which needs to be sent to the MAC chip by the upper computer through the I2C interface, and the target data is stored in the first buffer area; then, the target data of the first buffer area is sent to the MAC chip through the serial port; the MAC chip generates return value data of the upper computer needing the return value, and returns the return value data to the MCU through the serial port; the MCU receives the return value data through the serial port and stores the return value data into the second buffer area; the MCU receives a return value data reading instruction of the upper computer, and sends the return value data stored in the second buffer area to the upper computer through the I2C interface. Therefore, the I2C-to-serial port communication between the MAC chip and the upper computer is realized through the MCU, the problem that the number of pins of the golden finger is limited and no redundant pins are used for realizing serial port communication between the MAC chip and the upper computer is solved, the upper computer is realized to debug the MAC chip through the I2C-to-serial port communication, and the upper computer is further convenient to debug the MAC chip.

Drawings

In order to more clearly illustrate the technical solution of the present invention, the drawings that are needed in the embodiments will be briefly described below, and it will be obvious to those skilled in the art that other drawings can be obtained from these drawings without inventive effort.

FIG. 1 is a schematic diagram of the connection relationship of an optical communication terminal;

fig. 2 is a schematic diagram of an optical network terminal structure;

fig. 3 is a schematic structural diagram of an optical module according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of an exploded structure of an optical module according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of a circuit board according to an embodiment of the present invention;

FIG. 6 is a schematic diagram of MCU data transmission according to an embodiment of the present invention;

fig. 7 is a basic flow chart of a data transmission method according to an embodiment of the present invention.

Detailed Description

The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

One of the key links of optical fiber communication is the mutual conversion of optical signals and electric signals. The optical fiber communication uses the optical signal carrying information to transmit in the information transmission equipment such as optical fiber/optical waveguide, and the information transmission with low cost and low loss can be realized by utilizing the passive transmission characteristic of the light in the optical fiber/optical waveguide; in order to establish an information connection between an information transmission device such as an optical fiber and an information processing device such as a computer, it is necessary to perform interconversion between an electric signal and an optical signal.

The optical module realizes the function of the mutual conversion of the optical signal and the electric signal in the technical field of optical fiber communication, and the mutual conversion of the optical signal and the electric signal is the core function of the optical module. The optical module is electrically connected with an external upper computer through a golden finger on an internal circuit board of the optical module, and main electrical connection comprises power supply, I2C signals, data signals, grounding and the like; the electrical connection mode realized by the golden finger has become the mainstream connection mode of the optical module industry, and on the basis of the main connection mode, the definition of pins on the golden finger forms various industry protocols/specifications.

Fig. 1 is a schematic diagram of a connection relationship of an optical communication terminal. As shown in fig. 1, the connection of the optical communication terminal mainly includes the interconnection among the optical network terminal 100, the optical module 200, the optical fiber 101 and the network cable 103;

one end of the optical fiber 101 is connected with a remote server, one end of the network cable 103 is connected with local information processing equipment, and the connection between the local information processing equipment and the remote server is completed by the connection between the optical fiber 101 and the network cable 103; and the connection between the optical fiber 101 and the network cable 103 is made by the optical network terminal 100 having the optical module 200.

The optical port of the optical module 200 is externally connected to the optical fiber 101, and bidirectional optical signal connection is established with the optical fiber 101; the electrical port of the optical module 200 is externally connected into the optical network terminal 100, and bidirectional electrical signal connection is established with the optical network terminal 100; the method comprises the steps that the mutual conversion of optical signals and electric signals is realized in an optical module, so that information connection is established between an optical fiber and an optical network terminal; specifically, the optical signal from the optical fiber is converted into an electrical signal by the optical module and then input to the optical network terminal 100, and the electrical signal from the optical network terminal 100 is converted into an optical signal by the optical module and input to the optical fiber.

The optical network terminal is provided with an optical module interface 102, which is used for accessing the optical module 200 and establishing bidirectional electric signal connection with the optical module 200; the optical network terminal is provided with a network cable interface 104 which is used for accessing the network cable 103 and establishing bidirectional electric signal connection with the network cable 103; the optical module 200 and the network cable 103 are connected through the optical network terminal 100, specifically, the optical network terminal transmits signals from the optical module to the network cable, and transmits signals from the network cable to the optical module, and the optical network terminal is used as an upper computer of the optical module to monitor the operation of the optical module.

So far, the remote server establishes a bidirectional signal transmission channel with the local information processing equipment through the optical fiber, the optical module, the optical network terminal and the network cable.

Common information processing apparatuses include routers, switches, electronic computers, and the like; the optical network terminal is an upper computer of the optical module, which provides data signals for the optical module and receives data signals from the optical module, and the common optical module upper computer also includes an optical line terminal and the like.

Fig. 2 is a schematic diagram of an optical network terminal structure. As shown in fig. 2, the optical network terminal 100 includes a circuit board 105, and a cage 106 is provided on a surface of the circuit board 105; an electrical connector is arranged in the cage 106 and is used for accessing an optical module electrical port such as a golden finger; the cage 106 is provided with a radiator 107, and the radiator 107 has a convex portion such as a fin that increases a heat radiation area.

The optical module 200 is inserted into an optical network terminal, specifically, an electrical port of the optical module is inserted into an electrical connector inside the cage 106, and the optical port of the optical module is connected to the optical fiber 101.

The cage 106 is positioned on the circuit board, and the electrical connector on the circuit board is wrapped in the cage, so that the electrical connector is arranged inside the cage; the light module is inserted into the cage, the light module is fixed by the cage, and the heat generated by the light module is conducted to the cage 106 and then diffused through the heat sink 107 on the cage.

Fig. 3 is a schematic structural diagram of an optical module according to an embodiment of the present invention, and fig. 4 is an exploded structural diagram of an optical module according to an embodiment of the present invention. As shown in fig. 3 and 4, the optical module 200 provided by the embodiment of the present invention includes an upper case 201, a lower case 202, an unlocking member 203, a circuit board 300, a light emitting assembly 400, and a light receiving assembly 500;

the upper case 201 is covered on the lower case 202 to form a packing cavity having two openings; the outer contour of the wrapping cavity is generally square, and specifically, the lower shell comprises a main board and two side boards which are positioned on two sides of the main board and are perpendicular to the main board; the upper shell comprises a cover plate, and the cover plate covers the two side plates of the upper shell to form a wrapping cavity; the upper shell can further comprise two side walls which are positioned on two sides of the cover plate and are perpendicular to the cover plate, and the two side walls are combined with the two side plates so as to realize that the upper shell covers the lower shell.

The two openings can be two ends openings (204, 205) in the same direction or two openings in different directions; one opening is an electric port 204, and a golden finger of the circuit board extends out of the electric port 204 and is inserted into an upper computer such as an optical network terminal; the other opening is an optical port 205 for external optical fiber access to connect the light emitting assembly 400 and the light receiving assembly 500 inside the optical module; the circuit board 300, the light emitting assembly 400, the light receiving assembly 500, and other optoelectronic devices are located in the encapsulation cavity.

The assembly mode of combining the upper shell and the lower shell is adopted, so that devices such as the circuit board 300, the light emitting assembly 400, the light receiving assembly 500 and the like can be conveniently installed in the shells, and the upper shell and the lower shell form an encapsulation protection shell of the outermost layer of the optical module; the upper shell and the lower shell are generally made of metal materials, so that electromagnetic shielding and heat dissipation are facilitated; the housing of the optical module is not generally made into an integral part, so that the positioning part, the heat dissipation part and the electromagnetic shielding part cannot be installed when devices such as a circuit board are assembled, and the production automation is not facilitated.

The unlocking component 203 is located on the outer wall of the lower housing 202, and is used for realizing or releasing the fixed connection between the optical module and the host computer.

The unlocking part 203 is provided with a clamping part matched with the upper computer cage; pulling the end of the unlocking member can relatively move the unlocking member on the surface of the outer wall; the optical module is inserted into a cage of the upper computer, and the optical module is fixed in the cage of the upper computer by a clamping component of the unlocking component; the unlocking part is pulled, and the clamping part of the unlocking part moves along with the unlocking part, so that the connection relation between the clamping part and the upper computer is changed, the clamping relation between the optical module and the upper computer is relieved, and the optical module can be pulled out of the cage of the upper computer.

The circuit board 300 is positioned in a housing cavity formed by the upper and housing. The circuit board 300 is provided with circuit wiring chips, capacitors, resistors and other electrical devices. The chip to be set is selected according to the requirement of the product, and common chips comprise a microprocessor MCU, a clock data recovery chip CDR, a laser driving chip, a transimpedance amplification TIA chip, a limiting amplification LA chip, a power management chip and the like. The circuit board 300 connects the electrical devices in the optical module together according to a circuit design through circuit wiring, so as to realize electrical functions such as power supply, electrical signal transmission, grounding and the like.

The circuit board 300 is generally a hard circuit board, and the hard circuit board can also realize a bearing function due to the relatively hard material, for example, the hard circuit board can stably bear chips; when the light emitting element 205 and the light receiving element 206 are located on the circuit board, the hard circuit board can also provide a smooth load bearing; the hard circuit board can also be inserted into an electric connector in the upper computer cage, specifically, a metal pin/golden finger is formed on the surface of one side tail end of the hard circuit board and is used for being connected with the electric connector; these are all inconvenient to implement with flexible circuit boards.

The transimpedance amplifying chip and the light receiving chip are closely related, the short-distance short-wiring design can ensure good received signal quality, and in one packaging form of the optical module, the transimpedance amplifying chip and the light receiving chip are packaged together in an independent packaging body, such as the same coaxial tube shell TO or the same square cavity; the independent package is independent of the circuit board 300, and the light receiving chip and the transimpedance amplifying chip are electrically connected with the circuit board 300 through the independent package; in another packaging configuration of the optical module, the light receiving chip and the transimpedance amplifying chip may be disposed on the surface of the circuit board 300 instead of using a separate package. Of course, the light receiving chip may be packaged independently, and the transimpedance amplifying chip may be disposed on the circuit board 300, so that the received signal quality can meet certain relatively low requirements.

The chips on the circuit board 300 may be all-in-one chips, for example, a laser driving chip and an MCU chip are integrated into one chip, or a laser driving chip, a limiting amplifying chip and an MCU chip are integrated into one chip, and the chips are integrated by circuits, but the functions of the circuits are not lost due to aggregation, and only the circuit morphology is integrated. Therefore, when the circuit board 300 is provided with three independent chips of the MCU, the laser driving chip and the limiting amplifying chip, the scheme is equivalent to that of a single chip with three functions.

The circuit board 300 is a carrier of main devices of the optical module, and devices which are not arranged on the circuit board 300 are finally electrically connected with the circuit board 300, and a connector on the circuit board 300 realizes the electrical connection of the optical module and an upper computer thereof. For example, the light emitting assembly 400 and the light receiving assembly 500 in fig. 4. The light emitting assembly 400 and the light receiving assembly 500 may be collectively referred to as an optical sub-module. The optical transmitting assembly 400 and the optical receiving assembly 500 are used for realizing the transmission of optical signals and the reception of optical signals. The light emitting assembly 400 and the light receiving assembly 500 may be combined together to form an optical transceiver structure.

A flexible circuit board is also used in part of the optical modules and is used as a supplement of the hard circuit board; the flexible circuit board is generally used in cooperation with the hard circuit board, for example, the hard circuit board and the optical transceiver can be connected by using the flexible circuit board.

In this embodiment, the light emitting module 400 is physically separated from the circuit board by a coaxial TO package, and is electrically connected by a flexible board. In this embodiment, the light receiving component 500 also uses a coaxial TO package, which is physically separated from the circuit board, and is electrically connected through a flexible board. In another common implementation, the light emitting assembly 400 and the light receiving assembly 500 may be disposed on a surface of the circuit board 300.

The surface of the end part of the circuit board 300 is provided with a golden finger 301 which consists of a pin mutually independent, the circuit board 300 is inserted into an electric connector in a cage, and the golden finger is electrically connected with an upper computer. And information can be transferred between the upper computer and the optical module by adopting an I2C protocol through an I2C pin.

The upper computer can write information into the optical module, specifically, the upper computer can write information into a register of the MCU in the optical module; the optical module cannot write information into the upper computer, when the optical module needs to provide information to the upper computer, the optical module writes the information into a preset register (such as a transmission status register and a data transmission failure register set in this embodiment) in the optical module, and the upper computer reads the register, where the register of the optical module is generally integrated in the MCU of the optical module, or may be independently disposed on the circuit board 300 of the optical module.

In some optical modules, the optical modules include a MAC chip disposed on the circuit board 300. Further, the upper computer needs to establish communication with the MAC chip, such as an instruction for setting and reading the physical address of the MAC chip by the upper computer. The MAC chip includes a serial port of the MAC chip, and the main working state and the debugging mode of the MAC chip are realized through the serial port, and because the number of pins on the golden finger 301 is limited, usually, no pins are used for realizing serial port communication between the MAC chip and the upper computer. According to the embodiment of the application, the MCU comprises an I2C interface and an MCU serial port, so that the MAC chip is communicated with the upper computer through the MCU.

Fig. 5 is a block diagram of a circuit board 300 according to an embodiment of the present application. As shown in fig. 5, the light emitting module 400 and the light receiving module 500 are connected to the circuit board 300 through a flexible circuit board, and the circuit board 300 further includes thereon an MCU302 and a MAC chip 303. The I2C interface of the MCU302 is connected with the golden finger 301, and the MCU302 establishes I2C communication with the upper computer through the golden finger 301 for realizing data interaction with the upper computer. The serial port of the MAC chip 303 is connected to the serial port of the MCU302, and the MAC chip 303 performs serial port communication with the MCU 302. In the embodiment of the application, for example, the MCU302 is connected with the upper computer through the I2C pin of the golden finger based on the SFF8472 protocol, but is not limited to the SFF8472 protocol, and is also connected with other pins of the golden finger according to other protocols.

Based on the above configuration, in the data transmission process, the MCU302 can receive data (hereinafter referred to as target data) from the host computer through the gold finger 301 and store the target data to its internal preset data storage area. Therefore, the MCU302 establishes I2C communication with the upper computer through the golden finger 301, and can be used for realizing the forwarding of data between the MAC chip and the upper computer. For example, the upper computer sends the target data to be sent to the MAC chip 303 to the MCU302 through the golden finger, the MCU302 receives the target data to be sent to the MAC chip 303 by the upper computer, then the MCU302 forwards the received target data to the MAC chip 303 through the serial port, the data generated after processing by the MAC chip 303 is transmitted to the MCU302 through the serial port return value, and the upper computer reads the MCU302 to obtain the return value of the MAC chip 303.

Fig. 6 is a schematic diagram of MCU data transmission according to an embodiment of the present application. As shown in fig. 6, the MCU302 is connected with the upper computer through the I2C pin of the golden finger, so as to implement the I2C communication between the MCU302 and the upper computer; the MCU302 is connected to the MAC chip 303 through a serial port. Optionally, a Transmit (TX) pin of MCU302 is connected to a Receive (RX) pin of MAC chip 303, and a Receive (RX) pin of MCU302 is connected to a Transmit (TX) pin of MAC chip 303.

As shown in fig. 6, the upper computer needs to send the target data to the MAC chip 303, writes the target data into the MCU302 by the golden finger, sends the target data to the MAC chip 303 through the MCU302, then the MAC chip 303 receives the target data, returns the processed data value to the MCU302, and reads the returned data value returned to the MCU302 by the golden finger. Furthermore, in the optical module provided in the embodiment of the present application, the communication between the upper computer and the MAC chip 303 is implemented through the MCU 302.

In order to orderly and accurately perform communication between the upper computer and the MAC chip 303, the optical module includes a first buffer area and a second buffer area. Optionally, the first buffer and the second buffer are disposed in the MCU 302. The first buffer area is used for storing target data which needs to be sent to the MAC chip 303 by the upper computer, i.e. the first buffer area is used for writing target data which needs to be sent to the MAC chip 303 by the upper computer; the second buffer is used for storing the return value data of the MAC chip 303, which needs to be returned to the upper computer, that is, the second buffer is used for reading by the upper computer to obtain the return value data of the MAC chip 303. Optionally, the buffer lengths of the first buffer and the second buffer are fixed values, for example, the buffer lengths of the first buffer and the second buffer are 128 bytes.

Optionally, the first buffer and the second buffer are located on page 0xDE of the MCU 302. When the upper computer writes the target data to be sent to the MAC chip 303 into the first buffer, the upper computer writes the debug password into the MCU302, and the MCU302 verifies the debug password written by the upper computer. If the MCU302 verifies that the debug password written by the upper computer is correct, the MCU302 allows the upper computer to write the target data to be sent to the MAC chip 303 into the first buffer. The data written in the first cache area can be effectively prevented from being tampered by verifying the debugging password. Similarly, when writing data into the second buffer area, the debugging password can be verified, so that the data written into the second buffer area is further prevented from being tampered.

Optionally, the MCU302 receives the debug password written by the host computer. For example, the A2[7B ] address of MCU302 is used to write the debug password and the A2[7F ] address is used to write page select value 0xDE. If the host computer needs to send the target data to the MAC chip 303, the debug password is written at the A2[7B ] address first, and then the page select value 0xDE is written at the A2[7F ] address.

Further, in the embodiment of the present application, the MCU302 is further configured to buffer the start sending flag bit. If the MCU302 receives the target data that the upper computer needs to send to the MAC chip 303, it will start sending the flag bit. When the MCU302 detects that the transmission start flag bit is set, it starts to transmit the target data received from the upper computer to the MAC chip 303, that is, the transmission flag bit is used to confirm when to start to transmit the target data received from the upper computer to the MAC chip 303. For example, the MCU302 receives the target data that the host computer needs to send to the MAC chip 303, and sets the start transmission flag position to "1".

Optionally, the start transmission flag bit is set in the buffer of the MCU302, e.g., a buffer different from the first buffer and the second buffer. Optionally, the MCU302 reads the sending flag bit in real time, and if the sending start flag bit is read, sends the target data of the first buffer area to the MAC chip 303. Further, after the MCU302 transmits the target data of the first buffer to the MAC chip 303, the MCU302 clears the target data of the first buffer and resets the start transmission flag bit. Further, the data storage and transmission of the next time the upper computer needs to transmit to the MAC chip 303 are facilitated. For example, after the MCU302 transmits the target data of the first buffer to the MAC chip 303, the start transmission flag position is "0".

In the embodiment of the present application, the end of the target data that the upper computer needs to send to the MAC chip 303 carries a data end character. Monitoring data end characters in the process of storing target data in the first buffer area; if the data ending character is detected, the target data is stored in the first buffer area, namely the target data written in the first buffer area by the upper computer takes the data ending character as an ending character, and the writing of the data is ended when the data ending character is encountered in the writing process. Optionally, the data end character includes 0x0A and 0x0D, that is, the target data written into the first buffer by the host computer uses 0x0A and 0x0D as end symbols. In addition, in the process that the host computer writes the target data into the first buffer area of the MCU302, the length of the target data written into the first buffer area is detected, and if the data length of the target data written into the first buffer area by the host computer exceeds the buffer length of the first buffer area, the storage of the target data into the first buffer area is ended.

Further, in the process that the MCU302 transmits the target data to the MAC chip 303, a data end character is detected; if the data end character is encountered, the transmission of data to the MAC chip 303 is stopped.

When the MCU302 receives the return value data of the MAC chip 303, detecting the length of the return value data written into the second buffer; if the return value data length of the MAC chip 303 exceeds the buffer length of the second buffer, the MCU302 ends to receive the return value data of the MAC chip 303.

In this embodiment, if the MCU302 sends the target data stored in the first buffer to the MAC chip 303, the waiting time for receiving the return value data is monitored; if the waiting time for receiving the return value data is less than or equal to the threshold waiting time, receiving the return value data of the MAC chip, and storing the received return value data into a second buffer area; if the waiting time exceeds the threshold waiting time, the return value data of the MAC chip is not received. Typically the threshold latency may be set to one communication period, e.g. 200ms. In this way, timeliness of receiving return value data is facilitated.

Or, in this embodiment of the present application, if the MCU302 sends the target data stored in the first buffer to the MAC chip 303, the threshold accumulation time for receiving the return value data of the MAC chip is obtained; and if the accumulated time of the received return value data of the MAC chip is greater than the threshold accumulated time, ending storing the received return value data into the second buffer. This also helps to ensure timeliness of receiving return value data.

In this embodiment of the present application, the upper computer reads the second buffer area in the MCU302 according to the communication period, and obtains the return value data of the MAC chip 303 from the second buffer area. For example, after the upper computer writes the target data into the first buffer area in the MCU302, the upper computer waits for a communication period and then sends an instruction for reading the return value data of the MAC chip in the second buffer area to the MCU302, and the MCU302 feeds back the return value data of the MAC chip 303 to the upper computer according to the received instruction for reading the return value data of the MAC chip. Further, after the upper computer reads the returned value data of the MAC chip in the second buffer, the returned value data of the MAC chip in the second buffer is cleared.

The application provides an optical module, MCU connects the golden finger in optical module, and the MAC chip passes through MCU and connects the golden finger. Wherein: when the MCU is connected with the upper computer through the golden finger, if the upper computer needs to send target data to the MAC chip, the upper computer receives the target data which needs to be sent to the MAC chip, and the target data is stored in the first buffer area; then, the target data of the first buffer area is sent to the MAC chip; the MAC chip generates return value data of the upper computer of the required return value, and returns the return value data to the MCU; the MCU receives the return value data and stores the return value data into a second buffer area; the MCU receives a return value data reading instruction of the upper computer and feeds back the return value data stored in the second buffer area to the upper computer. Therefore, the communication between the MAC chip and the upper computer is realized through the MCU, the problem that the serial port communication between the MAC chip and the upper computer is realized because the number of pins of the golden finger is limited and no redundant pins exist is solved, and the upper computer is convenient to debug the MAC chip.

Based on the optical module provided by the embodiment of the application, the embodiment of the application also provides a data transmission method, which is used for the optical module. Fig. 7 is a schematic diagram of a basic flow of a data transmission method according to an embodiment. As shown in fig. 7, the method includes:

s101: and the MCU receives target data which is required to be sent to the MAC chip by the upper computer through the I2C interface, and stores the target data into the first buffer area.

Optionally, the first buffer area is located in the MCU. When the upper computer needs to send target data to the MAC chip, the upper computer sends the target data to the MCU through the golden finger, the MCU receives the target data through the I2C interface, and the target data is stored in the first buffer area of the MCU.

Optionally, the target data uses the data end character as an end symbol. The end of data character may include 0x0A and 0x0D. When the upper computer writes target data into the first buffer area, the MCU monitors the data ending character, and if the data ending character is encountered, the data sent by the upper computer is stopped from being written into the first buffer area. Or in the process that the upper computer writes the target data into the first buffer area of the MCU, detecting the length of the target data written into the first buffer area, and if the data length of the target data written into the first buffer area by the upper computer exceeds the buffer length of the first buffer area, ending storing the target data into the first buffer area.

In addition, in the embodiment of the present application, a start-to-send flag bit is set in the cache of the MCU, where the start-to-send flag is used for confirming that the target data in the first cache region is properly sent to the MAC chip. If the MCU receives the target data, the starting sending flag bit is set automatically, if the starting sending flag bit is set to be 1, and when the MCU monitors that the starting sending flag bit is set to be 1, the MCU starts sending the target data in the first buffer area to the MAC chip.

Optionally, when the upper computer writes the target data to be sent to the MAC chip 303 into the first buffer, the upper computer writes the debug password into the MCU302, and the MCU302 verifies the debug password written by the upper computer. If the MCU302 verifies that the debug password written by the upper computer is correct, the MCU302 allows the upper computer to write the target data to be sent to the MAC chip 303 into the first buffer.

S102: and the MCU transmits the target data stored in the first buffer area to the MAC chip through an MCU serial port.

After the upper computer finishes writing the target data into the first buffer area through the golden finger, the MCU sends the target data stored into the first buffer area to the MAC chip through the serial port. For example, the target data stored in the first buffer is sent to the RX pin of the MAC chip through the TX pin of the MCU.

In addition, in the process that the MCU sends the target data stored in the first buffer area to the MAC chip, the data ending character is monitored, and if the data ending character is encountered, the target data is stopped from being sent to the MAC chip.

Further, after the MCU sends the target data stored in the first buffer to the MAC chip, the start transmission flag bit is reset and set to "0". When the MCU monitors that the flag bit is set to 0 to start sending, the target data of the first buffer area will be clear.

S103: and the MCU receives the return value data of the MAC chip through a serial port and stores the return value data into a second buffer area.

Optionally, the second buffer area is located in the MCU. After receiving the target data through the serial port, the MAC chip performs a series of processing according to the target data, and then correspondingly generates return value data which needs to be returned to the upper computer. The MAC chip sends the return value data which needs to be returned to the upper computer to the MCU through the serial port, and the MCU receives the return value data through the serial port and stores the return value data to the second buffer area of the MCU. For example, the return value data of the MAC chip is sent to the RX pin of the MCU through the TX pin of the MAC chip.

Optionally, when the MCU receives the return value data of the MAC chip, detecting a length of the return value data written into the second buffer; if the return value data length of the MAC chip exceeds the buffer length of the second buffer area, the MCU finishes receiving the return value data of the MAC chip.

Optionally, after the MCU sends the target data stored in the first buffer area to the MAC chip, monitoring a waiting time for receiving the return value data; and if the waiting time for receiving the return value data is less than or equal to the threshold waiting time, receiving the return value data of the MAC chip, and storing the received return value data into the second buffer area. Or after the MCU sends the target data stored in the first buffer area to the MAC chip, acquiring the threshold accumulated time for receiving the return value data of the MAC chip; and if the accumulated time of the received return value data of the MAC chip is greater than the threshold accumulated time, ending storing the received return value data into the second buffer.

S104: and the MCU receives a reading instruction of the upper computer, so that the upper computer reads the return value data of the second buffer area through an I2C interface.

In order to ensure that the MAC chip executes the target data, the upper computer needs to receive the returned value data of the MAC chip to determine the execution result of the MAC chip, so that the upper computer sends an instruction for reading the returned value data to the MCU. The MCU receives an instruction of reading the return value data from the upper computer, and feeds the return value data stored in the second buffer area back to the upper computer so as to realize that the upper computer reads the return value data of the MAC chip stored in the second buffer area in the MCU.

In the embodiment of the application, the upper computer reads the second buffer area in the MCU according to the communication period, and obtains the return value data of the MAC chip from the second buffer area. If the upper computer writes the target data into the first buffer area in the MCU, the upper computer waits for a communication period and then sends an instruction for reading the return value data of the MAC chip in the second buffer area to the MCU, and the MCU feeds back the return value data of the MAC chip to the upper computer according to the received instruction for reading the return value data of the MAC chip. Further, after the upper computer reads the returned value data of the MAC chip in the second buffer, the returned value data of the MAC chip in the second buffer is cleared.

The inexhaustible parts of the data transmission method provided by the embodiment of the present application can be referred to the optical module provided by the foregoing embodiment.

Finally, it should be noted that: in the embodiment, the progressive description is adopted, and different parts can be mutually referred; in addition, the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An optical module, comprising:

the circuit board, one end of the said circuit board has golden fingers, the said golden finger includes I2C pin;

the MCU is arranged on the circuit board and comprises an I2C interface and an MCU serial port; the I2C interface is electrically connected with the I2C pin, and the MCU is communicated with an upper computer I2C through the I2C pin;

the MAC chip is arranged on the circuit board and comprises an MAC chip serial port, and the MAC chip serial port is electrically connected with the MCU serial port;

wherein the MCU is configured to:

before allowing an upper computer to write target data into a first buffer area, verifying whether a debugging password written by the upper computer is correct; the debugging password is a password input into the MCU password area when the upper computer sends target data, and the target data is data sent to the MAC chip by the upper computer;

when the debugging password is correct, allowing the upper computer to write the target data into the first cache region;

setting a start sending flag bit when the writing of the target data is completed; the sending flag bit is used for indicating to send the target data in the first buffer area to the MAC chip;

if the start sending flag bit is detected, sending the target data stored in the first buffer area to the MAC chip through an MCU serial port, and resetting the start sending flag bit when the target data of the first buffer area is sent;

monitoring waiting time for receiving the return value data and receiving the return value data of the MAC chip through an MCU serial port;

if the return value data of the MAC chip is received within the threshold waiting time, storing the return value data into a second buffer area;

2. The optical module of claim 1, wherein the target data carries an end-of-data character;

and stopping writing the target data into the first buffer area if the data end character is detected in the process of writing the target data into the first buffer area.

3. The optical module of claim 1, wherein the length of data written in the first buffer is monitored during the process of writing the target data into the first buffer;

and if the length of the data written into the first buffer area is larger than the buffer length of the first buffer area, stopping writing the target data.

4. The optical module of claim 1, wherein setting the start send flag bit comprises: setting a start transmission flag bit to 1;

resetting the start transmission flag bit includes setting the start transmission flag bit to 0.

5. The optical module of claim 1, wherein storing the return value data to the second buffer if the return value data of the MAC chip is received within a threshold latency time comprises:

after the target data is sent to the MAC chip, threshold waiting time is obtained until the return value data of the MAC chip is received;

if the waiting time for receiving the return value data of the MAC chip is less than or equal to the threshold waiting time, storing the return value data received through the MCU serial port into a second buffer area;

and if the waiting time for receiving the return value data of the MAC chip is longer than the threshold waiting time, not storing the return value data into the second buffer area.

6. The optical module of claim 1, wherein storing the return value data in the second buffer comprises:

monitoring the length of the return value data received through the MCU serial port in the process of storing the return value data into the second buffer area;

and stopping storing the return value data to the second cache region if the length of the return value data exceeds the cache length of the second cache region.

7. The light module of claim 1, wherein the MCU is further configured to:

and if the starting sending flag bit is monitored to be reset, deleting the target data stored in the first buffer area.

8. The optical module of claim 3, further comprising, prior to writing the target data to the first buffer:

monitoring the length of the target data;

and if the length of the target data exceeds the buffer length of the first buffer area, not writing the target data into the first buffer area.

9. The optical module of claim 1, wherein the first buffer and the second buffer are located within the MCU.