CN113364523B

CN113364523B - Data sending method and optical module

Info

Publication number: CN113364523B
Application number: CN202010153552.1A
Authority: CN
Inventors: 王庆华; 周作琪; 李刚
Original assignee: Hisense Broadband Multimedia Technology Co Ltd
Current assignee: Hisense Broadband Multimedia Technology Co Ltd
Priority date: 2020-03-06
Filing date: 2020-03-06
Publication date: 2022-06-28
Anticipated expiration: 2040-03-06
Also published as: CN113364523A

Abstract

The application provides a data sending method and an optical module. When the second microprocessor is in an idle state, the first microprocessor sends data stored in a preset data storage space of the first microprocessor to the second microprocessor, and sets a sending state flag bit of the second microprocessor to be a first preset value; when the second microprocessor monitors that the sending state flag bit is a first preset value, the second microprocessor sends the received data in a low-frequency signal mode through the light emitting circuit. Therefore, the second microprocessor is used for sending messages to the opposite terminal, the first microprocessor is used for interacting with the upper computer, and then the upper computer can rapidly poll the optical module and does not influence the message sending process in the optical module, so that the problem that the upper computer damages the message sending of the optical module can not be caused while the upper computer can timely acquire and update the sending state bytes of the optical module is guaranteed.

Description

Data sending method and optical module

Technical Field

The present application relates to the field of optical communication technologies, and in particular, to a data transmission method and an optical module.

Background

In the access network communication system, mutual optical connection is established between an optical line terminal and an optical network unit to realize data communication. Specifically, the optical line terminal is provided with a first optical module, the optical network unit is provided with a second optical module, and optical connection is established between the first optical module and the second optical module; the optical line terminal sends an optical signal to the second optical module through the first optical module to realize that the optical line terminal sends data to the optical network unit; the optical line terminal receives the optical signal from the second optical module through the first optical module, and the optical line terminal receives the data from the optical network unit.

In the above communication system, the optical line terminal and the optical network unit are upper computers of the optical module. In order to realize that the optical line terminal and/or the optical network unit are/is positioned in environments such as high mountains, forests, water bodies and the like which are not convenient for manual operation, the optical module is difficult to operate by operating an upper computer or using the upper computer. In view of the above, a technical solution for message transmission of a color optical module based on a message channel function is proposed at present, so that the optical module can implement remote control.

However, in the message passing technology based on the color light optical module, in the process of sending a single message by the sending end module, if the upper computer performs the I2C access operation on the optical module at this time, the sending of the message is interrupted because the I2C access authority is the highest, so that a failure occurs. Therefore, in practical applications, in order to reduce the influence of the interruption of the access operation of the upper computer to the module on the sending of the optical module message, the access interval time value of the upper computer to the optical module is generally set to be larger, that is, the probability of interrupting the transmission of the optical module message is reduced, but in this way, the upper computer cannot timely acquire and update the result state of the optical module message transmission, so that the data transmission efficiency of the optical module system is reduced.

Disclosure of Invention

The embodiment of the application provides a data sending method and an optical module, aiming at the problem that in the existing color light optical module message transmission technology, polling access of an upper computer to an optical module easily causes optical module message sending failure, so that the optical module system message transmission efficiency is influenced.

According to a first aspect of an embodiment of the present application, there is provided a data transmission method applied to an optical module, where the optical module is provided with a first microprocessor and a second microprocessor that are electrically connected, and the method includes:

the first microprocessor judges whether the second microprocessor is in an idle state;

if the second microprocessor is in an idle state, the first microprocessor sends the data stored in the preset data storage space of the first microprocessor to the second microprocessor, and sets a sending state flag bit of the second microprocessor to be a first preset value;

and when monitoring that the sending state flag bit is a first preset value, the second microprocessor sends the received data in a low-frequency signal form through the light emitting circuit.

According to a second aspect of embodiments of the present application, there is provided a light module including a printed circuit board, and a first microprocessor and a second microprocessor disposed on the printed circuit board, wherein:

The first microprocessor and the second microprocessor are configured to perform the method of the first aspect of the embodiments of the present application.

As can be seen from the foregoing embodiments, in the data transmission method and the optical module provided in the embodiments of the present application, the first microprocessor and the second microprocessor are disposed in the optical module, and a transmission status flag bit for implementing interaction between the first microprocessor and the second microprocessor is configured for the second microprocessor. When the second microprocessor is in an idle state, the first microprocessor sends data stored in a preset data storage space of the first microprocessor to the second microprocessor, and sets a sending state flag bit of the second microprocessor to be a first preset value; when the second microprocessor monitors that the sending state flag bit is a first preset value, the second microprocessor sends the received data in the form of low-frequency signals through the light emitting circuit. Therefore, the second microprocessor is used for sending messages to the opposite terminal, the first microprocessor is used for interacting with the upper computer, and then the upper computer can rapidly poll the optical module and does not influence the message sending process in the optical module, so that the problem that the upper computer damages the message sending of the optical module is not caused while the upper computer can timely acquire and update the sending state bytes of the optical module is ensured, and the message transmission rate of the system is integrally improved.

Drawings

In order to more clearly illustrate the technical solution of the present invention, the drawings required to be used in the embodiments will be briefly described below, and it is obvious for those skilled in the art to obtain other drawings without inventive labor.

Fig. 1 is a schematic diagram of connection relationship of an optical communication terminal;

fig. 2 is a schematic diagram of an optical network terminal structure;

fig. 3 is a schematic structural diagram of an optical module according to an embodiment of the present invention;

FIG. 4 is an exploded view of an optical module according to an embodiment of the present invention;

fig. 5 is a schematic partial structural diagram of an optical module according to an embodiment of the present invention;

fig. 6 is a schematic diagram of data transmission between optical modules according to an embodiment of the present invention;

fig. 7 is a schematic basic flowchart of a data transmission method according to an embodiment of the present invention;

fig. 8 is a schematic basic flow chart of another data transmission method according to an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

One of the core links of optical fiber communication is the interconversion of optical and electrical signals. The optical fiber communication uses optical signals carrying information to transmit in information transmission equipment such as optical fibers/optical waveguides, and the information transmission with low cost and low loss can be realized by using the passive transmission characteristic of light in the optical fibers/optical waveguides; meanwhile, the information processing device such as a computer uses an electric signal, and in order to establish information connection between the information transmission device such as an optical fiber or an optical waveguide and the information processing device such as a computer, it is necessary to perform interconversion between the electric signal and the optical signal.

The optical module realizes the function of interconversion of optical signals and electrical signals in the technical field of optical fiber communication, and the interconversion of the optical signals and the electrical signals is the core function of the optical module. The optical module is electrically connected with an external upper computer through a golden finger on an internal circuit board of the optical module, and the main electrical connection comprises power supply, I2C signals, data signals, grounding and the like; the electrical connection mode realized by the gold finger has become the mainstream connection mode of the optical module industry, and on the basis of the mainstream connection mode, the definition of the pin on the gold finger forms various industry protocols/specifications.

Fig. 1 is a schematic diagram of connection relationship of an optical communication terminal. As shown in fig. 1, the connection of the optical communication terminal mainly includes the interconnection among the optical network terminal 100, the optical module 200, the optical fiber 101 and the network cable 103;

One end of the optical fiber 101 is connected with a far-end server, one end of the network cable 103 is connected with local information processing equipment, and the connection between the local information processing equipment and the far-end server is completed by the connection between the optical fiber 101 and the network cable 103; and the connection between the optical fiber 101 and the network cable 103 is made by the optical network terminal 100 having the optical module 200.

An optical port of the optical module 200 is externally accessed to the optical fiber 101, and establishes bidirectional optical signal connection with the optical fiber 101; an electrical port of the optical module 200 is externally connected to the optical network terminal 100, and establishes bidirectional electrical signal connection with the optical network terminal 100; the optical module realizes the interconversion of optical signals and electric signals, thereby realizing the establishment of information connection between the optical fiber and the optical network terminal; specifically, the optical signal from the optical fiber is converted into an electrical signal by the optical module and then input to the optical network terminal 100, and the electrical signal from the optical network terminal 100 is converted into an optical signal by the optical module and input to the optical fiber.

The optical network terminal is provided with an optical module interface 102, which is used for accessing an optical module 200 and establishing bidirectional electric signal connection with the optical module 200; the optical network terminal is provided with a network cable interface 104, which is used for accessing the network cable 103 and establishing bidirectional electric signal connection with the network cable 103; the optical module 200 is connected to the network cable 103 through the optical network terminal 100, specifically, the optical network terminal transmits a signal from the optical module to the network cable and transmits the signal from the network cable to the optical module, and the optical network terminal serves as an upper computer of the optical module to monitor the operation of the optical module.

Thus, a bidirectional signal transmission channel is established between the remote server and the local information processing equipment through the optical fiber, the optical module, the optical network terminal and the network cable.

Common information processing apparatuses include routers, switches, electronic computers, and the like; the optical network terminal is an upper computer of the optical module, provides data signals for the optical module, and receives the data signals from the optical module, and the common upper computer of the optical module also comprises an optical line terminal and the like.

Fig. 2 is a schematic diagram of an optical network terminal structure. As shown in fig. 2, the optical network terminal 100 has a circuit board 105, and a cage 106 is disposed on a surface of the circuit board 105; an electric connector is arranged in the cage 106 and used for connecting an electric port of an optical module such as a golden finger; the cage 106 is provided with a heat sink 107, and the heat sink 107 has a projection such as a fin that increases a heat radiation area.

The optical module 200 is inserted into the optical network terminal, specifically, the electrical port of the optical module is inserted into the electrical connector inside the cage 106, and the optical port of the optical module is connected to the optical fiber 101.

The cage 106 is positioned on the circuit board, and the electrical connector on the circuit board is wrapped in the cage, so that the electrical connector is arranged in the cage; the optical module is inserted into the cage, held by the cage, and the heat generated by the optical module is conducted to the cage 106 and then diffused by the heat sink 107 on the cage.

Fig. 3 is a schematic view of an optical module according to an embodiment of the present invention, and fig. 4 is an exploded schematic view of the optical module according to the embodiment of the present invention. As shown in fig. 3 and 4, an optical module 200 provided in an embodiment of the present invention includes an upper housing 201, a lower housing 202, an unlocking member 203, a circuit board 300, a light emitting module 400, and a light receiving module 500;

the upper shell 201 is covered on the lower shell 202 to form a wrapping cavity with two openings; the outer contour of the wrapping cavity is generally a square body, and specifically, the lower shell comprises a main plate and two side plates which are positioned on two sides of the main plate and are perpendicular to the main plate; the upper shell comprises a cover plate, and the cover plate covers two side plates of the upper shell to form a wrapping cavity; the upper shell can also comprise two side walls which are positioned at two sides of the cover plate and are perpendicular to the cover plate, and the two side walls are combined with the two side plates to cover the lower shell.

The two openings can be two ends (204, 205) in the same direction, or two openings in different directions; one opening is an electric port 204, and a gold finger of the circuit board extends out of the electric port 204 and is inserted into an upper computer such as an optical network terminal; the other opening is an optical port 205 for external optical fiber access to connect the optical transmitter module 400 and the optical receiver module 500 inside the optical module; the optoelectronic devices such as the circuit board 300, the light emitting assembly 400 and the light receiving assembly 500 are positioned in the package cavity.

The assembly mode of combining the upper shell and the lower shell is adopted, so that the circuit board 300, the light emitting assembly 400, the light receiving assembly 500 and other devices can be conveniently installed in the shells, and the upper shell and the lower shell form an outermost packaging protection shell of the optical module; the upper shell and the lower shell are made of metal materials generally, so that electromagnetic shielding and heat dissipation are facilitated; generally, the housing of the optical module is not made into an integral component, so that when devices such as a circuit board and the like are assembled, a positioning component, a heat dissipation component and an electromagnetic shielding component cannot be installed, and production automation is not facilitated.

The unlocking component 203 is located on the outer wall of the wrapping cavity/lower shell 202, and is used for realizing the fixed connection between the optical module and the upper computer or releasing the fixed connection between the optical module and the upper computer.

The unlocking component 203 is provided with a clamping component matched with the upper computer cage; the end of the unlocking component can be pulled to enable the unlocking component to move relatively on the surface of the outer wall; the optical module is inserted into a cage of the upper computer, and the optical module is fixed in the cage of the upper computer by a clamping component of the unlocking component; by pulling the unlocking component, the clamping component of the unlocking component moves along with the unlocking component, so that the connection relation between the clamping component and the upper computer is changed, the clamping relation between the optical module and the upper computer is released, and the optical module can be drawn out from the cage of the upper computer.

The circuit board 300 is arranged in a packaging cavity formed by the upper shell and the shell, and the circuit board 300 is provided with chips, capacitors, resistors and other electric devices. The method comprises the following steps that chips needing to be set are selected according to the requirements of products, and common chips comprise a microprocessor MCU, a clock data recovery chip CDR, a laser driving chip, a transimpedance amplification TIA chip, a limiting amplification LA chip, a power management chip and the like.

The transimpedance amplifier chip is closely associated with the light receiving chip, the short-distance wiring design can ensure good received signal quality, and in one packaging form of the optical module, the transimpedance amplifier chip and the light receiving chip are packaged together in an independent packaging body, such as the same coaxial tube shell TO or the same square cavity; the independent packaging body is independent of the circuit board 300, and the light receiving chip and the transimpedance amplifier chip are electrically connected with the circuit board 300 through the independent packaging body; in another package form of the optical module, the light receiving chip and the transimpedance amplifier chip may be disposed on the surface of the circuit board 300 without using a separate package. Of course, the light receiving chip may be packaged separately, and the transimpedance amplifier chip may be disposed on the circuit board 300, so that the received signal quality may also meet some relatively low requirements.

The chip on the circuit board 300 may be an all-in-one chip, for example, a laser driver chip and an MCU chip are integrated into one chip, or a laser driver chip, a limiting amplifier chip and an MCU chip are integrated into one chip, and the chip is an integrated circuit, but the function of each circuit does not disappear due to integration, and only the circuit form is integrated. Therefore, when the circuit board 300 is provided with three independent chips, namely, the MCU, the laser driving chip and the amplitude limiting amplifying chip, the circuit board is provided with a single chip with three functions in one, and the scheme is equivalent.

The circuit board 300 is a carrier of main components of the optical module, components not arranged on the circuit board 300 are finally electrically connected with the circuit board 300, and a connector on the circuit board 300 realizes the electrical connection between the optical module and an upper computer thereof. Such as the light emitting assembly 400 and the light receiving assembly 500 of fig. 4. The light emitting assembly 400 and the light receiving assembly 500 may be collectively referred to as an optical sub-assembly.

The optical transmission assembly 400 in this embodiment is a coaxial TO package, physically separated from the circuit board, and electrically connected through a flexible board; the light receiving module 500 is also a coaxial TO package, physically separated from the circuit board, and electrically connected through a flexible board. In another common implementation, may be disposed on a surface of the circuit board 300.

The end surface of the circuit board 300 is provided with a golden finger 301 which is composed of a pin independent from each other, and the circuit board 300 is inserted into an electric connector in the cage and is electrically connected with an upper computer through the golden finger. The upper computer and the optical module can adopt an I2C protocol to transmit information through I2C pins. The upper computer can write information into the optical module, and particularly, the upper computer can write the information into a register of the optical module; the optical module cannot write information into the upper computer, and when the optical module needs to provide information to the upper computer, the optical module writes the information into a preset register (such as a transmission status register, a data transmission failure register, and the like set in this embodiment) in the optical module, and the upper computer reads the register, and the register of the optical module is generally integrated in an MCU of the optical module, or may be independently set on the circuit board 300 of the optical module.

In the working process of the optical module, the optical module in this embodiment is configured to send out a relatively high-frequency data optical signal according to a data electrical signal from an optical line terminal, so as to maintain an original external data transmission service of the optical line terminal, and at the same time, the optical module also sends out a relatively low-frequency control optical signal according to a non-data electrical signal (i.e., a signal not used for a normal transmission service), so as to send out control information to an optical module at an opposite end, so that control data is transmitted to a remote system without interrupting the normal service, for example, an upgrade packet of a low-frequency message channel transmission system is used to implement online upgrade of the remote system, report DDM (Digital Diagnostic Monitoring ) information and the like.

Since the optical module and the optical module at the opposite end are both externally connected by one optical fiber, the data optical signal and the control optical signal are mixed in the same beam of light to be transmitted by the same optical fiber, in order to distinguish different signals, the data optical signal and the control optical signal are set to have different frequencies in the embodiment, and specifically, a low-frequency signal (control optical signal) is superposed on a high-frequency signal (data optical signal) sent by the optical module. For example, a low frequency signal of 50Kbps is superimposed on a 10Gbps or 25Gbps signal, wherein the 10Gbps or 25Gbps signal is a normal traffic signal, and another additional low frequency signal of 50Kbps performs other steering functions.

Further, since the role of the MCU in the optical module is needed for: the control module controls the circuits such as LDD, LD and APD, the communication between the optical module and the upper computer, and the data receiving and sending work of the message channel. However, the MCU is a single-thread processor, so there is a conflict between the above three applications, for example, when the upper computer I2C accesses the optical module, since the I2C access right is highest, the MCU may interrupt the control of the optical module probabilistically, but the performance of the optical module will not be affected even if the relevant control parameters of the optical module are not refreshed, and the access of I2C will not occupy the MCU resources completely, so the normal operation of the optical module will not be affected. However, when the optical module has transmission or reception of a non-data electrical signal, the external I2C may cause message transmission failure because the MCU transmits a long string of data to the light emitting circuit, wherein the present embodiment refers to a path formed by devices used for transmission of an optical signal as the light emitting circuit, such as the signal transmitting circuit 304 and the light emitting module 400 in fig. 5, constituting the light emitting circuit, or receives a long string of data from the light receiving circuit, wherein the present embodiment refers to a path formed by devices used for reception of an optical signal as the light receiving circuit, such as the signal receiving circuit 305, the matching circuit 306 and the light receiving module 500 in fig. 5, constituting the light receiving circuit.

Based on the above problem, in the optical module provided in this embodiment, the circuit board is provided with the first microprocessor and the second microprocessor which are electrically connected, the first microprocessor is electrically connected with the golden finger on the circuit board through the setting, and is used for communicating with the upper computer, and the second microprocessor is used for realizing the sending and receiving work of the non-data electrical signal. The message channel function is separated from the communication function of the optical module and the upper computer, so that the problem that the message transmission is failed due to the external I2C when the optical module sends or receives a message is solved.

Fig. 5 is a schematic partial structure diagram of an optical module according to an embodiment of the present invention. As shown in fig. 5, in the present embodiment, a first microprocessor 302 and a second microprocessor 303 are provided in the optical module.

The first microprocessor 302 is electrically connected with the golden finger 301 and is used for realizing data interaction with an upper computer; in addition, the first microprocessor 302 is also electrically connected to a signal transmitting circuit 304 and a signal receiving circuit 305 disposed on the circuit board, and is configured to control power-on initialization, parameter configuration, operation supervision, and the like of relevant chips in the signal transmitting circuit 304 and the signal receiving circuit 305. The second microprocessor 303 is electrically connected to the first microprocessor 302, the light emitting module 400 and the matching circuit 306, respectively.

Based on the configuration, in the message sending process, the first microprocessor 302 can receive a non-data electric signal from the upper computer through the golden finger 301 and store the data into a preset data storage area inside the first microprocessor; then, while the second microprocessor 303 is in an idle state, the non-data electrical signal is written into the second microprocessor 303 through I2C; in addition, the first microprocessor 302 may also write internal monitoring data of the optical module, such as voltage, temperature, etc., into the second microprocessor 303 through I2C when the second microprocessor 303 is in an idle state. In this embodiment, the data received by the first microprocessor 302 from the upper computer and the collected data inside the optical module are collectively referred to as data related to the low frequency signal. The second microprocessor 303 receives the data related to the low frequency signal and then transmits the data through the optical transmission circuit, wherein the optical transmission module 400 can be controlled to modulate the low frequency signal into the high frequency signal for data signal transmission, i.e., to load the optical signal of the low frequency signal, so as to transmit the data related to the low frequency signal.

It should be noted that, in this embodiment, two microprocessors are configured to communicate in an I2C manner, so that when data transmission is performed, the microprocessors do not need to verify received data, and meanwhile, since the first microprocessor 302 needs to interact with an upper computer, the first microprocessor 302 is set as a master processor and the second microprocessor 303 is a slave processor in this embodiment, in a specific implementation process, the first microprocessor 302 may also be set as a slave processor, that is, the second microprocessor 303 may copy data related to the low-frequency signal from the first microprocessor 302 to the inside thereof, so as to implement a function of the first microprocessor 302 sending the data related to the low-frequency signal to the second microprocessor 303. Of course, the data transmission method between the two microprocessors is not limited to the I2C method.

Fig. 6 is a schematic diagram of data transmission between optical modules according to an embodiment of the present invention. With reference to fig. 5 and 6, in the message receiving process, the optical receiving assembly 500 receives an optical signal sent by the optical module at the opposite end, and converts the received optical signal into an electrical signal, and the signal receiving circuit 305 connected to the optical receiving assembly 500 performs corresponding processing such as signal amplification and filtering on the electrical signal, and sends the electrical signal to the upper computer through the golden finger 301, so that a high-frequency data optical signal received by the optical module can be converted into a data electrical signal and then sent to the upper computer. Meanwhile, the matching circuit 306 is electrically connected to the light receiving module 500, and is configured to analyze a low-frequency signal from the mixing signal output by the light receiving module 500; then, the low frequency signal is sent to the second microprocessor 303 electrically connected to the second microprocessor 303, after the second microprocessor 303 completes the reception of the low frequency signal this time, an indication message indicating that the data reception is completed may be sent to the first microprocessor 302, and after the first microprocessor 302 receives the indication message, the message data stored in the second microprocessor 303 is copied to the content thereof in the manner of I2C, and the upper computer is notified to read the low frequency signal from the first microprocessor 302.

Because two microprocessors are responsible for different work contents, the host computer can visit first microprocessor 302 when can poll the optical module fast, and then does not influence the messaging process of second microprocessor 303 to when guaranteeing that the host computer can in time acquire the renewal optical module and send the state byte, also can not produce the message transmission problem that the host computer destroys the optical module, thereby the whole message transmission rate that improves the system.

Further, in order to prevent the first microprocessor 302 from interrupting the data processing process of the second microprocessor 303 when reading data from the second microprocessor 303 or writing data to the second microprocessor 303, the second microprocessor 303 may generate indication information of whether it is in an idle state, wherein the first microprocessor 302 may perform a read or write operation only when it is in the idle state. In a specific implementation manner, an idle state indication bit may be set, or a message indication pin is set between two microprocessors, where a sending state indication pin and a receiving state indication pin are respectively set between the first microprocessor 302 and the second microprocessor 303, and the pin setting manner has lower configuration requirements on the second microprocessor 303 than the foregoing manner.

It should be noted that the low-frequency signal analyzing circuit in this embodiment is not limited to the above implementation, and for example, a mirror circuit may be provided in the transimpedance amplifier 3051 in fig. 6, so as to mirror the photocurrent from the light receiving chip in the light receiving module 500, and output the mirrored current through the current output terminal, thereby realizing output of a mixed-frequency electrical signal for subsequent low-frequency signal reception. In addition, to implement the transmission of data related to the low frequency signal, the second microprocessor 303 may also be electrically connected to the signal transmitting circuit 304, for example, the second microprocessor 303 may add a low frequency signal to a bias (bias) direct current for controlling the laser in the light emitting assembly 400 to emit light based on the data it receives, and further implement the modulation of the previous low frequency signal based on the high frequency signal for the transmission of the non-data electrical signal.

Further, in the sending of the low-frequency signal, in order to implement functions that the first microprocessor 302 can enable the second microprocessor 303 to send a message, and the first microprocessor 302 can perform corresponding interaction with an upper computer, and the like, in this embodiment, a preset register is further set in the optical module, where the preset register is generally integrated in the microprocessor of the optical module, and may also be independently set on a circuit board of the optical module.

Fig. 7 is a schematic basic flow chart of a data transmission method according to an embodiment of the present invention. As shown in fig. 7, the method mainly includes the following steps:

s701: the first microprocessor determines whether the second microprocessor is in an idle state.

For example, when a transmission status indication pin is provided between two processors, the first microprocessor may monitor whether a level value of the transmission status indication pin is a first level value, for example, is set to 0, and if so, determine that the second microprocessor is in an idle state, and then may execute step S702 to write data related to the low frequency signal into the second microprocessor. Or, a corresponding idle state indication bit may be set in the second microprocessor, and the first microprocessor determines whether the second microprocessor is in an idle state by reading the idle state indication bit.

Furthermore, if the data related to the low-frequency signal is from the upper computer, the data amount to be transmitted is usually large due to the control data transmitted to the far-end system at present, and the number of data bytes transmitted at one time by the existing low-frequency message channel is limited. Therefore, in this embodiment, a manner of splitting, sending, receiving and integrating the data packets to be transmitted is provided, and when the manner is adopted, the sending end needs to ensure that the sending end upper computer can perform enabling sending of the next data only after the receiving end upper computer finishes reading the data sent by the sending end each time. In order to meet the above requirement, a sending status flag bit for the first microprocessor is set in a register of the optical module, which is referred to as a sending status flag bit g _ messagesendable 1 in this embodiment, and meanwhile, a two-end system (which relates to a sending-end upper computer, a sending-end optical module, a receiving-end upper computer, and a receiving-end optical module) establishes an interactive system for implementing a data transmission mode of splitting, sending, receiving and integrating the data packet.

Therefore, based on the application scenario, when the first microprocessor monitors that the sending state flag bit is the first preset value, it is determined whether the second microprocessor is in an idle state. For the enabling mode of the first microprocessor for sending the status flag bit, the first microprocessor may change the first preset value of the first microprocessor to a second preset value, for example, from 1 to 0, the upper computer to which the optical module is connected may change the second preset value of the optical module to the first preset value, for example, from 0 to 1, and of course, if actually needed, the first microprocessor may also change the second preset value of the optical module to the first preset value. In addition, when the optical module is initially powered on, the default value of the sending state flag bit g _ messagesendable 1 is a second preset value.

The host computer (which can be called as a sending end host computer for short) that the optical module is accessed can divide the data packet that needs to be sent into N small-sized data packets, and the N small-sized data packets are sent out in sequence through the light emitting circuit. Before the upper computer enables the optical module to transmit data, the upper computer firstly queries the first transmission status flag g _ messagesendable 1, wherein the upper computer may query the register in the transmission optical module through an I2C communication mode by using an I2C pin on a gold finger on the surface of the optical module circuit board. When the flag bit is a second preset value, for example, 0, it indicates that the optical module is in an idle state, and the optical module can be enabled to transmit data, and at this time, the upper computer needs to set the flag bit to be the first preset value, for example, 1, so as to enable the optical module to transmit data; when the zone bit is the first preset value, the upper computer can not transmit new data until the zone bit is changed into the second preset value in the module, which indicates that the upper computer can transmit the next data

Further, the first microprocessor in the optical module can detect whether the upper computer has an action of changing the sending state mark; and if the upper computer is detected to have the action of changing the sending state flag, inquiring whether the value written into the sending state flag bit register by the upper computer is a first preset value or not. If the sending state flag bit is changed to the first preset value by the upper computer, monitoring whether the second microprocessor is in an idle state or not is executed; otherwise, the sending status flag bit may be continuously queried after a preset time interval.

For the query mode of the sending status flag g _ messagesendable, both the optical module and the upper computer may query the sending status flag in a polling manner, for example, when the upper computer queries that the flag is the first preset value, the upper computer queries the flag after a preset time interval, for example, 1 ms.

S702: and if the second microprocessor is in an idle state, the first microprocessor sends the data stored in the preset data storage space of the first microprocessor to the second microprocessor, and sets a sending state flag bit of the second microprocessor to be a first preset value, if the flag is set to be 1, the second microprocessor is instructed to send the data out in a low-frequency signal correlation mode.

Wherein the first microprocessor can write the data related to the low frequency signal stored in the preset data storage space thereof into the second microprocessor through I2C. Of course, the second microprocessor may also copy the data from the first microprocessor to its interior.

The optical module includes a plurality of registers for storing data, which form the predetermined data storage space, and the predetermined data storage space may also be an area for storing data opened in a certain register.

Further, since all the positions in the register are not filled with data every time, the embodiment further provides a transmission data length register g _ SendLength in the optical module, and the upper computer writes the data length that needs to be transmitted in this time into the register. Meanwhile, the data has a default initial position, so that the storage position of the data in the register is represented by the default initial position and the data length together, and the correctness of data transmission can be effectively ensured.

When the first microprocessor inquires that the sending state flag bit g _ messagesendable 1 is the first preset value, the first microprocessor sends the data stored in the preset data storage space, the data packets to be sent if needed, and the sending length to the second microprocessor in sequence, and simultaneously, the sending state flag bit g _ messagesendable 2 of the second microprocessor is set to be the first preset value, and if the flag is set to be 1, the second microprocessor is instructed to send out the data related to the low-frequency signal.

S703: and when monitoring that the sending state flag bit is a first preset value, the second microprocessor sends the received data in a low-frequency signal form through the light emitting circuit.

Meanwhile, in the process of sending the message by the second microprocessor, in order to prevent the access interruption of the data sending process by the first microprocessor, the second microprocessor sets the level value of the sending state indicating pin to be a second level value, for example, 1, before sending the data, so as to indicate that the second microprocessor processes the data sending state and refuses the access of the first microprocessor.

Further, in order to ensure that the optical module at the opposite end can correctly receive the transmitted data, in this embodiment, a data retransmission mechanism is provided for the optical module, where during the data transmission of the optical module, the transmission status flag bit g _ messagesendable 1 of the first microprocessor and the transmission status flag bit g _ messagesendable 2 of the second microprocessor both remain unchanged, that is, both remain at the first preset value, and this embodiment also provides a timing when the two transmission status flags are changed to the second preset value, that is, after this step, steps S704 to S708 are further included.

It should be noted that, in practical applications, the data sent by the optical module may also be initial data written by the upper computer, and the data obtained after the optical module performs corresponding processing. In addition, when a data length register g _ SendLength is arranged in the optical module, data in a preset data storage space is sent out according to the sending data length and the default data starting position.

In addition, the encoding format of the transmitted data may include a data frame header, a data length, a command code number, valid data, a checksum, and a data frame trailer. The receiving end can instruct an upper computer of the receiving end to read the data stored in the optical module register according to the length value according to the data length; the use of the data sent this time can be indicated by using the command code number; the receiving end can check the correctness of the valid data in the received data packet according to the checksum.

S704: the second microprocessor determines whether a response message that the data has been read is received.

The embodiment is described by taking as an example that the transmitted data is read by an upper computer (which may be referred to as a receiving end upper computer for short) accessed by the receiving end optical module, so as to realize the functions of upgrading the receiving end system or reporting digital diagnostic information. In order to enable the receiving-end optical module to notify an upper computer connected thereto to read data related to the low-frequency signal received by the optical module, a receiving-state flag g _ MessageReceState is set in the receiving-end optical module. When the receiving-end optical module receives data through the low-frequency information channel and checks the data correctly, the receiving state flag bit is set to a first preset value, for example, the receiving state flag bit g _ messagerecestat is set to 1, which is used for informing the receiving-end upper computer that new data has been received and simultaneously returning a response message that the data has been correctly received to the sending end.

Furthermore, after the receiving end upper computer inquires that the receiving state flag bit is set to be the first preset value in a polling mode, the receiving end upper computer can immediately read the received data, and the receiving state flag bit is changed from the first preset value to the second preset value after the reading is finished. The operation of changing the receiving state flag bit from the first preset value to the second preset value can stimulate the receiving end optical module to send back a response message that the data is read to the sending end optical module.

If a response message that the data sent by the receiving-end optical module has been read is received, step S705 is performed. Otherwise, step S707 is executed.

S705: and if a response message that the data is read is received, the second microprocessor sets the sending state flag bit to be a second preset value and sends an indication message that the second microprocessor is in an idle state to the first microprocessor.

For example, the second microprocessor may send an indication message to the first microprocessor that it is in an idle state by setting the level value of the transmission status indication pin to a first level value, e.g., to 0.

S706: and when the first microprocessor receives the indication message that the second microprocessor is in the idle state, setting the sending state flag bit of the first microprocessor to be a second preset value.

The first microprocessor changes the sending state zone bit from a first preset value to a second preset value, if the sending state zone bit is set from 1 to 0, the first microprocessor is used for informing the accessed upper computer that the data sending is finished, and the next data sending can be carried out.

In order to prevent a long time waiting for a return message of the optical module at the receiving end, the present embodiment further sets an internal active clear mechanism of the optical module, and may also set other clear mechanisms, such as clear by an upper computer, and correspondingly, the present embodiment configures the sending state control byte for the second microprocessor, for example, bit0 for sending the state control byte is a sending state flag bit, bit1 is a receiving state flag bit, bit2 is a bottom layer sending failure flag bit, and bit3 is a far-end failure flag bit, so as to represent different data transmission results. Correspondingly, the present embodiment sets a mode in which the first microprocessor configures the transmission status flag bit thereof, specifically, the first microprocessor sets the transmission status flag bit of the first microprocessor to a second preset value according to the read transmission status control byte of the second microprocessor, where the transmission status control byte includes the transmission status flag bit.

S707: and if the response message that the data is read is not received, judging whether the sent time length of the data exceeds a preset time length threshold value.

The preset time length threshold is greater than the time required by the optical module at the receiving end for data receiving verification and message return. After the data stored in the preset data storage space is sent out, the second microprocessor starts timing and waits for a response message that the data returned by the optical module at the receiving end is read, if the response message that the data is read is not received yet after the preset time length threshold is exceeded, step S708 is executed, otherwise, the second microprocessor continues to wait for the return message of the optical module at the receiving end.

S708: if the time length exceeds the preset time length threshold value, the second microprocessor changes the sending state zone bit from a first preset value to a second preset value, and sends an indication message that the second microprocessor is in an idle state to the first microprocessor.

Similarly, the first microprocessor may also set the transmission status flag bit of the first microprocessor to the second preset value according to the read transmission status control byte of the second microprocessor, and may also generate identification information of the receiving end fault.

In order to facilitate the differentiation of the fault of the receiving end, corresponding treatment measures are taken. In this embodiment, when the second microprocessor receives a response message that the data returned by the receiving end has been correctly received by the receiving end optical module, but does not receive a response message that the data has been read by the receiving end upper computer, first identification information for indicating a fault of the upper computer at the receiving end may be generated, and then, after the upper computer accessed by the sending end optical module receives the identification information, retransmission of the data may be enabled or a notification of a fault of the remote upper computer may be generated. In addition, if the second microprocessor does not receive the response message that the sending data returned by the receiving-end optical module has been correctly received all the time, the sending state flag bit is changed from the first preset value to the second preset value, meanwhile, second identification information for indicating that sending between the optical modules fails is generated, and then after the sending-end upper computer receives the identification information, measures such as enabling data to be sent again can be taken.

The preset duration threshold in step S708 may be composed of a first preset duration threshold for waiting for a response message that the data returned by the receiving-end optical module has been correctly received by the receiving-end optical module, and a second preset duration threshold for waiting for a response message that the data returned by the receiving-end optical module has been read after receiving a response message that the data has been correctly received by the receiving-end optical module. Further, if the data retransmission mechanism is adopted after the data transmission fails, the first preset duration threshold consists of N preset sub-duration thresholds, the specific number of the N preset sub-duration thresholds is determined according to the upper limit value of the retransmission times, and the specific duration of each preset sub-duration threshold is set according to the time required for correctly receiving the transmitted data and the returned data.

In this embodiment, two microprocessors are configured inside an optical module at a transmitting end, a flag bit which can interact with an upper computer connected to the first microprocessor and is used for controlling data transmission is established for the first microprocessor, and a flag bit which can interact with the first microprocessor is established for the second microprocessor. In the embodiment, the second microprocessor is used for sending messages to the opposite terminal, the first microprocessor is used for interacting with the upper computer, and then the upper computer can rapidly poll the optical module without influencing the message sending process in the optical module, so that the problem that the upper computer damages the message sending of the optical module can not be caused while the upper computer can timely acquire and update the status bytes sent by the optical module is ensured, and the message transmission rate of the system is integrally improved. Meanwhile, by using the sending state flag bit arranged in the sending end optical module, the problem that the sent data is covered by new data before being read by the receiving end upper computer can be avoided, and the function of reporting whether the receiving end upper computer reads the data correctly can be realized.

Further, when data is transmitted between the optical modules, a situation that data transmission fails due to temporary power failure of the optical modules, network problems and the like may occur. Fig. 8 is a schematic basic flow chart of another data transmission method provided in this embodiment. As shown in fig. 8, the method specifically includes the following steps:

s801: the first microprocessor inquires whether the sending state flag bit is changed to a first preset value.

The optical module register is provided with a transmission status flag bit g _ messagesendable 1. If the sending status flag bit is found to be changed to the first preset value by the upper computer, step S802 is executed to start a data retransmission mechanism; otherwise, the sending status flag bit may be continuously queried after a preset time interval.

S802: if the first preset value is the first preset value, the first microprocessor sends the data stored in the preset data storage space of the second microprocessor to the second microprocessor when the second microprocessor is in an idle state, and the sending state zone bit of the second microprocessor is set to be the first preset value.

S803, when the second microprocessor monitors that the sending state zone bit is the first preset value, the second microprocessor changes the data retransmission zone bit from the second preset value to the first preset value, and then the received data is sent out in the form of low-frequency signals through the light emitting circuit.

In addition, in the process of sending the message by the second microprocessor, in order to prevent the data sending process from being interrupted by the access of the first microprocessor, the second microprocessor sets the level value of the sending state indicating pin to be a second level value, for example, 1 before sending the data, so as to indicate the processing data sending state and refuse the access of the first microprocessor.

In this embodiment, a data retransmission flag g _ sendmessage able is set in a register of an optical module, and when the second microprocessor monitors that a transmission status flag thereof is a first preset value, the second microprocessor changes the data retransmission flag from a second preset value to the first preset value, such as 1, so as to start a data retransmission mechanism.

Meanwhile, in this embodiment, a sending number register sendcounter and a sending interval period register Runcounter are also set inside the optical module, where when the optical module is initially powered on, the two registers are both default values of 0. When the second microprocessor sends the data each time, the count value of the send count register sendcounter is incremented by 1, and meanwhile, the send interval period register Runcounter is equivalent to a timer starting to count, and the count value of the register is incremented by 1 every time a software period passes, and in this embodiment, before the count value of the register is incremented by 1, whether the data retransmission flag bit is the first preset value is checked, if so, the count value is incremented by 1, otherwise, the count value of the register can be zeroed. Of course, it is also possible to check whether the data retransmission flag bit is the first preset value or not when the count value of the data retransmission flag bit is about to reach the preset threshold value, and only in the above manner of checking the data retransmission flag bit in each software cycle, compared with the above manner, the manner of checking the data retransmission flag bit in each software cycle can make the data retransmission flag bit in the initialization state in the next use earlier and end the data retransmission earlier.

S804: the second microprocessor determines whether a response message that the data has been received is received within a preset time.

When the register value does not reach a preset threshold value (the time corresponding to the preset threshold value is longer than the time used by the receiving end for receiving the check sum of the data and returning the received message of the data), receiving a response message that the data sent by the receiving end optical module has been received, and then executing step S805; otherwise, if the preset threshold is reached and the response message that the data sent by the receiving-end optical module has been received has not been received, step S809 is executed.

It should be noted that the preset time in this step may also not use a preset threshold value correspondingly set by the Runcounter register, for example, a timer in the optical module MCU is used for timing, and a time threshold value is correspondingly set, where if a response message that data has been received is not received when the set time threshold value is reached, first, whether the data retransmission flag is a third preset value is checked, and if so, step S809 is executed, but this method requires a larger data processing amount of the MCU than the method of setting the Runcounter register.

S805: and if a response message that the data is received, the second microprocessor changes the data retransmission flag bit from the first preset value to a second preset value.

After receiving the response message that the data returned by the receiving end optical module has been received, it can judge that the receiving end module has received correct data without checking the message content, and then change the data retransmission flag bit from the first preset value to the second preset value to end the data retransmission, and at the same time, it can clear the Runcounter and sendcounter registers, so that they can be in the initialized state when they are used next time. Then, step S807 is executed to wait for a response message that the receiving optical module has read the return data.

S806: the second microprocessor determines whether a response message that the data has been read is received.

Wherein, if yes, step S807 is executed, otherwise, step S809 is executed.

S807: and if a response message that the data is read is received, the second microprocessor sets the sending state flag bit to be a second preset value and sends an indication message that the second microprocessor is in an idle state to the first microprocessor.

S808: and when the first microprocessor receives the indication message that the second microprocessor is in the idle state, setting the sending state flag bit of the first microprocessor to be a second preset value.

S809: if the response message that the data is read is not received within the preset time, the second microprocessor changes the sending state zone bit from the first preset value to a second preset value, sends an indication message that the second microprocessor is in an idle state to the first microprocessor, and generates information of the fault of the upper computer at the receiving end.

Similarly, when the first microprocessor receives the indication message that the second microprocessor is in the idle state, the sending state flag bit of the first microprocessor is set to be a second preset value, and a far-end fault flag bit in the first microprocessor is set according to the fault information of the upper computer at the receiving end generated by the second microprocessor so as to report the fault of the upper computer at the receiving end to the upper computer.

S810: and if the response message that the data are received is not received, the second microprocessor judges whether the number of times of sending the data does not exceed a preset number threshold.

If yes, the second microprocessor enables the light emitting circuit again to send out the received data. Otherwise, step S811 is performed.

S811: if the number of times of sending the data exceeds a preset number threshold, the second microprocessor changes the data retransmission flag bit from a first preset value to a second preset value, changes the sending state flag bit from the first preset value to the second preset value, sets the bottom layer sending failure flag bit to the first preset value, and sends an indication message that the first microprocessor is in an idle state.

S812: and when the first microprocessor receives the indication message that the second microprocessor is in the idle state, setting the sending state flag bit of the first microprocessor to be a second preset value and setting the bottom layer sending failure flag bit of the first microprocessor to be a first preset value according to the state of the flag bit in the second microprocessor.

After the optical module at the sending end repeatedly sends data for many times, the optical module at the receiving end still does not receive correct data, and the data transmission (also called module bottom layer data transmission) between the optical modules is completely failed, so that the data retransmission flag bit g _ sendMessageAble is changed from a first preset value to a second preset value, the sending state flag bit g _ messageSendEnble is changed from the first preset value to the second preset value, and the count values of the sending time registers sendcounter and Runcounter register are reset to zero, so that the data retransmission mechanism of the optical module is ended and all the registers in the optical module are in an initialized state.

In addition, the data transmission failure flag bit g _ ReSendFail is set as a first preset value and used for informing the upper computer of the transmitting end that the data transmission fails. Meanwhile, the sending end upper computer can poll and inquire the numerical value of the zone bit, when the first preset value of the zone bit is detected, the first preset value of the zone bit can be changed into a second preset value, if the first preset value is set from 1 to 0, the step S801 is returned again, and the sending end upper computer initiates data retransmission.

In this embodiment, by establishing a data retransmission mechanism inside the optical module, functions of checking, error retransmission, and reporting transmission failure of data transmission can be implemented on a module level, so as to reduce a burden when the mechanism is implemented by an upper computer, and improve the efficiency when the overall system transmits data by using a message channel.

It should be noted that the transmission method provided in this embodiment is proposed only from the perspective of enabling data transmission, and in actual use, one optical module may be used as both a transmitting-side optical module and a receiving-side optical module. In addition, the specific representation modes of the first preset value and the second preset value of different zone bits can be the same or different.

In addition, the present embodiment provides a solution having dual microprocessors for separating the message channel function of the optical module from the functions of the optical module and the upper computer, and is applicable not only to the form of separately packaging the optical transmitter module and the optical receiver module, but also to the form of packaging the optical transmitter module and the optical receiver module together to form an optical transceiver sub-module, and mounting an optical transceiver chip on a circuit board, and for any packaging form, the related devices for transmitting optical signals are referred to as optical transmitter modules in the present embodiment, and the related devices for receiving optical signals are referred to as optical receiver modules in the present embodiment.

Finally, it should be noted that: the embodiment is described in a progressive manner, and different parts can be mutually referred; in addition, the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims

1. A data transmission method is applied to an optical module, wherein a first microprocessor and a second microprocessor which are electrically connected are arranged in the optical module, and the method comprises the following steps:

if the second microprocessor is in an idle state, the first microprocessor sends the data stored in the preset data storage space of the first microprocessor to the second microprocessor, and sets a sending state flag bit of the second microprocessor to a first preset value;

2. The method as claimed in claim 1, wherein after the second microprocessor sends the received data in the form of low frequency signal through the optical transmission circuit, the method further comprises:

the second microprocessor judges whether a response message that the data has been read is received;

if a response message that the data is read is received, the second microprocessor sets a sending state flag bit to be a second preset value and sends an indication message that the second microprocessor is in an idle state to the first microprocessor;

and when the first microprocessor receives the indication message that the second microprocessor is in the idle state, setting the sending state flag bit of the first microprocessor to be a second preset value.

3. The method of claim 1 or 2, wherein before the first microprocessor determining whether the second microprocessor is in an idle state, further comprising:

the first microprocessor monitors whether the sending state flag bit is a first preset value or not;

And if the sending state flag bit of the first microprocessor is a first preset value, judging whether the second microprocessor is in an idle state.

4. The method of claim 1, wherein a send status indication pin is disposed between the first microprocessor and the second microprocessor, wherein:

the method for judging whether the second microprocessor is in an idle state by the first microprocessor comprises the following steps:

the first microprocessor monitors whether the level value of the sending state indicating pin is a first level value;

and if the level value of the sending state indication pin is a first level value, determining that the second microprocessor is in an idle state.

5. The method of claim 4, wherein before the second microprocessor sends the received data in the form of a low frequency signal through the optical transmission circuit, further comprising:

the second microprocessor sets a level value of the transmission status indication pin to a second level value.

6. The method of claim 2, wherein after the second microprocessor determines whether a response message is received that the data has been read, the method further comprises:

If the response message that the data is read is not received, the second microprocessor judges whether the sent time length of the data exceeds a preset time length threshold value or not;

if the time length exceeds the preset time length threshold value, the second microprocessor sets the sending state zone bit to be a second preset value, sets the far-end fault zone bit to be a first preset value, and sends an indication message that the second microprocessor is in an idle state to the first microprocessor;

and when the first microprocessor receives the indication message that the second microprocessor is in the idle state, setting the sending state flag bit of the first microprocessor to be a second preset value and setting the remote fault flag bit of the first microprocessor to be a first preset value according to the state of the flag bit in the second microprocessor.

7. The method of claim 1, wherein before the second microprocessor sends the received data out through an optical transmission circuit in the form of a low frequency signal, the method further comprises:

the second microprocessor sets the data retransmission flag bit to a first preset value;

after the second microprocessor transmits the received data in the form of a low frequency signal through the optical transmission circuit, the method further includes:

The second microprocessor judges whether a response message that the data has been received is received within a preset time;

if a response message that the data has been received is received, the second microprocessor sets a data retransmission flag bit thereof to a second preset value;

if the response message that the data are received is not received, the second microprocessor judges whether the number of times of sending the data does not exceed a preset number threshold;

and if the data does not exceed the preset time threshold, the second microprocessor sends the data out through the low-frequency information channel again.

8. The method of claim 6, wherein after the second microprocessor determines whether the number of times the data has been sent does not exceed a preset number threshold, the method further comprises:

if the number of times exceeds the preset number threshold, the second microprocessor sets the data retransmission flag bit to be a second preset value, sets the sending state flag bit to be a second preset value, sets the bottom layer sending failure flag bit to be a first preset value, and sends an indication message that the second microprocessor is in an idle state to the first microprocessor;

and when the first microprocessor receives the indication message that the second microprocessor is in the idle state, setting the sending state flag bit of the first microprocessor to be a second preset value and setting the bottom layer sending failure flag bit of the first microprocessor to be a first preset value according to the state of the flag bit in the second microprocessor.

9. The method of claim 3, wherein the first microprocessor monitoring whether its transmit status flag bit is at a first predetermined value comprises:

the first microprocessor judges whether an upper computer accessed by the optical module has an action of changing a sending state mark;

if yes, the first microprocessor monitors whether the sending state flag bit is a first preset value.

10. An optical module, comprising a circuit board, and a first microprocessor and a second microprocessor disposed on the circuit board, wherein:

the first microprocessor and the second microprocessor are configured to perform the method of any of claims 1-9.