CN117253956A - Micro LED display chip with multilayer film structure and preparation method thereof - Google Patents
Micro LED display chip with multilayer film structure and preparation method thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title abstract description 8
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 53
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 48
- 238000002161 passivation Methods 0.000 claims abstract description 23
- 239000000758 substrate Substances 0.000 claims description 74
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 27
- 238000005530 etching Methods 0.000 claims description 14
- 238000004519 manufacturing process Methods 0.000 claims description 14
- 229910052594 sapphire Inorganic materials 0.000 claims description 14
- 239000010980 sapphire Substances 0.000 claims description 14
- 239000000377 silicon dioxide Substances 0.000 claims description 12
- 235000012239 silicon dioxide Nutrition 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 9
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 7
- 238000000151 deposition Methods 0.000 claims description 7
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 abstract description 2
- 239000002184 metal Substances 0.000 abstract description 2
- 238000002834 transmittance Methods 0.000 abstract description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 10
- 238000010586 diagram Methods 0.000 description 8
- 239000004065 semiconductor Substances 0.000 description 7
- 229910052593 corundum Inorganic materials 0.000 description 4
- 229910001845 yogo sapphire Inorganic materials 0.000 description 4
- 238000003491 array Methods 0.000 description 3
- 229910052681 coesite Inorganic materials 0.000 description 3
- 229910052906 cristobalite Inorganic materials 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000011049 filling Methods 0.000 description 3
- 238000002955 isolation Methods 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 229910052682 stishovite Inorganic materials 0.000 description 3
- 229910052905 tridymite Inorganic materials 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 238000009616 inductively coupled plasma Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0025—Processes relating to coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
Abstract
The invention discloses a Micro LED display chip with a multilayer film structure and a preparation method thereof. The display chip comprises a first chip and a second chip, wherein an N electrode of the first chip is connected with a P electrode of the second chip. The chip comprises a metal electrode, a passivation layer, an N-type gallium nitride layer, a multiple quantum well, a P-type gallium nitride layer, a transparent conducting layer, a first antireflection film, a second antireflection film and an oxide supporting layer from top to bottom in sequence. According to the invention, the two Micro LED chips are connected in series, so that the Micro LED chips can bear higher working voltage, and the oxide supporting layer is used for supporting the two Micro LED chips. The P-type gallium nitride layer, the transparent conducting layer, the first anti-reflection film, the second anti-reflection film and the oxide supporting layer form a multi-layer film structure, so that the light transmittance is increased, and the light-emitting efficiency is improved.
Description
Technical Field
The invention relates to the technical field of Micro LED display, in particular to a Micro LED display chip with a multilayer film structure and a preparation method thereof.
Background
As a new generation of display technology, the Micro LED has the characteristics of high resolution, high contrast, high brightness and the like, and can be widely applied to wearable equipment such as AR, VR and the like. Compared with LCD and OLED, the organic light emitting diode has the advantages of energy consumption, service life, response speed, thermal stability and the like, and plays an irreplaceable role in future display technology. The Micro-LED array with the pixel size of micron level can be used as a high-density light source, and can be integrated with a detector to sense and collect the space three-dimensional environment and the human motion information in real time to realize high interactivity. Micro-LEDs with high response speed will lay a solid foundation for high-speed, long-range visible light communications.
In the prior art, in a manufacturing method (CN 114400276 a) of a high-voltage LED chip, a sapphire substrate PSS has an upper layer and a lower layer, the upper layer is silicon oxide SiO2, and the lower layer is sapphire Al2O3. Before patterning the sapphire Al2O3, depositing a layer of silicon oxide SiO2 on the sapphire Al2O3, then manufacturing a sapphire substrate PSS by dry etching, using the substrate to operate the high-voltage LED chip, etching the bridge isolation groove by inductively coupled plasma ICP, and then etching the sapphire substrate PSS to remove the silicon oxide SiO2 above the sapphire Al2O3.
In the prior art, a Micro-LED chip structure and a preparation method thereof (CN 116632034A) belong to the technical field of LED semiconductors. The Micro-LED chip structure comprises a plurality of Micro-LED chips distributed in an array, and is characterized by comprising a substrate, a Micro-LED main body and an active addressing driving circuit, wherein the Micro-LED main body comprises a Si doped n-type GaN layer, a multiple quantum well layer and a Mg doped p-type GaN layer which are sequentially deposited on the substrate from bottom to top; the Micro-LED main body is of a step structure with a step surface, and the step surface is the upper surface of the Si-doped n-type GaN layer; the Micro-LED main body further comprises a first metal layer which is separated by a first insulating layer and is respectively connected with the Si-doped n-type GaN layer and the Mg-doped p-type GaN layer; the active addressing driving circuit comprises a first transistor, a second transistor and a capacitor which are all arranged on the substrate, and the Micro-LED main body, the first transistor and the second transistor are sequentially distributed on the substrate; the pixel circuit of the Micro-LED main body is controlled to be turned on or off through the first transistor, the second transistor is communicated with a power supply and provides stable current for the Micro-LED main body in a specific pulse time period, and the capacitor for storing signals provides stable current for the Micro-LED main body after the pulse is ended, so that active addressing drives the Micro-LED main body.
In the prior art, a Micro-LED chip with full color display column and a manufacturing method thereof (CN 116564947A) are provided, wherein the chip sequentially comprises a red light chip layer, a filter layer, a green light chip layer, a sapphire substrate and a blue light chip layer from bottom to top; the red light chip layer, the green light chip layer and the blue light chip layer are longitudinally stacked and assembled from bottom to top. According to the invention, three epitaxial structures of red light, green light and blue light are longitudinally stacked and assembled, the filter layer is arranged between the red light epitaxial layer and the green light epitaxial layer, the filter layer can reflect blue light and green light, and red light can be transmitted, so that the three epitaxial structures can independently emit light, and a longitudinally arranged full-color display Micro-LED is formed.
In the prior art, a Micro LED chip and a preparation method thereof (CN 116544263A). The method comprises the following steps: providing a substrate, growing a gallium nitride layer on the substrate, and etching the gallium nitride layer to periodically prepare a plurality of LED arrays; providing a filling layer, wherein the filling layer is flush with the surface of the LED array; providing a driving chip, and bonding the filling layer with the driving chip; removing the substrate and the redundant gallium nitride layer to form a wafer structure comprising a driving chip and an LED array; forming a light guiding layer on the wafer structure; a plurality of reflecting portions are etched on the light guiding layer to integrate the display positions of the LED array. Through the steps, the invention etches the light guide layer to form the plurality of reflecting parts, and the light emitting direction of the LED arrays is changed through the reflecting action of the reflecting parts, so that the aim that the display positions of different LED arrays on the whole chip can be arranged according to the pixel arrangement requirement is fulfilled.
In the prior art, a Micro-LED chip and a manufacturing method thereof (CN 116137306A) comprise a P electrode, an N electrode, a passivation layer, a first semiconductor layer, a light-emitting layer, a second semiconductor layer and a GaAs substrate; the P electrode is on the first semiconductor layer and passes through the passivation layer; the first semiconductor layer consists of a GaP window layer and a P-AlGaInP limiting layer; the second semiconductor layer consists of an N-AlGaInP limiting layer, a GaAs contact layer, an N-AlGaInP current spreading layer and a GaAs sacrificial layer; the N electrode is arranged on the GaAs contact layer and penetrates through the passivation layer; after the GaAs sacrificial layer is removed, the second semiconductor layer and the GaAs substrate are in a hollowed-out state, and after the epitaxial layer is separated from the GaAs substrate, the epitaxial layer is connected with the GaAs substrate through a passivation layer at one side close to the P electrode; the passivation layer covers the surfaces of the chips except the P electrode and the N electrode, covers the side wall of the chip close to one side of the P electrode and is connected with the GaAs substrate, the side wall close to one side of the N electrode is exposed, and the passivation layer only covers the GaAs contact layer; the passivation layer is composed of polyimide.
Micro LED chips are difficult to operate at high voltages due to chip size and pitch limitations compared to large-sized LED chips. In addition, the Micro-LED chip and the driving substrate are electrically and physically connected through a flip-chip bonding process. In the conventional flip chip bonding technology, the substrate needs to be removed, so that the Micro LED cannot etch the isolation groove structure.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims at solving at least one of the technical problems existing in the prior art. Therefore, the invention provides a manufacturing method of a Micro LED display chip with a multilayer film structure.
The invention provides a Micro LED chip serial structure which can bear higher working voltage.
The invention provides a preparation method of a Micro LED chip with an antireflection film structure, which improves the light emitting efficiency of the Micro LED chip.
The invention provides a preparation method of a Micro LED chip with a supporting layer structure.
A Micro LED display chip with a multilayer film structure comprises a first chip and a second chip;
the first chip and the second chip comprise a transparent conductive layer, a P-type gallium nitride layer, a multiple quantum well and an N-type gallium nitride layer which are stacked from bottom to top;
the first chip and the second chip are arranged on the oxide supporting layer, the second antireflection film and the first antireflection film which are stacked from bottom to top;
in the first chip and the second chip, P electrodes are deposited on the transparent conductive layer, and N electrodes are deposited on the N-type gallium nitride layer;
passivation layers are deposited on the first chip and the second chip except for the positions where the P electrode and the N electrode are deposited;
the N electrode of the first chip is connected with the P electrode of the second chip.
Further, the first anti-reflection film is aluminum nitride; the second anti-reflection film is alumina.
Further, the oxide support layer is silicon dioxide; the passivation layer is silicon dioxide.
A method of manufacturing a Micro LED display chip of a multilayer film structure, comprising the steps of:
s1, providing a first substrate, and sequentially growing a gallium nitride layer and a first oxide supporting layer on the first substrate;
s2, providing a second substrate, and sequentially growing an N-type gallium nitride layer, a multiple quantum well, a P-type gallium nitride layer, a transparent conducting layer, a first antireflection film, a second antireflection film and a second oxide supporting layer on the second substrate;
s3, bonding the first substrate and the second substrate through a first oxide supporting layer and a second oxide supporting layer;
s4, stripping the bonded second substrate to expose the N-type gallium nitride layer;
s5, etching the N-type gallium nitride layer to the transparent conductive layer, and partially etching the transparent conductive layer to form a mesa structure, wherein the mesa structure comprises the transparent conductive layer, the P-type gallium nitride layer, the multiple quantum wells and the N-type gallium nitride layer which are stacked from bottom to top; etching the N-type gallium nitride layer to a first antireflection film through a deep channel to form the first chip and the second chip;
s6, depositing passivation layers on the surfaces of the first chip and the second chip, and etching holes of N electrodes and P electrodes of the first chip and the second chip through the passivation layers;
s7, depositing N electrodes and P electrodes of the first chip and the second chip at the openings of the passivation layer; the N electrode of the first chip is connected with the P electrode of the second chip;
s8, stripping the first substrate to form a Micro LED with a multilayer film structure, and taking the first oxide supporting layer and the second oxide supporting layer as supporting structures of the first chip and the second chip.
Further, the first substrate is a sapphire substrate.
Further, the second substrate is a sapphire substrate.
Further, the gallium nitride layer is an undoped gallium nitride thin layer with a thickness of 10nm.
Further, the first substrate and the second substrate bond are silicon dioxide activated bonds.
Further, the second substrate and the first substrate are peeled off as laser-peeled substrates;
further, the gallium nitride layer in the peeled first substrate is decomposed.
Compared with the prior art, the invention has the advantages that:
according to the invention, two Micro LED chips are connected to form a serial structure, so that the Micro LED chip can bear higher working voltage. In order to facilitate subsequent bonding with the drive substrate, an oxide support layer is provided that enables etching of the isolation trench structure. The supporting layer structure effectively avoids the breakage of the two Micro LED chips in the bonding process, and improves the stability. In addition, a multilayer film structure is arranged on the light emergent surface, so that the light transmittance is increased, and the light emergent efficiency is improved.
Drawings
Fig. 1 is a schematic diagram of an epitaxial structure of an LED chip in step S1 according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of the LED chip in step S2 according to the embodiment of the present invention;
fig. 3 is a schematic diagram of a bonding structure of the LED chip in step S3 according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of the LED chip in step S4 according to the embodiment of the present invention;
FIG. 5 is a schematic view of the mesa structure of the LED chip in step S5 according to the embodiment of the present invention;
fig. 6 is a schematic structural diagram of the LED chip in step S6 according to the embodiment of the present invention;
fig. 7 is a schematic structural diagram of the LED chip in step S7 according to the embodiment of the present invention;
FIG. 8 is a schematic diagram of a Micro LED chip with a multilayer film structure in step S8 according to an embodiment of the present invention;
fig. 9 is a schematic diagram of a three-dimensional structure of an LED chip according to an embodiment of the present invention.
Detailed description of the preferred embodiments
In order that the features and advantages of the invention will be more fully understood, a more particular description of the invention will be rendered by reference to the following detailed description. It should be noted that, without conflict, the embodiments of the present invention and features in the embodiments may be combined with each other.
The described embodiments of the invention are only some, but not all, of the embodiments of the present application. The following description of at least one exemplary embodiment is merely exemplary in nature and is in no way intended to limit the application, its application, or uses.
In the description of the present invention, it should be noted that, with reference to the description of the orientation, for example, the orientation or positional relationship indicated by the upper, lower, left, right, etc. is based on the orientation or positional relationship shown in the drawings, only for convenience in describing the present invention, and does not indicate or imply that the apparatus or element in question must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present invention.
Examples:
a Micro LED display chip of a multilayer film structure, as shown in fig. 8 and 9, includes a first chip and a second chip;
the first chip and the second chip each include a transparent conductive layer 401, a P-type gallium nitride layer 203, a multiple quantum well 301, and an N-type gallium nitride layer 202 stacked from bottom to top;
the first chip and the second chip are each disposed on the oxide support layer, the second antireflection film 601, and the first antireflection film 501 stacked from below;
in the first chip and the second chip, P electrodes are deposited on the transparent conductive layer 401, and N electrodes are deposited on the N-type gallium nitride layer 202;
passivation layers 703 are deposited on the first chip and the second chip except for the positions where the P electrode and the N electrode are deposited;
the N electrode of the first chip is connected with the P electrode of the second chip.
In one embodiment, the first anti-reflection film 501 is aluminum nitride; the second anti-reflection film 601 is alumina.
In one embodiment, the oxide support layer is silicon dioxide; the passivation layer 703 is silicon dioxide.
A method of manufacturing a Micro LED display chip of a multilayer film structure, comprising the steps of:
s1, providing a first substrate 101, as shown in FIG. 1, wherein a gallium nitride layer 201 and a first oxide support layer 701 are sequentially grown on the first substrate 101, as shown in FIG. 2;
s2, providing a second substrate 102, and sequentially growing an N-type gallium nitride layer 202, a multiple quantum well 301, a P-type gallium nitride layer 203, a transparent conductive layer 401, a first anti-reflection film 501, a second anti-reflection film 601 and a second oxide supporting layer 702 on the second substrate 102, as shown in FIG. 2;
s3, the first substrate 101 and the second substrate 102 are bonded through a first oxide support layer 701 and a second oxide support layer 702, as shown in fig. 3;
s4, stripping the bonded second substrate 102 to expose the N-type gallium nitride layer 202, as shown in FIG. 4;
s5, etching the N-type gallium nitride layer 202 to the transparent conductive layer 401, wherein the transparent conductive layer 401 is partially etched to form a mesa structure, and the mesa structure comprises the transparent conductive layer 401, the P-type gallium nitride layer 203, the multiple quantum well 301 and the N-type gallium nitride layer 202 which are stacked from bottom to top; deep trench etching the N-type gallium nitride layer 202 to the first anti-reflection film 501 to form the first chip and the second chip, as shown in fig. 5;
s6, depositing a passivation layer 703 on the surfaces of the first chip and the second chip, and etching the passivation layer 703 to open holes of N electrodes and P electrodes of the first chip and the second chip, as shown in FIG. 6;
s7, depositing N electrodes and P electrodes of the first chip and the second chip at the openings of the passivation layer; the N electrode of the first chip is connected to the P electrode of the second chip as shown in fig. 7;
s8, peeling the first substrate 101 to form a Micro LED with a multilayer film structure, wherein a first oxide support layer 701 and a second oxide support layer 702 are used as support structures of the first chip and the second chip, as shown in FIG. 8.
In one embodiment, the first substrate 101 is a sapphire substrate.
In one embodiment, the second substrate 102 is a sapphire substrate.
In one embodiment, gallium nitride layer 201 is a thin undoped gallium nitride layer having a thickness of 10nm.
In one embodiment, the first substrate 101 and the second substrate 102 are bonded as silicon dioxide activated bonds.
In one embodiment, the second substrate 102 and the first substrate 101 are peeled off as laser-peeled substrates;
in one embodiment, the gallium nitride layer 201 in the stripped first substrate 102 is decomposed.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of one of ordinary skill in the art without departing from the spirit of the present invention. Furthermore, embodiments of the invention and features of the embodiments may be combined with each other without conflict.
Claims (10)
1. The Micro LED display chip of the multilayer film structure is characterized by comprising a first chip and a second chip;
the first chip and the second chip comprise a transparent conductive layer (401), a P-type gallium nitride layer (203), a multiple quantum well (301) and an N-type gallium nitride layer (202) which are stacked from bottom to top;
the first chip and the second chip are arranged on the oxide supporting layer, the second antireflection film (601) and the first antireflection film (501) which are stacked from bottom to top;
in the first chip and the second chip, P electrodes are deposited on the transparent conductive layer (401), and N electrodes are deposited on the N-type gallium nitride layer (202);
passivation layers (703) are deposited on the first chip and the second chip except for the positions where the P electrode and the N electrode are deposited;
the N electrode of the first chip is connected with the P electrode of the second chip.
2. The Micro LED display chip of the multilayer film structure according to claim 1, wherein the first anti-reflection film (501) is aluminum nitride; the second antireflection film (601) is alumina.
3. The Micro LED display chip of the multilayer film structure according to claim 1, wherein the oxide support layer is silica; the passivation layer (703) is silicon dioxide.
4. A method of manufacturing a Micro LED display chip of a multilayer film structure according to any one of claims 1-3, characterized by comprising the steps of:
s1, providing a first substrate (101), and sequentially growing a gallium nitride layer (201) and a first oxide support layer (701) on the first substrate (101);
s2, providing a second substrate (102), wherein an N-type gallium nitride layer (202), a multiple quantum well (301), a P-type gallium nitride layer (203), a transparent conductive layer (401), a first anti-reflection film (501), a second anti-reflection film (601) and a second oxide supporting layer (702) are sequentially grown on the second substrate (102);
s3, bonding the first substrate (101) and the second substrate (102) through a first oxide support layer (701) and a second oxide support layer (702);
s4, stripping the bonded second substrate (102) to expose the N-type gallium nitride layer (202);
s5, etching the N-type gallium nitride layer (202) to the transparent conductive layer (401), wherein the transparent conductive layer (401) is partially etched to form a mesa structure, and the mesa structure comprises the transparent conductive layer (401), the P-type gallium nitride layer (203), the multiple quantum well (301) and the N-type gallium nitride layer (202) which are stacked from bottom to top; deep channel etching the N-type gallium nitride layer (202) to a first anti-reflection film (501) to form the first chip and the second chip;
s6, depositing passivation layers (703) on the surfaces of the first chip and the second chip, and etching the passivation layers (703) to open holes of N electrodes and P electrodes of the first chip and the second chip;
s7, depositing N electrodes and P electrodes of the first chip and the second chip at the openings of the passivation layer; the N electrode of the first chip is connected with the P electrode of the second chip;
s8, stripping the first substrate (101) to form a Micro LED with a multilayer film structure, wherein a first oxide supporting layer (701) and a second oxide supporting layer (702) are used as supporting structures of the first chip and the second chip.
5. The method for manufacturing a Micro LED display chip of a multilayer film structure according to claim 4, wherein: the first substrate (101) is a sapphire substrate.
6. The method for manufacturing a Micro LED display chip of a multilayer film structure according to claim 4, wherein: the second substrate (102) is a sapphire substrate.
7. The method for manufacturing a Micro LED display chip of a multilayer film structure according to claim 4, wherein: the gallium nitride layer (201) is an undoped gallium nitride thin layer with a thickness of 10nm.
8. The method for manufacturing a Micro LED display chip of a multilayer film structure according to claim 4, wherein: the first substrate (101) and the second substrate (102) are bonded as silicon dioxide activated bonds.
9. The method for manufacturing a Micro LED display chip of a multilayer film structure according to claim 4, wherein: the second substrate (102) and the first substrate (101) are peeled off as laser-peeled substrates.
10. The method for manufacturing a Micro LED display chip of a multilayer film structure according to claim 9, wherein: the gallium nitride layer (201) in the peeled first substrate (102) is decomposed.
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| CN202311115997.0A CN117253956A (en) | 2023-08-31 | 2023-08-31 | Micro LED display chip with multilayer film structure and preparation method thereof |
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| CN202311115997.0A CN117253956A (en) | 2023-08-31 | 2023-08-31 | Micro LED display chip with multilayer film structure and preparation method thereof |
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| CN117438512A (en) * | 2023-12-21 | 2024-01-23 | 江西兆驰半导体有限公司 | High-voltage Micro LED chip and preparation method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117438512A (en) * | 2023-12-21 | 2024-01-23 | 江西兆驰半导体有限公司 | High-voltage Micro LED chip and preparation method thereof |
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