CN117200762A - Digital pulse measuring and converting circuit and method - Google Patents
Digital pulse measuring and converting circuit and method Download PDFInfo
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R29/00—Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
- G01R29/02—Measuring characteristics of individual pulses, e.g. deviation from pulse flatness, rise time or duration
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/04—Shaping pulses by increasing duration; by decreasing duration
- H03K5/06—Shaping pulses by increasing duration; by decreasing duration by the use of delay lines or other analogue delay elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/153—Arrangements in which a pulse is delivered at the instant when a predetermined characteristic of an input signal is present or at a fixed time interval after this instant
- H03K5/1534—Transition or edge detectors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/08—Duration or width modulation ; Duty cycle modulation
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Abstract
The application relates to a digital pulse measuring and converting circuit and a digital pulse measuring and converting method. The circuit is provided with an edge capturing module, an interval counting module, a scaling module, an event filtering module, a delay module and a pulse width expansion module, on one hand, the circuit captures edges to generate a start pulse signal or a stop pulse signal so as to control the working state of the interval counting module, thereby carrying out digital pulse measurement through the counting result of the interval counting module, on the other hand, the circuit counts external triggering events and events generated by the edge capturing module to generate event signals, and delays the event signals in the delay module through scaling values, thereby leading the converted signals into change information.
Description
Technical Field
The application relates to the technical field of power electronics, in particular to a digital pulse measurement and conversion circuit and a digital pulse measurement and conversion method.
Background
Pulse width modulation (Pulse Width Modulation, PWM) is widely used in many fields of measurement, communication, power control and conversion, such as instrument and meter, robot servo, motor drive, frequency converter, switching power supply, photovoltaic inversion, etc.
In the conventional technology, a PWM wave in a control system has a certain period and duty ratio, and is used for controlling on-off of each switching device in a circuit. The period and the duty ratio of the PWM wave will not change at will after setting, so it is difficult to control the on-off of the switch in the control system and synchronously control the events with certain randomness.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a digital pulse measurement and conversion circuit and method that can solve the problem of event control with a certain randomness while controlling the on-off of the switch.
A digital pulse measurement and conversion circuit, the circuit comprising:
the device comprises an edge capturing module, an interval counting module, a scaling module, an event filtering module, a delay module and a pulse width expansion module;
the edge capturing module is connected with the interval counting module, receives the detection signal, counts the edge change of the detection signal, generates a start pulse signal or a stop pulse signal according to the counting result, and sends the start pulse signal or the stop pulse signal to the interval counting module; the start pulse signal is used for controlling the counter in the interval counting module to start working from zero, and the stop pulse signal is used for controlling the counter in the interval counting module to stop counting;
the scaling module is connected with the interval counting module, and when the scaling module detects that the interval counting module stops counting, the value after the interval counting module stops counting is amplified or reduced to obtain a scaling value;
the scaling module, the event filtering module and the pulse width expansion module are all connected with the delay module, the event filtering module records the times of triggering events and generates event signals according to the times of the triggering events, the delay module receives the event signals and the scaling values, and delays the event signals by taking the scaling values as delay lengths to obtain delay signals, and the pulse width expansion module generates variable-length high-level signals according to the delay signals and preset pulse width length control parameters.
In one embodiment, a start threshold and a stop threshold are set in the edge capturing module, and when the counting result is equal to the start threshold, a start pulse signal is generated; and generating a stop pulse signal when the counting result is equal to the stop threshold value.
In one embodiment, the scaling module amplifies or reduces the value of the interval counting module after stopping counting through the first scaling control parameter, the second scaling control parameter and the scaling state value to obtain the scaling value.
In one embodiment, the formula for amplifying or reducing the value after the interval counting module stops counting is as follows:
scanval= (sparcnt < < SHIFTVAL) +remval, dir=1
Scanval= (sparcnt > > SHIFTVAL) +remval, dir=0
Wherein, SCALVAL represents a scaling value, SHIFTVAL represents a first scaling control parameter, REMVAL represents a second scaling control parameter, dir represents a scaling state value, and SPANCNT represents a value after the interval counting module stops counting.
In one embodiment, the triggering event includes: the externally input trigger event signal and the edge capture module enable the rising edge and the falling edge of the post detection signal to change.
In one embodiment, the delay state of the delay module is controlled by a delay control signal, when the delay control signal is 1, the event signal is delayed by taking the scaling value as a delay length, so as to obtain a delay signal, and when the delay control signal is 0, the event signal is output.
In one embodiment, the pulse width measurement process of the circuit comprises:
the edge capturing module receives the detection signal, counts the edge change of the detection signal, generates a start pulse signal or a stop pulse signal according to the counting result, and sends the start pulse signal or the stop pulse signal to the interval counting module, and the interval counting module counts intervals according to the start pulse signal or the stop pulse signal and obtains the duty ratio and the period of the detection signal according to the interval counting result.
In one embodiment, after the stop pulse signal is generated, counters in the edge capture module, the interval counting module, and the event filtering module are reset.
A digital pulse measurement and conversion method, the method comprising:
receiving a detection signal through an edge capturing module, counting the edge change of the detection signal, generating a start pulse signal or a stop pulse signal according to a counting result, and sending the start pulse signal or the stop pulse signal to the interval counting module; the start pulse signal is used for controlling the counter in the interval counting module to start working from zero, and the stop pulse signal is used for controlling the counter in the interval counting module to stop counting;
recording the number of triggering events through an event filtering module, and generating an event signal according to the number of triggering events;
the interval counting module starts counting from zero and stops counting under the control of the start pulse signal and the stop pulse signal, and pulse width measurement is carried out according to the counted value;
scaling the count value when the counting is stopped by a scaling module to obtain a scaling value;
according to the scaling value, the event signal is delayed by a delay module to obtain a delay signal;
and processing the delay signal through the pulse width expansion module according to a preset pulse width length control parameter to generate a variable-length high-level signal.
In one embodiment, after generating the variable length high level signal, the method further comprises:
and resetting the counters in the edge capturing module, the interval counting module and the event filtering module.
The digital pulse measuring and converting circuit and method are provided with the edge capturing module, the interval counting module, the scaling module, the event filtering module, the delay module and the pulse width expansion module, on one hand, the edge capturing is carried out to generate a start pulse signal or a stop pulse signal so as to control the working state of the interval counting module, thereby carrying out digital pulse measurement through the counting result of the interval counting module, on the other hand, the external triggering event and the event generated by the edge capturing module are counted to generate an event signal, and the delay is carried out in the delay module through the scaling value, thereby leading the converted signal to introduce change information.
Drawings
FIG. 1 is a block diagram of digital pulse measurement and conversion circuitry in one embodiment;
FIG. 2 is a diagram illustrating an example pulse measurement and conversion process in one embodiment;
FIG. 3 is a flow diagram of a method of digital pulse measurement and conversion in one embodiment;
fig. 4 is a flow chart of a pulse measurement and conversion process in another embodiment.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
In one embodiment, as shown in FIG. 1, a digital pulse measurement and conversion circuit is provided, in which circuit, comprising: the device comprises an edge capturing module, an interval counting module, a scaling module, an event filtering module, a delay module and a pulse width expansion module. It should be noted that, the detection signal may be a PWM signal, and the measurement refers to measuring a period, a duty cycle, and the like of the PWM signal, and the conversion is to convert the PWM signal into a desired control signal when a random event is encountered according to the input PWM signal. In addition, as long as each of the above-described functional modules has a specific function defined, the functions of digital pulse measurement and conversion can be realized as a whole, and the functions of each functional module are defined as follows:
as shown in fig. 1, each module includes a Reset initialization interface, the edge capture module includes a counter CAPCNT, and the edge capture module receives a detection signal PWM Pulse and detects an edge change of the PWM Pulse, which may be a rising edge and a falling edge, and counts with the counter CAPCNT when the edge change is detected. The function of the edge capturing module is to output a Start pulse signal Start or a Stop pulse signal Stop, and the output logic of the two signals is judged according to the counting result of the counter CAPCNT.
The edge capturing module is connected with the interval counting module, the interval counting module comprises an interval counter SPANCNT, the interval counter SPANCNT starts counting from zero when receiving a Start pulse signal Start, and the interval counter SPANCNT stops counting when receiving a Stop pulse signal Stop. After stopping counting, the count value of the section counter sparcnt is recorded.
The scaling module is connected with the interval counting module, the interval counting module outputs the count value of the interval counter SPANCNT to the scaling module, and the scaling module amplifies or reduces the count value to obtain a scaling value.
The scaling module, the Event filtering module and the Pulse width expansion module are all connected with the delay module, the Event filtering module records the number of triggering events, and the number of triggering events has 3 sources which are respectively the rising edge and the falling edge of an external input Event signal Event and a detection signal PWM Pulse. An event counter EVTCNT is included in the event filtering module to count trigger events to generate event signals EVT. The delay module is used for carrying out delay processing on the generated event signal EVT, specifically taking the scaling value output by the scaling module as a delay control signal of the event signal EVT, and generating a delay signal EVT_ Dly after delay. The pulse width expansion module generates a variable length high level output signal exp_out under the triggering of the delay signal evt_ Dly.
The digital pulse measuring and converting circuit is provided with the edge capturing module, the interval counting module, the scaling module, the event filtering module, the delay module and the pulse width expansion module, on one hand, the edge capturing is carried out to generate a start pulse signal or a stop pulse signal so as to control the working state of the interval counting module, thereby carrying out digital pulse measurement through the counting result of the interval counting module, on the other hand, the external triggering event and the event generated by the edge capturing module are counted to generate an event signal, and in addition, the delay is carried out in the delay module through the scaling value, so that the converted signal can introduce change information.
In one embodiment, as shown in fig. 1, a Start threshold STARTEDGE and a stop threshold STOPEDGE are set in the edge capture module, and when the count result is equal to the Start threshold STARTEDGE, a Start pulse signal Start is generated; when the count result is equal to the Stop threshold Stop, a Stop pulse signal Stop is generated.
Specifically, an example is taken as an edge counter CAPCNT [15:0] for recording the number of edge changes occurring on the input signal PWM Pulse since the reset and enable of the circuit. Generating a Start pulse signal Start when the value of the counter CAPCNT [15:0] is equal to the Start threshold STARTEDGE [15:0] (STARTEDGE [15:0] |=0); when the value of counter CAPCNT [15:0] is equal to the Stop threshold STOPPEDGE [15:0] (STOPPEDGE [15:0] |=0, and STOPPEDGE [15:0] > STARTEDGE [15:0 ]), a Stop pulse signal Stop is generated and counting is stopped. Wherein CAPCNT [15:0] represents a counter or register, bit width is 16, from 15 to 0, for conventional expression in integrated circuits TARTEDGE [15:0]! The value of the register TARTEDGE [15:0] of the storage parameter is not equal to 0, and the following similar expressions have the same meaning.
In one embodiment, the scaling module amplifies or reduces the value of the interval counting module after stopping counting by using the first scaling control parameter REMVAL, the second scaling control parameter shifttval and the scaling state value Dir, so as to obtain the scaling value.
Specifically, the formula for amplifying or reducing the value after the interval counting module stops counting is as follows:
scanval= (sparcnt < < SHIFTVAL) +remval, dir=1
Scanval= (sparcnt > > SHIFTVAL) +remval, dir=0
Wherein, SCALVAL represents a scaling value, SHIFTVAL represents a first scaling control parameter, REMVAL represents a second scaling control parameter, dir represents a scaling state value, and SPANCNT represents a value after the interval counting module stops counting.
Specifically, the scaling module is responsible for performing an enlarging or shrinking process on the value of the interval counter SPANCNT [15:0] after stopping counting, and is controlled by parameters REMVAL [15:0], SHIFTVAL [3:0], and Dir. The result after scaling is retained in the scaled value SCALVAL [31:0 ].
In one embodiment, the triggering event includes: the externally input trigger event signal and the edge capture module enable the rising edge and the falling edge of the post detection signal to change.
Specifically, the event filtering circuit is used for recording the number of times of triggering event occurrence after the circuit is enabled. There are 3 sources of trigger events: the rising and falling edges of the external input Event signal Event, the input signal PWM Pulse. The circuit includes an event counter EVTCNT [15:0]. When the value of EVTCNT [15:0] is equal to the parameter EVTVAL [15:0] (EVTVAL [15:0] |=0), an event signal EVT is generated.
In one embodiment, the delay state of the delay module is controlled by a delay control signal, when the delay control signal is 1, the event signal is delayed by taking the scaling value as the delay length, so as to obtain a delay signal, and when the delay control signal is 0, the event signal is output.
Specifically, the delay module is used for delaying the event signal EVT generated by the event filtering module, and is controlled by a delay control signal Bypass, SCALVAL [31:0 ]. When the delay control signal bypass=1, the event signal EVT bypasses directly to the output signal evt_ Dly without generating any delay; when the delay control signal bypass=0, a pulse on the event signal EVT is generated after a lapse of a system clock period of SCALVAL [31:0], and a pulse on the evt_ Dly signal.
In another embodiment, the pulse width expansion circuit is configured to generate a variable length high level output signal exp_out upon triggering of the delay circuit output signal evt_ Dly. The length of the pulse width is controlled by the parameter EXPVAL [15:0] in one system clock period TSYSCLK. The output signal exp_out may have a variable pulse width length, may be single-period or multi-period, and may be used as a notification event, an auxiliary PWM wave, etc. to facilitate event control with a certain randomness based on the PWM wave.
In one embodiment, the pulse width measurement process of the circuit includes: the edge capturing module receives the detection signal, counts the edge change of the detection signal, generates a start pulse signal or a stop pulse signal according to the counting result, sends the start pulse signal or the stop pulse signal to the interval counting module, and the interval counting module counts the intervals according to the start pulse signal or the stop pulse signal and obtains the duty ratio and the period of the detection signal according to the interval counting result.
In one embodiment, after the stop pulse signal is generated, counters in the edge capture module, the interval counting module, and the event filtering module are reset. To again perform digital pulse measurements and conversions.
As shown in fig. 2, an exemplary diagram of pulse measurement and conversion process is provided, wherein some parameters are set as follows: STARTEDGE =2, stopedge=5, dir=0, shiftval=0, remval=0, evtval=2, scanval=197, expval=3. In fig. 3, the interval between the occurrence of edge 2 and edge 5 on the signal PWM Pulse is 197 after the counter sparcnt stops counting. The second Event of input signal Event occurs later to produce Event EVT, signal evt_ Dly is delayed 197 relative to EVT, and the start position of output signal exp_out is the same as signal evt_ Dly but 3 clock cycles in length.
In summary, the pulse width measurement principle and the pulse conversion principle are explained as follows:
pulse width measurement principle: the time interval between the edges of 2 PWM pulses can be calculated by sampling the PWM pulses with a clock signal. In the application, the edge capturing module generates a control signal Start at one edge of the input PWM signal PWM Pulse to Start sampling statistics, and generates a control signal Stop at the other edge to Stop sampling statistics. The edge that starts the sampling statistic is determined by parameter STARTEDGE [15:0], and the edge that stops the sampling statistic is determined by parameter STOPEDGE [15:0]. The interval counter SPANCNT [15:0] in the interval counting module starts counting from zero under the control of Start and Stop. The value at which the interval counter SPANCNT [15:0] stops counting is the time interval between 2 pulse edges, in units of one system clock cycle.
Pulse conversion principle: in general, a PWM wave in a control system has a certain period and a duty cycle, and is used to control on/off of each switching device in a circuit. The period and the duty ratio of the PWM wave cannot be changed at will after being set, and the characteristic is unfavorable for synchronously controlling the on-off of the switch and synchronously carrying out event control with certain randomness. In the application, firstly, the event filter circuit outputs an event signal EVT to determine a reference time position (when the value of EVTCNT [15:0] is equal to the parameter EVTVAL [15:0 ]); the delay circuit then delays the event signal EVT by an amount (controlled by the parameter SCALVAL [31:0 ]) to output signal EVT_ Dly; finally, the pulse width expansion circuit expands the pulse length of the output signal EVT_ Dly (the length is controlled by the parameter EXPVAL [15:0 ]), so that an output signal EXP_Out with flexibly adjustable initial position and flexibly adjustable pulse length can be obtained and can be used as a notification event, an auxiliary PWM wave and the like, so that event control with certain randomness can be conveniently carried Out based on the PWM wave with fixed period and duty ratio.
In one embodiment, a digital pulse measurement and conversion method is provided as shown in fig. 3, comprising:
step 302, receiving the detection signal by the edge capturing module, detecting the edge change of the signal, counting, generating a start pulse signal or a stop pulse signal according to the counting result, and sending to the interval counting module; the start pulse signal is used for controlling the counter in the interval counting module to start working from zero, and the stop pulse signal is used for controlling the counter in the interval counting module to stop counting.
Step 304, the event filtering module records the number of triggering events, and generates an event signal according to the number of triggering events.
And 306, starting counting and stopping counting from zero under the control of the start pulse signal and the stop pulse signal by a section counting module, and measuring pulse width according to the counted value.
In step 308, the scaling module scales the count value when counting is stopped to obtain a scaled value.
Step 310, according to the scaling value, the event signal is delayed by the delay module to obtain a delay signal.
In step 312, the pulse width expansion module processes the delay signal according to the preset pulse width length control parameter to generate a variable length high level signal.
In a specific embodiment, the pulse measurement and conversion process is shown in fig. 4, and includes 7 steps: step 1 initialization, step 2 edge capture, step 1' event filtering, step 3 interval counting, step 4 scaling, step 5 delay, step 6 pulse width expansion. The steps 1 to 3 can only finish pulse measurement; if the parameters in the pulse width expansion of the step 6 do not need to be reset and reset in the next process, the steps 1-5 and 1' can finish pulse measurement and conversion; if the parameters in the pulse width expansion of the step 6 need to be reset and reset in the next process, the steps 1-6 and the step 1' can finish pulse measurement and conversion.
Each step is specifically described below:
step 1, initializing: the sequence is as follows: reset, parameter configuration, enable. All counters and control parameters in the high level Reset circuit of the signal Reset, including a counter CAPCNT, SPANCNT, EVTCNT and a control parameter STARTEDGE, STOPEDGE, REMVAL, SHIFTVAL, dir, SCALVAL, EVTVAL, bypass, EXPVAL; all counters in the high reset circuit of the signal Enable, including counter CAPCNT, SPANCNT, EVTCNT. All or part of the control parameters, such as the parameters STARTEDGE, STOPEDGE, REMVAL, SHIFTVAL, dir, SCALVAL, EVTVAL, bypass, EXPVAL, are configured during the parameter configuration process.
Step 2, capturing edges: the rising and falling edges of the detection signal PWM Pulse generate the zone control signals Start, stop. The internal counter CAPCNT is used to record the number of edge changes that have occurred on the PWM Pulse signal since the circuit was enabled. The pulse signal Start is generated when the value of CAPCNT is equal to parameter STARTEDGE and the pulse signal Stop is generated when it is equal to parameter STOPEDGE.
Step 1' event filtering: the number of trigger events that occurred since the circuit was enabled is recorded. When the value of the internal counter EVTCNT is equal to the parameter EVTVAL, an output event signal EVT is generated.
Step 3, counting intervals: under the control of Start and Stop signals generated by the edge capturing circuit, the interval counter SPANCNNT starts counting from zero and stops counting. If the circuit is only used for measuring pulse width, the step 3 is started to start the next pulse measuring process after the interval counting is finished and the step 1 is initialized.
Step 4, scaling: after the interval counting is stopped, the value of the counter SPANCNT is amplified or reduced, and the result is kept in the parameter SCALVAL. The scaling process is performed according to equation (1).
Step 5, time delay: the event signal EVT generated by the event filter circuit is delayed. When the parameter bypass=1, the signal EVT bypasses directly to the output signal evt_ Dly, without any delay; when the parameter bypass=0, a pulse on the event signal EVT is generated after a lapse of a number of system clock cycles from SCALVAL, and a pulse on the output evt_ Dly signal is generated. If the next pulse conversion process does not need to reset the parameter EXPVAL in the pulse width expansion of the step 6, the step 5 returns to the step 1 for initialization after the delay execution is finished, and the next pulse conversion process is started.
Step 6, pulse width expansion: upon triggering of the delayed output signal evt_ Dly of step 5, a variable length high output signal exp_out is generated. The length of the pulse width is determined by the parameter EXPVAL in units of one system clock period TSYSCLK. And step 6, after the pulse width expansion is finished, returning to the step 1 for initialization, and starting the next pulse conversion process.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.
Claims (10)
1. A digital pulse measurement and conversion circuit, the circuit comprising:
the device comprises an edge capturing module, an interval counting module, a scaling module, an event filtering module, a delay module and a pulse width expansion module;
the edge capturing module is connected with the interval counting module, receives the detection signal, counts the edge change of the detection signal, generates a start pulse signal or a stop pulse signal according to the counting result, and sends the start pulse signal or the stop pulse signal to the interval counting module; the start pulse signal is used for controlling the counter in the interval counting module to start working from zero, and the stop pulse signal is used for controlling the counter in the interval counting module to stop counting;
the scaling module is connected with the interval counting module, and when the scaling module detects that the interval counting module stops counting, the value after the interval counting module stops counting is amplified or reduced to obtain a scaling value;
the scaling module, the event filtering module and the pulse width expansion module are all connected with the delay module, the event filtering module records the times of triggering events and generates event signals according to the times of the triggering events, the delay module receives the event signals and the scaling values, and delays the event signals by taking the scaling values as delay lengths to obtain delay signals, and the pulse width expansion module generates variable-length high-level signals according to the delay signals and preset pulse width length control parameters.
2. The circuit of claim 1, wherein a start threshold and a stop threshold are set in the edge capture module, and a start pulse signal is generated when the count result is equal to the start threshold; and generating a stop pulse signal when the counting result is equal to the stop threshold value.
3. The circuit of claim 1, wherein the scaling module amplifies or reduces the value of the interval counting module after stopping counting by the first scaling control parameter, the second scaling control parameter and the scaling state value to obtain the scaling value.
4. A circuit according to claim 3, wherein the formula for scaling up or down the value after the interval counting module stops counting is as follows:
scanval= (sparcnt < < SHIFTVAL) +remval, dir=1
Scanval= (sparcnt > > SHIFTVAL) +remval, dir=0
Wherein, SCALVAL represents a scaling value, SHIFTVAL represents a first scaling control parameter, REMVAL represents a second scaling control parameter, dir represents a scaling state value, and SPANCNT represents a value after the interval counting module stops counting.
5. The circuit of claim 1, wherein the trigger event comprises: the externally input trigger event signal and the edge capture module enable the rising edge and the falling edge of the post detection signal to change.
6. The circuit according to claim 1, wherein the delay state of the delay module is controlled by a delay control signal, when the delay control signal is 1, the event signal is delayed by using the scaling value as a delay length to obtain a delay signal, and when the delay control signal is 0, the event signal is output.
7. The circuit according to any one of claims 1 to 6, wherein the pulse width measurement process of the circuit comprises:
the edge capturing module receives the detection signal, counts the edge change of the detection signal, generates a start pulse signal or a stop pulse signal according to the counting result, and sends the start pulse signal or the stop pulse signal to the interval counting module, and the interval counting module counts intervals according to the start pulse signal or the stop pulse signal and obtains the duty ratio and the period of the detection signal according to the interval counting result.
8. The circuit of any one of claims 1 to 6, wherein counters in the edge capture module, the interval count module, and the event filter module are reset after the stop pulse signal is generated.
9. A digital pulse measurement and conversion method, the method comprising:
receiving a detection signal through an edge capturing module, counting the edge change of the detection signal, generating a start pulse signal or a stop pulse signal according to a counting result, and sending the start pulse signal or the stop pulse signal to the interval counting module; the start pulse signal is used for controlling the counter in the interval counting module to start working from zero, and the stop pulse signal is used for controlling the counter in the interval counting module to stop counting;
recording the number of triggering events through an event filtering module, and generating an event signal according to the number of triggering events;
the interval counting module starts counting from zero and stops counting under the control of the start pulse signal and the stop pulse signal, and pulse width measurement is carried out according to the counted value;
scaling the count value when the counting is stopped by a scaling module to obtain a scaling value;
according to the scaling value, the event signal is delayed by a delay module to obtain a delay signal;
and processing the delay signal through the pulse width expansion module according to a preset pulse width length control parameter to generate a variable-length high-level signal.
10. The method of claim 9, wherein after generating the variable length high level signal, the method further comprises:
and resetting the counters in the edge capturing module, the interval counting module and the event filtering module.
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| PCT/CN2022/134147 WO2023231325A1 (en) | 2022-05-31 | 2022-11-24 | Digital pulse measurement and conversion circuit and method |
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| Publication number | Publication date |
|---|---|
| CN117200762B (en) | 2024-02-27 |
| WO2023231325A1 (en) | 2023-12-07 |
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