CN117177656A - Air bridge, manufacturing method thereof and quantum chip - Google Patents

Abstract

The application discloses an air bridge, a manufacturing method thereof and a quantum chip. An air bridge for forming a superconducting connection on a substrate of a quantum chip, the manufacturing method comprising: providing a substrate and two superconducting thin films formed on the substrate and having insulating spacer regions; depositing a low-loss dielectric material in the insulating interval region to form a supporting layer covering the insulating interval region; coating films on the upper surface of the supporting layer and the surfaces of the two sides facing the two superconducting films to form a superconducting bridge body, and coating films on the two superconducting films to form a superconducting pad connected with the superconducting bridge body. The support layer is low in loss, does not need to be removed, does not influence the performance of the quantum chip, can support the superconducting bridge body, and therefore can avoid fracture or collapse of the air bridge, and after the superconducting bridge body and the superconducting pad are coated with films, etching is not needed, and the problem of overetching does not exist.

Description

Air bridge, manufacturing method thereof and quantum chip

Technical Field

The application relates to the technical field of quantum chip manufacturing, in particular to an air bridge, a manufacturing method thereof and a quantum chip.

Background

The quantum chip is designed with many ground planes, adjacent ground planes can be isolated from each other by signal transmission lines, and in order to keep the decoherence time of the quantum chip unaffected, it is necessary to ensure that the adjacent ground planes remain the same in potential. In addition to the ground plane, other such areas may be present on the quantum chip: for example, two signal transmission lines need to be connected, and two chips need to be connected between conductive areas when cascading. To achieve the above connection, air bridges have been introduced in the prior art.

The current air bridge manufacturing process is to form a photoresist with an arch surface on a substrate, deposit metal on the photoresist, then carry out patterned etching on the metal, finally remove the photoresist by means of ultrasonic cleaning and the like, and the remained metal structure becomes an air bridge. However, since such an air bridge is not supported, structural stability is poor, and bridge floor breakage or collapse is liable to occur. And when the metal is etched, wet etching or dry etching is generally adopted, and over etching is easy to cause due to uneven etching, unstable etching rate and the like, so that the metal to be connected is damaged.

Disclosure of Invention

The application aims to provide an air bridge, a manufacturing method thereof and a quantum chip, so as to solve the problem that the air bridge is easy to break or collapse in the prior art, and avoid the air bridge from breaking or collapsing.

In order to solve the above technical problems, the present application provides an air bridge for forming a superconducting connection on a substrate of a quantum chip, comprising:

a supporting layer covering an insulation interval region between two superconducting films on the substrate, wherein the supporting layer is made of a low-loss dielectric material;

the superconducting bridge body is formed on the upper surface of the supporting layer and the surfaces of the two sides facing the two superconducting films, and two ends of the superconducting bridge body are respectively connected with the first superconducting film and the second superconducting film.

Preferably, the low-loss dielectric material is amorphous germanium, alpha-silicon or silicon nitride.

Preferably, the upper surface of the support layer is parallel to a plane defined by the surfaces of the two superconducting thin films.

Preferably, both side surfaces of the supporting layer are perpendicular to the upper surface.

Preferably, the method further comprises:

and the two superconducting pads are respectively formed on the two superconducting films and are respectively connected with two sides of the superconducting bridge body.

In order to solve the technical problem, the present application further provides a quantum chip, including:

a substrate;

two superconducting films formed on the substrate, wherein an insulating interval region is arranged between the two superconducting films;

the aforementioned air bridge.

Preferably, the insulating spacer region has a superconducting tape that is not connected to the two superconducting films and is covered by the support layer, and the two superconducting films and the superconducting tape constitute a coplanar waveguide.

In order to solve the above technical problem, the present application also provides a method for manufacturing an air bridge for forming a superconducting connection on a quantum chip, the method comprising:

providing a substrate and two superconducting thin films formed on the substrate and having insulating spacer regions;

depositing a low-loss dielectric material in the insulation interval region to form a supporting layer covering the insulation interval region;

and forming superconducting bridges on the upper surface and the two side surfaces of the supporting layer through film coating.

Preferably, the superconducting pads connected with the superconducting bridges are formed on the two superconducting films while forming the superconducting bridges on the upper surface of the supporting layer and the surfaces of the two sides facing the two superconducting films through the coating.

Preferably, the forming of the superconducting pads connected to the superconducting bridge on the two superconducting thin films while forming the superconducting bridge on the upper surface of the support layer and the both side surfaces facing the two superconducting thin films includes:

coating a lower photoresist layer and an upper photoresist layer with a developing speed smaller than that of the lower photoresist layer on the substrate;

exposing and developing the upper layer of photoresist and the lower layer of photoresist, forming a first opening in the upper layer of photoresist and forming a second opening with a width larger than that of the first opening in the lower layer of photoresist, so as to expose the supporting layer and part of the superconductive film on two sides of the supporting layer in the first opening;

forming a superconducting bridge body on the upper surface and the two side surfaces of the supporting layer through the first opening coating film, and forming a superconducting pad connected with the superconducting bridge body on the two superconducting films, wherein the thickness of the superconducting pad does not exceed the thickness of the lower photoresist layer;

and stripping the upper layer of photoresist and the lower layer of photoresist.

Compared with the prior art, the manufacturing method of the air bridge provided by the application has the advantages that the low-loss dielectric material is deposited on the substrate to serve as the supporting layer, the upper surface of the supporting layer and the surfaces of the two sides facing the two superconducting films are coated to form the superconducting bridge body, and the two superconducting films are coated to form the superconducting pad connected with the superconducting bridge body.

The air bridge, the quantum chip and the manufacturing method of the air bridge provided by the application belong to the same application conception, have the same technical effects and are not repeated here.

Drawings

Fig. 1 is a schematic structural diagram of an air bridge according to an embodiment of the present application.

Fig. 2 is a cross-sectional view of the air bridge A-A shown in fig. 1.

Fig. 3 is a schematic structural diagram of another form of quantum chip according to an embodiment of the present application.

Fig. 4 is a process schematic diagram of a method for manufacturing an air bridge according to an embodiment of the present application.

Detailed Description

Specific embodiments of the present application will be described in more detail below with reference to the drawings. Advantages and features of the application will become more apparent from the following description and claims. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the application.

In the description of the present application, it should be understood that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", etc., are based on the directions or positional relationships shown in the drawings, are merely for convenience in describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present application.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present application, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.

Referring to fig. 1 and 2, an air bridge is provided in an embodiment of the present application. The air bridge is used to form a superconducting connection on the substrate of the quantum chip. The air bridge comprises a support layer 11 and a superconducting bridge body 12.

The support layer 11 covers an insulating spacer region between the two superconducting thin films 30 on the substrate 20, and the material of the support layer 11 is a low-loss dielectric material. Wherein, the two superconducting films 30 are separated by an insulating spacing region, and the insulating spacing region can be provided with other circuits of the quantum chip or can be provided with no circuits, so that the substrate 20 is completely exposed. The low-loss dielectric material does not substantially affect the signal transmission of the superconducting thin film 30, and thus does not affect the decoherence time of the quantum chip. The low-loss dielectric material can be amorphous germanium, alpha-silicon, silicon nitride or the like.

The support layer 11 determines the span width of the air bridge, which can be increased by increasing the width of the support layer 11. In this embodiment, the support layer 11 may extend to both sides of the insulating spacer region, covering a portion of the two superconducting thin films 30, thereby increasing the crossing width of the air bridge.

The superconducting bridge 12 is formed on the upper surface of the support layer 11 and both side surfaces facing the two superconducting thin films 30, and both ends are connected to the two superconducting thin films 30, respectively. Wherein the superconducting bridge 12 is attached to the upper surface and both side surfaces of the supporting layer 11, that is, the inner contour of the superconducting bridge 12 is the outer contour of the supporting layer 11, so that the supporting layer 11 plays a supporting role on the superconducting bridge 12.

In this embodiment, the air bridge further comprises two superconducting pads 13. Two superconducting pads 13 are formed on the two superconducting thin films 21, respectively, and are connected to both sides of the superconducting bridge 12, respectively. Wherein, the superconducting pad 13 can indirectly increase the contact area of the superconducting bridge 12 and the superconducting thin film 30, thereby increasing the structural strength of the superconducting bridge 12.

The air bridge of this embodiment supports the superconductive bridge body through the supporting layer, avoids superconductive bridge body fracture or collapse to the supporting layer loss is low, can not cause the influence to the performance of quantum chip.

In some embodiments of the present application, the upper surface of the support layer 11 is parallel to a plane defined by the surfaces of the two superconducting thin films 30. Since the planes on which the surfaces of the two superconducting thin films 30 are located are parallel to the upper surface of the supporting layer 11, the portion of the superconducting bridge 12 located on the upper surface of the supporting layer 11 is also parallel to the two superconducting thin films 30.

Further, the two side surfaces of the supporting layer 11 are perpendicular to the upper surface, so that the portions of the superconductive bridge body 12 on the two side surfaces of the supporting layer 11 are also perpendicular to the two superconductive films 30, so that the superconductive bridge body 12 forms a frame structure with higher structural stability.

The superconductive bridge body 12 and the superconductive pad 13 are both formed of a superconductive material, and the thickness of the superconductive bridge body 12 may be the same as that of the superconductive pad 13, so that the superconductive bridge body 12 and the superconductive pad 13 can be prepared simultaneously in a process, for example, film plating is performed simultaneously.

Referring to fig. 1 and fig. 2 again, the embodiment of the application further provides a quantum chip. The quantum chip comprises a substrate 20, two superconducting thin films 30 and the air bridge of the previous embodiment. The air bridge forms a superconducting connection of the two superconducting films 30.

The length of the superconducting bridge body 12 of the air bridge can be arbitrarily set due to the support, and as shown in fig. 1, the length of the superconducting bridge body 12 is long enough to form a long tunnel air bridge.

The two superconducting films 30 may constitute resonators, filters, capacitors, etc., for example, in one particular application, the two superconducting films 30 are part of a coplanar waveguide. Specifically, the insulating spacer region has a superconducting tape 40 which is not connected to the two superconducting films 30 and is covered by the support layer 11, and the two superconducting films 30 and the superconducting tape 40 constitute a coplanar waveguide. The superconductive tape 40 serves as a central conductor of the coplanar waveguide, and the two superconductive films 30 serve as ground planes on both sides of the central conductor.

The two superconducting thin films 30 can be formed into two or more coplanar waveguide transmission lines in addition to one coplanar waveguide transmission line, as shown in fig. 3, which is a schematic structural diagram of another form of quantum chip. In the quantum chip, an insulating interval region between two superconducting thin films 30 is provided with two superconducting conduction bands 40, a common ground plane 50 is also arranged between the two superconducting conduction bands 40, the common ground plane 50 is used as a common ground plane of the two superconducting conduction bands 40, and the two superconducting thin films 30 and the common ground plane 50 are used as ground planes at two sides of the two superconducting conduction bands 40 together.

Still further, the quantum chip may include a plurality of air bridges, for example, in fig. 3, the quantum chip includes 3 air bridges, and the 3 air bridges share one supporting layer 11.

Referring to fig. 4, an embodiment of the present application provides a method for manufacturing an air bridge for forming a superconducting connection on a substrate of a quantum chip. The manufacturing method comprises the following steps:

s1: a substrate and two superconducting thin films having insulating spacer regions formed on the substrate are provided.

Wherein, as shown in fig. 4a, a schematic view of the substrate is shown. Two superconducting thin films 30 are formed on the substrate 20, and an insulating spacer region is formed between the two superconducting thin films 30.

S2: and depositing a low-loss dielectric material in the insulating interval region to form a supporting layer covering the insulating interval region.

The formation of the support layer may be achieved using a mask such as photoresist. First, a low-loss dielectric material covering two superconducting thin films and an insulating spacer region is deposited on a substrate, as shown in fig. 4b, which is a schematic diagram after the deposition of the low-loss dielectric material on the substrate. The low loss dielectric material completely covers all areas of the substrate.

And then a mask corresponding to the pattern of the supporting layer is manufactured on the low-loss dielectric material. As shown in fig. 4c, a schematic diagram is shown after a mask is formed over the substrate. The size of the mask M is the same as the size of the support layer to be fabricated. Mask M is preferably a photoresist.

Finally, etching the exposed low-loss dielectric material by using a mask, and removing the mask after etching is finished. As shown in fig. 4d, is a schematic view after forming a support layer on the substrate. The low-loss dielectric material outside the mask M is etched, and the support layer 11 remains. In this embodiment, the low-loss dielectric material is amorphous germanium, the material of the superconducting thin film 30 is aluminum, and during etching, an RIE (reactive ion etching) process may be adopted, and an F-based gas (CF 4 or SF 6) is used as an etching gas to etch the low-loss dielectric material, where the difference between the etching rate of the F-based gas for etching germanium and the etching rate of etching aluminum is large, so that the superconducting thin film 30 is not damaged while the germanium is completely etched.

S3: and forming a superconducting bridge on the upper surface of the supporting layer and the surfaces of two sides of the two superconducting films through film plating.

Wherein, as shown in fig. 4h, the film plating is a schematic diagram of the superconducting bridge body and the superconducting pad. After the film plating, a layer of superconducting metal is deposited on the upper surface of the supporting layer 11 and on the surfaces of both sides facing the two superconducting thin films 30 to form the superconducting bridge 12. In this embodiment, by plating, a superconducting pad connected to the superconducting bridge is formed on the two superconducting films while the superconducting bridge is formed on the upper surface of the support layer and the both side surfaces facing the two superconducting films. As shown in fig. 4h, while the superconducting bridge 12 is formed, a layer of superconducting metal is deposited on the two superconducting thin films 30 to form the superconducting pad 11. The superconducting pads 13 are integrally connected with the superconducting bridge 12.

In order to directly film-coat the superconducting bridge body 12 and the superconducting pad 13 without forming the superconducting bridge body 12 and the superconducting pad 13 by etching after film-coating, in some embodiments of the present application, the step of forming the superconducting bridge body on the upper surface of the support layer and both side surfaces facing the two superconducting thin films by film-coating includes:

s31: and coating a lower photoresist layer and an upper photoresist layer with a developing speed smaller than that of the lower photoresist layer on the substrate.

Wherein, as shown in fig. 4e, a schematic diagram is shown after coating two layers of photoresist on the substrate. The lower photoresist layer is Pd and the upper photoresist layer is Pu.

S32: and exposing and developing the upper layer of photoresist and the lower layer of photoresist, forming a first opening in the upper layer of photoresist and forming a second opening with a width larger than that of the first opening in the lower layer of photoresist, so as to expose the supporting layer and part of the superconductive film on two sides of the supporting layer in the first opening.

Wherein, as shown in fig. 4f, the two layers of photoresist are developed. The exposure patterns of the two layers of photoresist are the same, and when the developing is carried out, the developing speed of the lower layer of photoresist Pd is higher than that of the upper layer of photoresist Pu, and the dissolving speed of the lower layer of photoresist Pd exposure area is higher than that of the upper layer of photoresist Pu exposure area, so that the opening width of a first opening W1 formed by the upper layer of photoresist Pu is smaller than that of a second opening W2 formed by the lower layer of photoresist Pd.

S33: and forming a superconducting bridge body on the upper surface and the two side surfaces of the supporting layer through the first opening coating film, and forming a superconducting pad connected with the superconducting bridge body on the two superconducting films, wherein the thickness of the superconducting pad is not more than that of the lower photoresist layer.

Wherein, as shown in fig. 4g, the schematic view is shown after the film is coated through the first opening. The supporting layer 11 and portions of the superconducting thin films 30 on both sides thereof are exposed in the first opening W1, and then the exposed portions are plated with superconducting metal at the time of plating. Since the opening width of the second opening W2 is larger than that of the first opening W1, the superconducting pad 13 can be made to be flush with the side wall of the first opening W1 at the longest, so as not to contact with the side wall of the second opening W2. Also, since the thickness of the superconducting pad 13 does not exceed the thickness of the underlying photoresist Pd, the superconducting pad 13 is not in contact with the sidewall of the first opening W1.

S34: and stripping the upper and lower photoresist layers.

When the double-layer photoresist is stripped, as shown in fig. 4g, the superconducting pad 13 is not contacted with the side wall of the second opening W2, and is not contacted with the side wall of the first opening W1, so that the photoresist is stripped without damaging the superconducting pad 13 and the superconducting bridge 12, and the photoresist can be stripped completely more conveniently.

Since the superconducting thin film 30 is in contact with air, the surface is easily oxidized to form an oxide. In order to avoid the oxide from obstructing the electrical connection, in this embodiment, before the film is coated through the first opening, i.e. before step S33, the method further includes: oxide is removed from the surfaces of the two superconducting thin films within the first opening.

In this case, as shown in fig. 4f, after the first opening W1 and the second opening W2 are formed, the superconducting thin film 30 is easily exposed to air, thereby forming oxide on the surface. It is therefore necessary to remove the oxide from the surfaces of the two superconducting thin films. The present embodiment is preferably an IBE (ion beam etching) process to remove oxide

The manufacturing method of the air bridge does not need to etch the coated superconducting metal, the excessive etching problem in the prior art is avoided, the support layer does not need to be removed after coating, the superconducting bridge body is always supported, the structural stability can be maintained, and the problem of fracture or collapse is avoided. And the supporting layer is made of low-loss dielectric materials, so that the performance of the quantum chip is not affected.

In the description of the present specification, a description of the terms "one embodiment," "some embodiments," "examples," or "particular examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments. Further, one skilled in the art can engage and combine the different embodiments or examples described in this specification.

The foregoing is merely a preferred embodiment of the present application and is not intended to limit the present application in any way. Any person skilled in the art will make any equivalent substitution or modification to the technical solution and technical content disclosed in the application without departing from the scope of the technical solution of the application, and the technical solution of the application is not departing from the scope of the application.

Claims (10)

1. An air bridge for forming a superconducting connection on a substrate of a quantum chip, comprising:

a supporting layer covering an insulation interval region between two superconducting films on the substrate, wherein the supporting layer is made of a low-loss dielectric material;

the superconducting bridge body is formed on the upper surface of the supporting layer and the surfaces of the two sides of the two superconducting films facing the supporting layer, and the two ends of the superconducting bridge body are respectively connected with the two superconducting films.

2. The air bridge of claim 1, wherein the low loss dielectric material is amorphous germanium, a-silicon, or silicon nitride.

3. An air bridge according to claim 1, wherein the upper surface of the support layer is parallel to a plane defined by the surfaces of the two superconducting films.

4. An air bridge according to claim 3, wherein the two side surfaces of the support layer are perpendicular to the upper surface.

5. The air bridge of claim 1, further comprising:

and the two superconducting pads are respectively formed on the two superconducting films and are respectively connected with two sides of the superconducting bridge body.

6. A quantum chip, comprising:

a substrate;

two superconducting films formed on the substrate, wherein an insulating interval region is arranged between the two superconducting films;

an air bridge according to any one of claims 1 to 3.

7. The quantum chip of claim 6, wherein the insulating spacer region has a superconductive tape not connected to the two superconductive films and covered by the support layer, the two superconductive films and the superconductive tape comprising a coplanar waveguide.

8. A method of manufacturing an air bridge for forming a superconducting connection on a substrate of a quantum chip, the method comprising:

providing a substrate and two superconducting thin films formed on the substrate and having insulating spacer regions;

depositing a low-loss dielectric material in the insulation interval region to form a supporting layer covering the insulation interval region;

and forming a superconducting bridge on the upper surface of the supporting layer and the surfaces of two sides of the two superconducting films through film plating.

9. The manufacturing method according to claim 8, wherein the superconducting pads connected to the superconducting bridges are formed on the two superconducting thin films while forming superconducting bridges on the upper surface of the support layer and both side surfaces facing the two superconducting thin films by plating.

10. The manufacturing method according to claim 9, wherein the forming of the superconducting pads connected to the superconducting bridges on the two superconducting thin films while forming the superconducting bridges on the upper surface of the support layer and both side surfaces facing the two superconducting thin films by plating, comprises:

coating a lower photoresist layer and an upper photoresist layer with a developing speed smaller than that of the lower photoresist layer on the substrate;

exposing and developing the upper layer of photoresist and the lower layer of photoresist, forming a first opening in the upper layer of photoresist and forming a second opening with a width larger than that of the first opening in the lower layer of photoresist, so as to expose the supporting layer and part of the superconductive film on two sides of the supporting layer in the first opening;

forming a superconducting bridge body on the upper surface and the two side surfaces of the supporting layer through the first opening coating film, and forming a superconducting pad connected with the superconducting bridge body on the two superconducting films, wherein the thickness of the superconducting pad does not exceed the thickness of the lower photoresist layer;

and stripping the upper layer of photoresist and the lower layer of photoresist.