CN117059662A - 一种具有低反向导通损耗的GaN CAVET器件 - Google Patents
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Abstract
本发明属于功率半导体技术领域,涉及一种具有低反向导通损耗的GaN CAVET器件。该结构通过集成拥有两条电流导通路径的场效应整流管,既实现了低损耗的反向导通,又使拥有较强的反向导通电流能力。场效应整流管栅极金属的淀积和CAVET器件源极金属的淀积可以在同一步工艺下实现,无需增加额外的掩膜板和工艺步骤,使得该结构兼容常规工艺,有利于器件的集成化。该结构在低反向电压时,场效应整流管栅区下的GaN沟道开启,实现低损耗的反向导通;在反向电压较高时,P型高掺杂GaN阻挡层与GaN缓冲层形成的寄生体二极管导通,形成第二个反向导通路径,提高器件反向导通时的电流能力。同时,场效应整流管栅区对下方2DEG的耗尽作用可以有效降低器件关态时的泄漏电流。
Description
技术领域
本发明属于功率半导体技术领域,具体是指一种具有低反向导通损耗的GaNCAVET器件。
背景技术
由于GaN功率器件具有击穿电压高、导通损耗低、开关速度快、关态泄漏电流小与高温特性好等优点,在电力电子领域被广泛应用。相较于横向GaN HEMT器件,垂直型GaN器件利用纵向漂移区厚度耐压,在同等面积下可以实现更高的功率密度,降低器件在高压大电流下的功率损耗;且电场峰值远离器件表面,不易受表面态的影响,因此垂直型GaN器件更适合大功率场景的应用。
在许多功率开关电路的应用中,需要晶体管具有低损耗的反向导通能力,例如逆变器和DC-DC转换器。为了实现垂直型GaN器件的反向导通能力,有研究者提出了一种集成肖特基势垒二极管(SBD)的垂直型GaN器件,但该方案不仅需要增加额外的工艺步骤,增加了芯片成本,而且会导致晶体管的泄漏电流增大,且反向导通时电流路径单一,反向导通电流较小,反向导通损耗仍较高。
发明内容
针对上述问题,本发明属于功率半导体技术领域,涉及一种具有低反向导通损耗的GaN CAVET器件。该结构通过集成拥有两条电流导通路径的场效应整流管,实现了低损耗的反向导通,又使拥有较强的反向导通电流能力。场效应整流管栅极金属的淀积和CAVET器件源极金属的淀积可以在同一步工艺下实现,无需增加额外的掩膜板和工艺步骤,使得该结构兼容常规工艺,有利于器件的集成化。同时,场效应整流管栅区对下方二维电子气(2DEG)的耗尽作用可以有效降低器件关态时的泄漏电流。
本发明的技术方案为:
一种具有低反向导通损耗的GaN CAVET器件,包括沿器件垂直方向自下而上依次层叠设置的第一导电材料1、N型高掺杂GaN层2、GaN缓冲层3,在GaN缓冲层3的上层两端对称设置有P型高掺杂GaN阻挡层4,两端的P型高掺杂GaN阻挡层4之间具有间隙,在P型高掺杂GaN阻挡层4上表面依次层叠有GaN沟道层5和势垒层6;所述第一导电材料1引出端为漏电极;
在器件横向两端对称设置有第二导电材料9,第二导电材料9从表面沿垂直方向向下延伸至P型高掺杂GaN阻挡层4的上表面;所述第二导电材料9与P型高掺杂GaN阻挡层4和GaN沟道层5的接触类型为欧姆接触;所述第二导电材料9的引出端为源电极;
在势垒层6的上表面具有P型GaN层7,且沿器件横向方向上P型GaN层7与第二导电材料9具有间距;沿器件纵向方向,在P型GaN层7上表面两侧分别具有第三导电材料8和第四导电材料10,第三导电材料8和第四导电材料10之间具有间距;所述第三导电材料8和P型GaN层7的接触为肖特基接触,所述第三导电材料8引出端为栅电极;第四导电材料10和P型GaN层7的接触类型为欧姆接触,且第四导电材料10与两侧的第二导电材料9电气连接,所述第四导电材料10的引出端为场效应整流管的栅极;
第二导电材料9与P型GaN层7、第三导电材料8和第四导电材料10之间的空隙处以及第三导电材料8与第四导电材料10之间的空隙处填充钝化层。
本发明的有益效果在于:
1、该结构中场效应整流管栅极金属的淀积和CAVET器件源极金属的淀积可以在同一步工艺下实现,无需增加额外的掩膜板和工艺步骤,使得该结构兼容常规工艺,有利于器件的集成化;
2、该结构通过集成拥有两条电流导通路径的场效应整流管,实现了低损耗的反向导通,又使拥有较强的反向导通电流能力。在低反向电压时,场效应整流管栅区下的GaN沟道开启,实现低损耗的反向导通;在反向电压较高时,P型高掺杂GaN阻挡层与GaN缓冲层形成的寄生体二极管导通,形成第二个反向导通路径,提高器件反向导通时的电流能力;
3、该结构在正向阻断时,P型高掺杂GaN阻挡层4辅助耗尽漂移区,优化电场分布,同时P型高掺杂GaN阻挡层4减小了源、漏电极间通过缓冲层3的泄漏电流,有效提高器件耐压;
4、该结构中具有孔隙的P型高掺杂GaN阻挡层4使得二维电子气2DEG只能从孔隙通过形成垂直电流,结合P型GaN栅极对栅极下方2DEG的耗尽作用,二者共同实现器件增强型;同时,场效应整流管栅区对下方二维电子气的耗尽作用可以有效降低器件关态时的泄漏电流。
附图说明
图1是实施例1的结构示意图;
图2是实施例1沿AA’的截面剖面图;
图3是实施例1沿BB’的截面剖面图。
具体实施方式
下面结合附图和实施例,详细描述本发明的技术方案:
实施例1
如图1所示,一种具有低反向导通损耗的GaN CAVET器件,包括沿器件垂直方向自下而上依次层叠设置的第一导电材料1、N型高掺杂GaN层2、GaN缓冲层3,在GaN缓冲层3的上层器件两端对称设置有P型高掺杂GaN阻挡层4,两端的P型高掺杂GaN阻挡层4之间具有间隙,在P型高掺杂GaN阻挡层4上表面依次层叠有GaN沟道层5和势垒层6;所述第一导电材料1引出端为漏电极;
其特征在于,在器件横向两端对称设置有第二导电材料9,第二导电材料9从表面沿垂直方向向下延伸至P型高掺杂GaN阻挡层4的上表面;所述第二导电材料9与P型高掺杂GaN阻挡层4和GaN沟道层5的接触类型为欧姆接触;所述第二导电材料9的引出端为源电极;
在势垒层6的上表面具有P型GaN层7,且沿器件横向方向上P型GaN层7与第二导电材料9具有间距;沿器件纵向方向,在P型GaN层7上表面两侧分别具有第三导电材料8和第四导电材料10,第三导电材料8和第四导电材料10之间具有间距;所述第三导电材料8和P型GaN层7的接触为肖特基接触,所述第三导电材料8引出端为栅电极;第四导电材料10和P型GaN层7的接触类型为欧姆接触,且第四导电材料10与第二导电材料9电气连接,所述第四导电材料10的引出端为场效应整流管的栅极;
第二导电材料9与P型GaN层7、第三导电材料8和第四导电材料10之间的空隙处以及第三导电材料8与第四导电材料10之间的空隙处填充钝化层。
本发明的工作原理:该结构在低反向电压时,场效应整流管栅区下的GaN沟道开启,实现低损耗的反向导通;在反向电压较高时,P型高掺杂GaN阻挡层与GaN缓冲层形成的寄生体二极管导通,形成第二个反向导通路径,提高器件反向导通时的电流能力;正向阻断时,P型高掺杂GaN阻挡层辅助耗尽漂移区,优化电场分布,提高器件耐压;具有孔隙的P型高掺杂GaN阻挡层与P型GaN栅极,二者共同实现器件增强型,同时,场效应整流管栅区对下方二维电子气的耗尽作用可以有效降低器件关态时的泄漏电流。
Claims (2)
1.一种具有低反向导通损耗的GaN CAVET器件,包括沿器件垂直方向自下而上依次层叠设置的第一导电材料(1)、N型高掺杂GaN层(2)、GaN缓冲层(3),在GaN缓冲层(3)的上层两端对称设置有P型高掺杂GaN阻挡层(4),两端的P型高掺杂GaN阻挡层(4)之间具有间隙,在P型高掺杂GaN阻挡层(4)上表面依次层叠有GaN沟道层(5)和势垒层(6);所述第一导电材料(1)引出端为漏电极;
其特征在于,在器件横向两端对称设置有第二导电材料(9),第二导电材料(9)从表面沿垂直方向向下延伸至P型高掺杂GaN阻挡层(4)的上表面;所述第二导电材料(9)与P型高掺杂GaN阻挡层(4)和GaN沟道层(5)的接触类型为欧姆接触;所述第二导电材料(9)的引出端为源电极;
在势垒层(6)的上表面具有P型GaN层(7),且沿器件横向方向上P型GaN层(7)与第二导电材料(9)具有间距;沿器件纵向方向,在P型GaN层(7)上表面两侧分别具有第三导电材料(8)和第四导电材料(10),第三导电材料(8)和第四导电材料(10)之间具有间距;所述第三导电材料(8)和P型GaN层(7)的接触为肖特基接触,所述第三导电材料(8)引出端为栅电极;第四导电材料(10)和P型GaN层(7)的接触类型为欧姆接触,且第四导电材料(10)与两侧的第二导电材料(9)电气连接,所述第四导电材料(10)的引出端为场效应整流管的栅极;
第二导电材料(9)与P型GaN层(7)、第三导电材料(8)和第四导电材料(10)之间的空隙处以及第三导电材料(8)与第四导电材料(10)之间的空隙处填充钝化层。
2.根据权利要求1所述的一种具有低反向导通损耗的GaN CAVET器件,其特征在于,所述势垒层(6)采用的材料为AlN、AlGaN、InGaN、InAlN中的一种或几种的组合。
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