CN116936631B - Epitaxial structure of gallium nitride-based transistor and preparation method - Google Patents
Epitaxial structure of gallium nitride-based transistor and preparation method Download PDFInfo
- Publication number
- CN116936631B CN116936631B CN202311188656.6A CN202311188656A CN116936631B CN 116936631 B CN116936631 B CN 116936631B CN 202311188656 A CN202311188656 A CN 202311188656A CN 116936631 B CN116936631 B CN 116936631B
- Authority
- CN
- China
- Prior art keywords
- layer
- sub
- algan
- doped gan
- thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 127
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 18
- 238000002360 preparation method Methods 0.000 title abstract description 9
- 229910002704 AlGaN Inorganic materials 0.000 claims abstract description 107
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 47
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 47
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 230000006872 improvement Effects 0.000 claims abstract description 23
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims abstract description 18
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims abstract description 11
- 239000011701 zinc Substances 0.000 claims abstract description 11
- 229910052725 zinc Inorganic materials 0.000 claims abstract description 11
- 229910052742 iron Inorganic materials 0.000 claims abstract description 9
- 239000004065 semiconductor Substances 0.000 claims abstract description 9
- 239000011777 magnesium Substances 0.000 claims description 29
- 230000004888 barrier function Effects 0.000 claims description 23
- 238000000151 deposition Methods 0.000 claims description 19
- 239000002019 doping agent Substances 0.000 claims description 12
- 238000003780 insertion Methods 0.000 claims description 9
- 230000037431 insertion Effects 0.000 claims description 9
- 229910005191 Ga 2 O 3 Inorganic materials 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 7
- 229910052710 silicon Inorganic materials 0.000 claims description 7
- 230000007423 decrease Effects 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 229910052749 magnesium Inorganic materials 0.000 claims description 5
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical group [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 claims description 4
- 229910052732 germanium Inorganic materials 0.000 claims description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 claims 2
- 239000010410 layer Substances 0.000 description 446
- 238000002474 experimental method Methods 0.000 description 25
- 230000005533 two-dimensional electron gas Effects 0.000 description 19
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 16
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 14
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 9
- 229910052733 gallium Inorganic materials 0.000 description 9
- 229910052757 nitrogen Inorganic materials 0.000 description 8
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 239000013078 crystal Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 239000002356 single layer Substances 0.000 description 5
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000010893 electron trap Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000005012 migration Effects 0.000 description 3
- 238000013508 migration Methods 0.000 description 3
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 238000005137 deposition process Methods 0.000 description 2
- 229910001882 dioxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
- H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
- H01L29/205—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/207—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds further characterised by the doping material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/26—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
- H01L29/267—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys in different semiconductor regions, e.g. heterojunctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
The application provides an epitaxial structure of a gallium nitride-based transistor and a preparation method thereof, wherein the epitaxial structure of the gallium nitride-based transistor comprises a substrate, and a buffer layer, an improvement layer and a semiconductor layer which are sequentially deposited on the substrate; the improvement layer comprises a first sub-layer, a second sub-layer and a third sub-layer which are sequentially deposited on the buffer layer; the first sub-layer comprises an element doped GaN layer and Ga deposited on the element doped GaN layer 2 O 3 A second sub-layer comprising periodically and alternately grown P-AlGaN layers and AlGaO layers 3 The third sub-layer is an n-AlGaN layer, wherein the element doped GaN layer is any one of a carbon doped GaN layer, an iron doped GaN layer and a zinc doped GaN layer, and the performance of the device is improved.
Description
Technical Field
The application belongs to the technical field of semiconductors, and particularly relates to an epitaxial structure of a gallium nitride-based transistor and a preparation method thereof.
Background
The epitaxial structure of the high electron mobility transistor of the conventional AlGaN/GaN heterostructure comprises a substrate, a nucleation layer, a buffer layer, a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer and a GaN cap layer;
GaN material grows on heterogeneous substrate, there is great lattice mismatch, produce a large amount of lattice defect in the buffer layer, and AlGaN/GaN heterostructure makes epitaxial layer dislocation defect further increase, these defects can form the electric leakage channel, gaN channel layer electron leaks to the buffer layer along electric leakage channel relatively easily, this has not only reduced the two-dimensional electron gas concentration of channel layer, also can arouse the electric current collapse effect, make the two-dimensional restriction characteristic of GaN channel layer weaken, two-dimensional electron gas concentration reduces, the output of high-frequency, high-power device has been restricted, the device is broken down voltage has reduced, influence the reliability of device, therefore it is crucial to prepare the device that has high two-dimensional electron gas concentration and low buffer layer leakage current in order to improve device operating frequency and output power and reliability.
Disclosure of Invention
In order to solve the technical problems, the application provides an epitaxial structure of a gallium nitride-based transistor and a preparation method thereof, which are used for solving the technical problems that the channel layer has low two-dimensional electron gas concentration, the buffer layer has larger leakage current, the short channel effect of the device is obvious, the breakdown voltage resistance is reduced, and the reliability of the device is affected.
In one aspect, the application provides a gallium nitride-based transistor epitaxial structure, comprising a substrate, and a buffer layer, an improvement layer and a semiconductor layer which are sequentially deposited on the substrate;
the improvement layer comprises a first sub-layer, a second sub-layer and a third sub-layer which are sequentially deposited on the buffer layer; the first sub-layer comprises an element doped GaN layer and Ga deposited on the element doped GaN layer 2 O 3 A second sub-layer comprising periodically and alternately grown P-AlGaN layers and AlGaO layers 3 The third sub-layer is an n-AlGaN layer, wherein the element doped GaN layer is any one of a carbon doped GaN layer, an iron doped GaN layer and a zinc doped GaN layer.
Compared with the prior art, the application has the beneficial effects that: the element doped GaN layer of the first sub-layer can introduce deep level electron traps, reduce electrons injected into the buffer layer, improve the resistance of the buffer layer, and periodically junction the second sub-layerIn the structure, the P-AlGaN layer can deplete electrons migrating to the buffer layer, and on the other hand Ga 2 O 3 The lattice mismatch with GaN is only 2.8%, and the dislocation generated by lattice mismatch between GaN and Ga is less 2 O 3 、AlGaO 3 The barrier width is wider than GaN and AlGaN, so that Ga of the first sub-layer 2 O 3 AlGaO of layer and second sub-layer 3 Can greatly block the electron migration of the channel layer to the buffer layer, thereby reducing the leakage current of the buffer layer, and the P-AlGaN layer and AlGaO alternately grown in the second sub-layer 3 Layer(s) , The purpose is to prevent the problem of reducing the two-dimensional electron concentration of the channel layer caused by the fact that the positive holes of the P-AlGaN layer migrate to the channel layer when dislocation is blocked from extending to the channel layer or even to the surface of the epitaxial layer, the third sub-layer (n-AlGaN layer) can deplete the positive holes permeated from the P-AlGaN layer in the second sub-layer to the channel layer, the number of the positive holes entering the channel layer is further reduced, the high two-dimensional electron concentration of the channel layer is ensured, the gradually reduced Al component of the n-AlGaN sub-layer can relieve the lattice mismatch between the second sub-layer and the channel layer, so that the high-quality channel layer is prepared, and the performance of the device is improved.
Further, the Al component in the P-AlGaN layer ranges from 0.2 to 0.5, and the AlGaO 3 The Al component in the layer ranges from 0.2 to 0.5, the Al component in the n-AlGaN layer ranges from 0to 0.2, and the Al component in the n-AlGaN layer gradually decreases along the growth direction of the n-AlGaN layer.
Further, the semiconductor layer comprises a GaN channel layer, an AlN inserting layer, a barrier layer and a cap layer which are deposited in sequence.
Further, the thickness of the buffer layer is in the range of 1.2-2.8 μm, the thickness of the GaN channel layer is in the range of 100-250 nm, the thickness of the AlN insert layer is in the range of 2-5 nm, the thickness of the barrier layer is in the range of 10-40 nm, and the thickness of the cap layer is in the range of 5-50 nm.
Further, the P-AlGaN layer and AlGaO 3 The value range of the layer alternate growth period is 2-6.
On the other hand, the application also provides a preparation method of the epitaxial structure of the gallium nitride-based transistor, which comprises the following steps:
providing a substrate;
depositing a buffer layer on the substrate;
depositing an improvement layer on the buffer layer, wherein the improvement layer comprises a first sub-layer, a second sub-layer and a third sub-layer; the first sub-layer comprises an element doped GaN layer and Ga deposited on the element doped GaN layer 2 O 3 A second sub-layer comprising periodically and alternately grown P-AlGaN layers and AlGaO layers 3 The third sub-layer is an n-AlGaN layer, wherein the element doped GaN layer is any one of a carbon doped GaN layer, an iron doped GaN layer and a zinc doped GaN layer;
depositing a GaN channel layer on the improvement layer;
depositing an AlN inserting layer on the GaN channel layer;
depositing a barrier layer on the AlN insertion layer;
a cap layer is deposited over the barrier layer.
Further, the P-AlGaN layer P-type dopant is magnesium or zinc, and the n-AlGaN layer n-type dopant is silicon or germanium.
Further, the carbon doping concentration in the carbon doped GaN layer is in the range of 1×10 18 cm -3 -1×10 19 cm -3 The doping concentration range of the P-AlGaN layer P-type dopant magnesium is 1 multiplied by 10 16 cm -3 -1×10 17 cm -3 The doping concentration of the n-type dopant silicon in the n-AlGaN layer ranges from 1X 10 14 cm -3 -1×10 15 cm -3 。
Further, the temperature range of the reaction cavity of the element doped GaN layer is 800-1200 ℃, the pressure range of the reaction cavity of the element doped GaN layer is 150-250torr, and the Ga is the same as the Ga 2 O 3 The pressure of the layer reaction cavity ranges from 50torr to 200torr.
Drawings
Fig. 1 is a schematic structural diagram of an epitaxial structure of a gallium nitride-based transistor according to a first embodiment of the present application.
Fig. 2 is a flowchart of a method for preparing an epitaxial structure of a gan-based transistor according to a second embodiment of the application.
Description of main reference numerals: 1. a substrate; 2. a buffer layer; 3. an improvement layer; 4. a GaN channel layer; 5. an AlN insertion layer; 6. a barrier layer; 7. a cap layer; 31. a first sub-layer; 32. a second sub-layer; 33. and a third sub-layer.
The application will be further described in the following detailed description in conjunction with the above-described figures.
Detailed Description
In order that the application may be readily understood, a more complete description of the application will be rendered by reference to the appended drawings. Several embodiments of the application are presented in the figures. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Example 1
Referring to fig. 1, an epitaxial structure of a gan-based transistor according to a first embodiment of the present application includes a substrate 1, a buffer layer 2, an improvement layer 3, and a semiconductor layer sequentially deposited on the substrate 1;
the semiconductor layer comprises a GaN channel layer 4, an AlN inserting layer 5, a barrier layer 6 and a cap layer 7 which are deposited in sequence. As can be seen, the buffer layer 2, the improvement layer 3, the GaN channel layer 4, the AlN insert layer 5, the barrier layer 6, and the cap layer 7 are sequentially deposited on the substrate 1.
The improvement layer comprises a first sub-layer 31, a second sub-layer 32 and a third sub-layer 33 which are sequentially deposited on the buffer layer;
the first sub-layer 31 includes an element doped GaN layer and Ga deposited on the element doped GaN layer 2 O 3 A second sub-layer 32 comprising periodically and alternately grown P-AlGaN layers and AlGaO layers 3 The third sub-layer 33 is an n-AlGaN layer, wherein the element doped GaN layer is any one of a carbon doped GaN layer, an iron doped GaN layer and a zinc doped GaN layer, and it can be understood that the element doped GaN layer is carbon, i.e. the carbon doped GaN layer; the doping element of the element doped GaN layer is iron, namely the iron doped GaN layer; the element doped GaN layer is doped with zinc, namely the zinc doped GaN layer.
Specifically, the thickness of the element doped GaN layer ranges from 200nm to 1500nm, and the Ga 2 O 3 The thickness of the layer is in the range of 100 nm-1000 nm, the thickness of the P-AlGaN layer is in the range of 50 nm-500 nm, the AlGaO 3 The thickness of the layer ranges from 20nm to 200nm, and the thickness of the n-AlGaN layer ranges from 100nm to 1000nm. Alternatively, the element doped GaN layer has a thickness of 200nm, 400nm, 800nm, 1100nm, or 1500nm, and the Ga 2 O 3 The thickness of the layer is 100nm, 300nm, 600nm, 800nm or 1000nm, the thickness of the P-AlGaN layer is 50nm, 100nm, 150nm, 300nm, 400nm or 500nm, the AlGaO 3 The thickness of the layer is 20nm, 60nm, 100nm, 130nm, 160nm or 200nm, and the thickness of the n-AlGaN layer is in the range of 100nm, 200nm, 400nm, 600nm, 800nm or 1000nm.
Specifically, the Al component in the P-AlGaN layer ranges from 0.2 to 0.5, and the AlGaO 3 The Al component in the layer ranges from 0.2 to 0.5, the Al component in the n-AlGaN layer ranges from 0to 0.2, and the Al component in the n-AlGaN layer gradually decreases along the growth direction of the n-AlGaN layer. Alternatively, the Al component in the P-AlGaN layer is 0.2, 0.25, 0.3, 0.35, 0.4 or 0.5,the AlGaO 3 The Al component in the layer is 0.2, 0.25, 0.3, 0.35, 0.4 or 0.5, the Al component in the n-AlGaN layer gradually decreases from 0.2 to 0 along the growth direction of the n-AlGaN layer, or the Al component in the n-AlGaN layer gradually decreases from 0.15 to 0 along the growth direction of the n-AlGaN layer.
Specifically, the thickness of the buffer layer 2 ranges from 1.2 μm to 2.8 μm, the thickness of the GaN channel layer 4 ranges from 100nm to 250nm, the thickness of the AlN insert layer 5 ranges from 2nm to 5nm, the thickness of the barrier layer 6 ranges from 10nm to 40nm, and the thickness of the cap layer 7 ranges from 5nm to 50nm. Alternatively, the thickness of the buffer layer 2 is 1.2 μm, 2 μm, 2.2 μm or 2.8 μm, the thickness of the GaN channel layer 4 is 100nm, 150nm, 175nm, 200nm or 250nm, the thickness of the AlN insert layer 5 is 2nm, 2.5nm, 3.5nm, 4nm or 5nm, the thickness of the barrier layer 6 is 10nm, 15nm, 22nm, 30nm, 35nm or 40nm, and the thickness of the cap layer 7 is 5nm, 15nm, 30nm, 40nm or 50nm.
The P-AlGaN layer and AlGaO 3 The value range of the layer alternate growth period is 2-6, and the P-AlGaN layer and AlGaO layer are optional 3 The layer alternate growth period takes a value of 2, 4 or 6.
In the present embodiment, the improvement layer 3 includes a first sub-layer 31, a second sub-layer 32, and a third sub-layer 33;
the first sub-layer 31 is a carbon doped GaN layer and Ga sequentially deposited on the buffer layer 2 2 O 3 A layer, wherein the carbon doped GaN layer has a carbon doping concentration of 6×10 18 cm -3 The thickness of the carbon doped GaN layer is 400nm, ga 2 O 3 The layer thickness was 300nm;
the second sub-layer 32 is deposited on the first sub-layer 31 and includes 4 periods of alternately stacked Mg-doped P-AlGaN layers and AlGaO layers 3 A layer, wherein the Mg doping concentration is 4×10 16 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the The thickness of the P-AlGaN layer is 150nm, the Al component is 0.25, alGaO 3 The layer thickness is 100nm, and the Al component is 0.35;
the third sub-layer 33 is an n-AlGaN layer with Si doping deposited on the second sub-layer 32, wherein the Si doping concentration is 4×10 14 cm -3 The thickness of the n-AlGaN layer is 200nm, and the Al component can be reduced from 0.2 to 0;
in order to facilitate subsequent testing and understanding, experimental group one, experimental group two, experimental group three, experimental group four, experimental group five, experimental group six, experimental group seven, experimental group eight, experimental group nine, experimental group ten and control group one are introduced in the application;
wherein, experiment group one, experiment group two, experiment group three, experiment group four, experiment group five, experiment group six, experiment group seven, experiment group eight, experiment group nine, experiment group ten all adopt the epitaxial structure of gallium nitride-based transistor as described in embodiment one, which all includes improvement layer 3 in embodiment one, and comparison group one adopts transistor in the prior art, its structure is the same as embodiment one, but the difference is as follows: the control group one was used without the improvement layer 3 in the prior art.
Specifically, the second sub-layer 32 (alternately stacked Mg-doped P-AlGaN layers and AlGaO) in experiment group I 3 Layer) alternating growth period value of 4, and the Mg doping concentration of the P-AlGaN layer is 4 multiplied by 10 16 cm -3 Carbon doping concentration of carbon doped GaN layer is 6 multiplied by 10 18 cm -3 A first sub-layer 31, a second sub-layer 32, and a third sub-layer 33;
second sub-layer 32 in experiment group II (alternately stacked Mg doped P-AlGaN layers and AlGaO) 3 Layer) alternating growth period value of 4, and the Mg doping concentration of the P-AlGaN layer is 4 multiplied by 10 16 cm -3 Carbon doping concentration of carbon doped GaN layer is 1×10 18 cm -3 A first sub-layer 31, a second sub-layer 32, and a third sub-layer 33;
second sub-layer 32 in experiment group three (alternately stacked Mg doped P-AlGaN layers and AlGaO) 3 Layer) alternating growth period value of 4, and the Mg doping concentration of the P-AlGaN layer is 4 multiplied by 10 16 cm -3 Carbon doping concentration of carbon doped GaN layer is 1×10 19 cm -3 A first sub-layer 31, a second sub-layer 32, and a third sub-layer 33;
second sub-layer 32 in experiment group four (alternately stacked Mg doped P-AlGaN layer and AlGaO) 3 Layer) alternating growth period value of 4, and Mg doping concentration of P-AlGaN layerDegree of 1×10 16 cm -3 Carbon doping concentration of carbon doped GaN layer is 6 multiplied by 10 18 cm -3 A first sub-layer 31, a second sub-layer 32, and a third sub-layer 33;
second sub-layer 32 in experiment group five (alternately stacked Mg doped P-AlGaN layer and AlGaO) 3 Layer) alternating growth period value 4, P-AlGaN layer Mg doping concentration 1×10 17 cm -3 Carbon doping concentration of carbon doped GaN layer is 6 multiplied by 10 18 cm -3 A first sub-layer 31, a second sub-layer 32, and a third sub-layer 33;
second sub-layer 32 in experiment group six (alternately stacked Mg-doped P-AlGaN layers and AlGaO) 3 Layer) alternating growth period value 2, P-AlGaN layer Mg doping concentration 4×10 16 cm -3 Carbon doping concentration of carbon doped GaN layer is 6 multiplied by 10 18 cm -3 A first sub-layer 31, a second sub-layer 32, and a third sub-layer 33;
second sub-layer 32 in experiment group seven (alternately stacked Mg doped P-AlGaN layer and AlGaO) 3 Layer) alternating growth period value of 6, and the Mg doping concentration of the P-AlGaN layer is 4 multiplied by 10 16 cm -3 Carbon doping concentration of carbon doped GaN layer is 6 multiplied by 10 18 cm -3 A first sub-layer 31, a second sub-layer 32, and a third sub-layer 33;
second sub-layer 32 in experiment group eight (alternately stacked Mg-doped P-AlGaN layers and AlGaO) 3 Layer) alternating growth cycle value 4, without first sublayer 31, with second sublayer 32, with third sublayer 33;
carbon doping concentration of carbon doped GaN layer in experimental group nine is 6×10 18 cm -3 A first sub-layer 31, a second sub-layer 32, and a third sub-layer 33 are included;
second sub-layer 32 in experimental group ten (alternately stacked Mg doped P-AlGaN layer and AlGaO) 3 Layer) alternating growth period value of 4, and the Mg doping concentration of the P-AlGaN layer is 4 multiplied by 10 16 cm -3 Carbon doping concentration of carbon doped GaN layer is 6 multiplied by 10 18 cm -3 The first sub-layer 31 is included, the second sub-layer 32 is included, and the third sub-layer 33 is not included.
The two-dimensional electron gas concentrations and buffer layer 2 leakage currents of the first experimental group, the second experimental group, the third experimental group, the fourth experimental group, the fifth experimental group, the sixth experimental group, the seventh experimental group, the eighth experimental group, the ninth experimental group and the first control group were tested, and the test results are shown in table 1:
as is clear from Table 1, in the first experimental group, the two-dimensional electron gas concentration was 7.2X10 12 cm -2 Buffer layer 2 leakage current 3.41×10 -4 A/mm;
Experiment group II, two-dimensional electron gas concentration was 7.5X10 12 cm -2 Buffer layer 2 leakage current 6.54×10 -4 A/mm;
Experiment group three, two-dimensional electron gas concentration of 7.0X10 12 cm -2 Buffer layer 2 leakage current 3.68X10 -4 A/mm;
Experiment group IV, two-dimensional electron gas concentration of 8.2X10 12 cm -2 Buffer layer 2 leakage current 2.2×10 -3 A/mm;
Experiment group five, two-dimensional electron gas concentration was 3.2X10 12 cm -2 Buffer layer 2 leakage current 1.08X10 -4 A/mm;
Experiment group six, two-dimensional electron gas concentration was 7.6X10 12 cm -2 Buffer layer 2 leakage current 6.23×10 -4 A/mm;
Experiment group seven, two-dimensional electron gas concentration was 4.0X10 12 cm -2 Buffer layer 2 leakage current 2.7X10 -4 A/mm;
Experimental group eight, two-dimensional electron gas concentration 7.7X10 12 cm -2 Buffer layer 2 leakage current 1.02X10 -3 A/mm;
Experiment group nine, two-dimensional electron gas concentration was 7.9X10 12 cm -2 Buffer layer 2 leakage current 2.57×10 -2 A/mm;
Ten experimental groups, two-dimensional electron gas concentration was 6.8X10 12 cm -2 Buffer layer 2 leakage current 3.95×10 -4 A/mm;
Control group I, two-dimensional electron gas concentration 5.5X10 12 cm -2 Buffer layer 2 leakage current 8.3X10 -2 A/mm。
As can be seen from table 1, according to the experimental data of the above experimental examples and comparative examples of the present application, compared with the conventional preparation method, the transistor prepared by the preparation method disclosed by the present application has the advantages of improving the two-dimensional electron gas concentration of the channel layer, reducing the leakage current of the buffer layer 2, improving the breakdown voltage of the device, solving the problems of short channel effect, low output capability and limited output of the high-frequency and high-power device.
Example two
Referring to fig. 2, a method for preparing an epitaxial structure of a gallium nitride-based transistor according to a second embodiment of the application is shown, the method comprising the following steps: S01-S07;
s01: providing a substrate 1;
the substrate 1 includes, but is not limited to, a silicon substrate, a sapphire substrate, and a silicon carbide substrate; as an example of the present application, a silicon substrate is used as the epitaxial layer growth substrate 1 of the present example.
S02: depositing a buffer layer 2 on the substrate 1;
the buffer layer 2 includes, but is not limited to, any one of AlN, alGaN, gaN or a combination thereof, and as an example of the application, the buffer layer 2 is an AlGaN buffer layer, and the N (nitrogen) source can be NH 3 The Ga (gallium) source can be TMGa, the Al (aluminum) source can be TMAL, the specific deposition process is that the temperature of a reaction cavity can be 700-1050 ℃, the pressure of the cavity can be 80-220 torr, the growth thickness can be 1.2-2.8 mu m, and the thickness of a specific AlGaN buffer layer can be 2.2 mu m.
S03: depositing an improvement layer 3 on the buffer layer 2;
the improvement layer 3 comprises a first sub-layer 31, a second sub-layer 32 and a third sub-layer 33;
the first sub-layer 31 is an element doped GaN layer and Ga sequentially deposited on the buffer layer 2 O 3 A layer; the second sub-layer 32 is a periodically and alternately grown P-AlGaN layer and AlGaO layer deposited on the first sub-layer 31 3 A layer; the third sub-layer 33 is depositedAn n-AlGaN layer on the second sub-layer 32;
the doping element in the element doped GaN layer of the first sub-layer 31 may be carbon, iron or zinc, and as an example of the present application, the doping element may be carbon with a carbon doping concentration of 1×10 18 cm -3 -1×10 19 cm -3 The carbon doping concentration of the carbon doped GaN layer includes, but is not limited to, 1×10 18 cm -3 、2×10 18 cm -3 、4×10 18 cm -3 、6×10 18 cm -3 、8×10 18 cm -3 ,1×10 19 cm -3 ;
Specifically, the first sub-layer 31 is deposited by first depositing a carbon doped GaN layer on the buffer layer 2, and introducing NH into the reaction chamber 3 Providing N (nitrogen) source required by growth, introducing TMGa (trimethyl gallium) to provide Ga (gallium) source, wherein the temperature of a reaction cavity is 800-1200 ℃, the pressure of the reaction cavity can be 150-250torr, and the carbon doping can introduce deep level electron traps, reduce electrons injected into a buffer layer 2, improve the resistance of the buffer layer 2, thereby improving the resistance of the transition layer and reducing the leakage current of the buffer layer 2, but the excessive carbon doping can lead to the problems of reduced device crystal quality, reduced device output current, current collapse effect and the like, so the carbon doping concentration of the preferred grown carbon doped GaN layer is 1 multiplied by 10 18 cm -3 -1×10 19 cm -3 The thickness of the single layer is 200-1500nm, and it is to be noted that TMGa (trimethylgallium) is used as a carbon impurity attached to a Ga (gallium) source, so that the carbon doped GaN layer is easier to prepare;
further deposition of Ga on carbon-doped GaN layers 2 O 3 A layer, wherein the pressure of the reaction cavity is 50-200torr, and NH is stopped being introduced 3 Switching to oxygen gas supply O (oxygen) source, and TMGa (trimethylgallium) supply Ga (gallium) source to grow Ga with single layer thickness of 100-1000nm 2 O 3 Layer, it is Ga 2 O 3 The crystal lattice mismatch with GaN is only 2.8%, so that a good transition effect can be achieved, the crystal lattice mismatch between the carbon doped GaN layer and the second sub-layer 32 is relieved, and the crystal quality of the second sub-layer 32 is improved;
the P-type dopant in the P-AlGaN layer of the second sub-layer 32 may be Mg, zn, and as an example of the present application, the P-type dopant may be Mg with a Mg doping concentration of 1×10 16 cm -3 -1×10 17 cm -3 The P-AlGaN layer Mg doping concentration includes, but is not limited to, 1×10 16 cm -3 、2×10 16 cm -3 、4×10 16 cm -3 、6×10 16 cm -3 、8×10 16 cm -3 ,1×10 17 cm -3 ;
The P-AlGaN layer and AlGaO of the second sub-layer 32 3 The Al composition of the layer may be 0.2 to 0.5, and as an example of the present application, the Al composition of the P-AlGaN layer may be 0.25, alGaO 3 The Al component of the layer can be 0.35;
the second sub-layer 32 includes a P-AlGaN layer and AlGaO layer 3 The value of the layer alternate growth period ranges from 2 to 6, and as one example of the application, the P-AlGaN layer and AlGaO layer 3 The layer alternate growth period may be 4;
specifically, the second sub-layer 32 is deposited by introducing NH into the reaction chamber 3 Providing N (nitrogen) source required by growth, introducing TMGa (trimethyl gallium) to provide Ga (gallium) source, introducing TMAL (trimethyl aluminum) to provide Al (aluminum) source, wherein the temperature of a reaction cavity is 900-1200 ℃, the pressure of the reaction cavity can be 150-250torr, it is required that an Mg doped P-AlGaN layer can consume electrons migrating to a buffer layer 2, the leakage current of the buffer layer 2 is reduced, but too high Mg doping can enable a channel layer with hole permeation to reduce the two-dimensional electron gas concentration of the channel layer, so that the Mg doping concentration of the P-AlGaN layer grown by the application is 1 multiplied by 10 16 cm -3 -1×10 17 cm -3 The thickness of the single layer is 50 nm-500 nm, the Al component is 0.25, and AlGaO is further deposited on the Mg doped P-AlGaN layer 3 The layer, the pressure of the reaction cavity can be 50-200torr, and NH is stopped to be introduced 3 And switching to oxygen gas supply O (oxygen) source to grow AlGaO with single layer thickness of 20-200 nm 3 The Al composition of the layer was 0.35, and the above growth steps were alternately repeated so that the grown second sub-layer 32 was 4 periodically and alternately grown P-AlGaN layers and AlGaO 3 A layer; the second is thatWhen the Al component of the sub-layer 32 is too high, larger lattice mismatch is generated between the sub-layer 32 and the carbon doped GaN layer and the GaN channel layer 4, which is unfavorable for preparing a high-crystal epitaxial layer, and the too high Al component can reduce the Mg doping efficiency of the P-AlGaN, while the too low Al component of the second sub-layer 32 has a reduced barrier height and limited capability of blocking the migration of electrons of the channel layer to the buffer layer 2, so that the Al component of the second sub-layer 32 of the application is 0.2-0.5, and the Al component of the P-AlGaN layer with Mg doping is 0.25, which is further preferred 3 The Al component of the layer was 0.35;
the n-type dopant in the n-AlGaN layer of the third sub-layer 33 may be Si, ge, and as an example of the present application, the n-type dopant may be Si with a Si doping concentration of 1×10 14 cm -3 -1×10 15 cm -3 The n-AlGaN layer Si doping concentration includes, but is not limited to, 1×10 14 cm -3 、2×10 14 cm -3 、4×10 14 cm -3 、6×10 14 cm -3 、8×10 14 cm -3 ,1×10 15 cm -3 ;
Specifically, the third sub-layer 33 is deposited by introducing NH into the reaction chamber 3 Providing N (nitrogen) source required by growth, introducing TMGa (trimethylgallium) to provide Ga (gallium) source, introducing TMAL (trimethylaluminum) to provide Al (aluminum) source, wherein the temperature of the reaction cavity is 900-1200 ℃, the pressure of the reaction cavity can be 150-250torr, and the Si doping concentration of the grown N-AlGaN layer is 6 multiplied by 10 14 cm -3 The thickness of the monolayer is 100 nm-1000 nm, and the Al component can be reduced from 0.2 to 0.
S04: a GaN channel layer 4 is deposited on the improvement layer 3.
As an example of the present application, the GaN channel layer 4 may be deposited by a process in which the temperature of the reaction chamber may be 700-1100 ℃, the pressure of the reaction chamber may be 50-200torr, and the N (nitrogen) source may be NH 3 The Ga (gallium) source may be TMGa, and the growth thickness may be 100nm to 250nm, and specifically, as an example of the present application, the GaN channel layer 4 may be 175nm thick.
S05: depositing an AlN insertion layer 5 on the GaN channel layer 4;
as an example of the present application, N (nitrogen) The source may be NH 3 The Al (aluminum) source can be TMGa, the specific deposition process of the AlN inserting layer 5 is that the temperature of a reaction cavity can be 650-1000 ℃, the pressure of the reaction cavity can be 50-150 torr, the growth thickness can be 2 nm-5 nm, and the thickness of the specific AlN inserting layer 5 can be 2.5nm.
S06: depositing a barrier layer 6 on the AlN insertion layer 5;
as an example of the present application, the barrier layer 6 may be an AlGaN barrier layer, the N (nitrogen) source may be NH, the Al (aluminum) source may be TMAl, the Ga (gallium) source may be TMGa, the reaction chamber temperature may be 900 ℃ to 1200 ℃, the reaction chamber pressure may be 100 torr to 250torr, the AlGaN barrier layer growth thickness may be 10nm nm to 40nm, and the specific AlGaN barrier layer thickness may be 22nm.
S07: depositing a cap layer 7 on the barrier layer 6;
the cap layer 7 is GaN cap layer, and the N (nitrogen) source can be NH 3 The Ga (gallium) source can be TEGa, the temperature of the reaction cavity can be 700-1100 ℃, the pressure of the reaction cavity can be 100-200 torr, the growth thickness can be 5-nm-50 nm, and the thickness of a specific GaN cap layer can be 30nm.
In summary, according to the epitaxial structure and the preparation method of the GaN-based transistor in the above embodiment of the present application, the element doped GaN layer of the first sub-layer 31 can introduce deep level electron traps, reduce electrons injected into the buffer layer 2, increase the resistance of the buffer layer 2, and the P-AlGaN layer in the periodic structure of the second sub-layer 32 can deplete electrons migrating to the buffer layer 2, while Ga 2 O 3 The lattice mismatch with GaN is only 2.8%, and the dislocation generated by lattice mismatch between GaN and Ga is less 2 O 3 、AlGaO 3 The barrier width is wider than GaN or AlGaN, so Ga of the first sub-layer 31 2 O 3 AlGaO of layer and second sub-layer 32 3 Can greatly block the electron migration of the channel layer to the buffer layer 2, thereby reducing the leakage current of the buffer layer 2, and the P-AlGaN layer and AlGaO alternately grown in the second sub-layer 32 3 Layer(s) , Aims at preventing holes of a P-AlGaN layer from migrating to a channel layer while blocking dislocation from extending to the surface of the channel layer and even an epitaxial layer, resulting in a decrease in the two-dimensional electron concentration of the channel layerThe third sub-layer 33 (n-AlGaN layer) can deplete holes permeated from the P-AlGaN layer in the second sub-layer 32 to the channel layer, further reduce the quantity of holes entering the channel layer, ensure the high two-dimensional electron concentration of the channel layer, gradually reduce the Al component of the n-AlGaN sub-layer, and relieve the lattice mismatch between the second sub-layer 32 and the channel layer, thereby preparing a high-quality channel layer and improving the performance of the device;
furthermore, the application can effectively improve the two-dimensional electron gas concentration of the channel layer, reduce the leakage current of the buffer layer 2, improve the breakdown voltage of the device and improve the output capability of the device.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing examples illustrate only a few embodiments of the application and are described in detail herein without thereby limiting the scope of the application. It should be noted that it is possible for a person skilled in the art to make several variations and modifications without departing from the inventive concept, which are all within the scope of protection of the present application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.
Claims (9)
1. The epitaxial structure of the gallium nitride-based transistor is characterized by comprising a substrate, a buffer layer, an improvement layer and a semiconductor layer, wherein the buffer layer, the improvement layer and the semiconductor layer are sequentially deposited on the substrate, and the semiconductor layer comprises a GaN channel layer, an AlN insertion layer, a barrier layer and a cap layer which are sequentially deposited;
the improvement layer comprises sequentially depositing on a first sub-layer on the buffer layer,A second sub-layer and a third sub-layer; the first sub-layer comprises an element doped GaN layer and Ga deposited on the element doped GaN layer 2 O 3 A second sub-layer comprising periodically and alternately grown P-AlGaN layers and AlGaO layers 3 The third sub-layer is an n-AlGaN layer, wherein the element doped GaN layer is any one of a carbon doped GaN layer, an iron doped GaN layer and a zinc doped GaN layer.
2. Epitaxial structure of gallium nitride-based transistor according to claim 1, characterized in that the thickness of the element doped GaN layer is in the range of 200 nm-1500 nm, the Ga 2 O 3 The thickness of the layer is in the range of 100 nm-1000 nm, the thickness of the P-AlGaN layer is in the range of 50 nm-500 nm, the AlGaO 3 The thickness of the layer ranges from 20nm to 200nm, and the thickness of the n-AlGaN layer ranges from 100nm to 1000nm.
3. The epitaxial structure of a gallium nitride-based transistor according to claim 1, wherein the Al composition in the P-AlGaN layer is in the range of 0.2 to 0.5, and the AlGaO 3 The Al component in the layer ranges from 0.2 to 0.5, the Al component in the n-AlGaN layer ranges from 0to 0.2, and the Al component in the n-AlGaN layer gradually decreases along the growth direction of the n-AlGaN layer.
4. An epitaxial structure of a gallium nitride-based transistor according to claim 1, wherein the buffer layer has a thickness ranging from 1.2 μm to 2.8 μm, the GaN channel layer has a thickness ranging from 100nm to 250nm, the AlN insertion layer has a thickness ranging from 2nm to 5nm, the barrier layer has a thickness ranging from 10nm to 40nm, and the cap layer has a thickness ranging from 5nm to 50nm.
5. Epitaxial structure of gallium nitride-based transistor according to claim 1, characterized in that the P-AlGaN layer and AlGaO 3 The value range of the layer alternate growth period is 2-6.
6. A method of preparing an epitaxial structure of a gallium nitride-based transistor according to any one of claims 1 to 5, comprising the steps of:
providing a substrate;
depositing a buffer layer on the substrate;
depositing an improvement layer on the buffer layer, wherein the improvement layer comprises a first sub-layer, a second sub-layer and a third sub-layer; the first sub-layer comprises an element doped GaN layer and Ga deposited on the element doped GaN layer 2 O 3 A second sub-layer comprising periodically and alternately grown P-AlGaN layers and AlGaO layers 3 The third sub-layer is an n-AlGaN layer, wherein the element doped GaN layer is any one of a carbon doped GaN layer, an iron doped GaN layer and a zinc doped GaN layer;
depositing a GaN channel layer on the improvement layer, depositing an AlN insertion layer on the GaN channel layer, depositing a barrier layer on the AlN insertion layer, and depositing a cap layer on the barrier layer.
7. The method of claim 6, wherein the P-AlGaN layer P-type dopant is magnesium or zinc and the n-AlGaN layer n-type dopant is silicon or germanium.
8. The method of manufacturing an epitaxial structure of a gallium nitride-based transistor according to claim 7, wherein the carbon doping concentration in the carbon-doped GaN layer is in a range of 1 x 10 18 cm -3 -1×10 19 cm -3 The doping concentration range of the P-AlGaN layer P-type dopant magnesium is 1 multiplied by 10 16 cm -3 -1×10 17 cm -3 The doping concentration of the n-type dopant silicon in the n-AlGaN layer ranges from 1X 10 14 cm -3 -1×10 15 cm -3 。
9. The method of manufacturing an epitaxial structure of a GaN-based transistor of claim 6, wherein the temperature of the reaction chamber of the element doped GaN layer is 800 ℃ to 1200 ℃, the pressure of the reaction chamber of the element doped GaN layer is 150torr to 250torr, and the Ga is 2 O 3 The pressure of the layer reaction cavity ranges from 50torr to 200torr.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202311188656.6A CN116936631B (en) | 2023-09-15 | 2023-09-15 | Epitaxial structure of gallium nitride-based transistor and preparation method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202311188656.6A CN116936631B (en) | 2023-09-15 | 2023-09-15 | Epitaxial structure of gallium nitride-based transistor and preparation method |
Publications (2)
Publication Number | Publication Date |
---|---|
CN116936631A CN116936631A (en) | 2023-10-24 |
CN116936631B true CN116936631B (en) | 2023-12-12 |
Family
ID=88377436
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202311188656.6A Active CN116936631B (en) | 2023-09-15 | 2023-09-15 | Epitaxial structure of gallium nitride-based transistor and preparation method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN116936631B (en) |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007042928A (en) * | 2005-08-04 | 2007-02-15 | National Institute For Materials Science | Light emitting device |
KR20160031751A (en) * | 2014-09-15 | 2016-03-23 | 주식회사 유제이엘 | Semiconductor device |
CN110504343A (en) * | 2018-05-18 | 2019-11-26 | 中国科学院苏州纳米技术与纳米仿生研究所 | Gallium oxide film and its growing method and application based on Sapphire Substrate |
CN110534557A (en) * | 2019-07-30 | 2019-12-03 | 中国科学技术大学 | Normally-off field effect transistor and preparation method thereof |
CN115842042A (en) * | 2023-02-20 | 2023-03-24 | 江苏能华微电子科技发展有限公司 | Epitaxial layer structure and preparation method and application thereof |
CN116314278A (en) * | 2023-05-22 | 2023-06-23 | 江西兆驰半导体有限公司 | High electron mobility transistor epitaxial structure, preparation method and HEMT device |
CN116682910A (en) * | 2023-08-04 | 2023-09-01 | 湖北九峰山实验室 | Gallium nitride epitaxial wafer structure and preparation method thereof |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11624126B2 (en) * | 2020-06-16 | 2023-04-11 | Ohio State Innovation Foundation | Deposition of single phase beta-(AlxGa1-x)2O3 thin films with 0.28< =x<=0.7 on beta Ga2O3(100) or (−201) substrates by chemical vapor deposition |
-
2023
- 2023-09-15 CN CN202311188656.6A patent/CN116936631B/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007042928A (en) * | 2005-08-04 | 2007-02-15 | National Institute For Materials Science | Light emitting device |
KR20160031751A (en) * | 2014-09-15 | 2016-03-23 | 주식회사 유제이엘 | Semiconductor device |
CN110504343A (en) * | 2018-05-18 | 2019-11-26 | 中国科学院苏州纳米技术与纳米仿生研究所 | Gallium oxide film and its growing method and application based on Sapphire Substrate |
CN110534557A (en) * | 2019-07-30 | 2019-12-03 | 中国科学技术大学 | Normally-off field effect transistor and preparation method thereof |
CN115842042A (en) * | 2023-02-20 | 2023-03-24 | 江苏能华微电子科技发展有限公司 | Epitaxial layer structure and preparation method and application thereof |
CN116314278A (en) * | 2023-05-22 | 2023-06-23 | 江西兆驰半导体有限公司 | High electron mobility transistor epitaxial structure, preparation method and HEMT device |
CN116682910A (en) * | 2023-08-04 | 2023-09-01 | 湖北九峰山实验室 | Gallium nitride epitaxial wafer structure and preparation method thereof |
Also Published As
Publication number | Publication date |
---|---|
CN116936631A (en) | 2023-10-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN112701160B (en) | Gallium nitride-based high-electron-mobility transistor epitaxial wafer and preparation method thereof | |
CN104810442B (en) | A kind of LED epitaxial slice and its growing method | |
CN114975704B (en) | LED epitaxial wafer and preparation method thereof | |
CN112216742B (en) | Gallium nitride-based high-electron-mobility transistor epitaxial wafer and preparation method thereof | |
CN108447952B (en) | Light emitting diode epitaxial wafer and preparation method thereof | |
CN116053369A (en) | Light-emitting diode epitaxial wafer and preparation method thereof | |
CN117012809B (en) | Gallium nitride-based high electron mobility transistor epitaxial wafer and preparation method thereof, HEMT | |
CN115224171A (en) | High-luminous-efficiency light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode | |
CN116960173B (en) | High electron mobility transistor epitaxial structure, preparation method and HEMT device | |
CN114927601B (en) | Light emitting diode and preparation method thereof | |
CN115101585A (en) | Gallium nitride-based high electron mobility transistor and preparation method thereof | |
CN115911201A (en) | Light emitting diode epitaxial wafer, preparation method thereof and light emitting diode | |
CN116565003A (en) | Epitaxial wafer, preparation method thereof and high-electron-mobility transistor | |
CN115295693A (en) | Light emitting diode epitaxial wafer and preparation method thereof | |
CN117276440A (en) | LED epitaxial wafer, preparation method thereof and LED | |
CN117423787B (en) | Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode | |
CN116960248B (en) | Light-emitting diode epitaxial wafer and preparation method thereof | |
CN107658374B (en) | Epitaxial wafer of light emitting diode and preparation method thereof | |
CN116314510B (en) | Composite undoped AlGaN layer, preparation method, epitaxial wafer and LED | |
CN116344684B (en) | Light-emitting diode preparation method and diode | |
CN110429128B (en) | Low-barrier multi-quantum-well high-resistance buffer layer epitaxial structure and preparation method thereof | |
CN116741822A (en) | High electron mobility transistor epitaxial structure, preparation method and HEMT device | |
CN103872204A (en) | P (Positive) type insert layer with cycle structure and growing method | |
CN114914296B (en) | Epitaxial wafer, preparation method of epitaxial wafer and high-electron-mobility transistor | |
CN116936631B (en) | Epitaxial structure of gallium nitride-based transistor and preparation method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |