CN117276440A - LED epitaxial wafer, preparation method thereof and LED - Google Patents

LED epitaxial wafer, preparation method thereof and LED Download PDF

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Publication number
CN117276440A
CN117276440A CN202311259995.9A CN202311259995A CN117276440A CN 117276440 A CN117276440 A CN 117276440A CN 202311259995 A CN202311259995 A CN 202311259995A CN 117276440 A CN117276440 A CN 117276440A
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layer
nitride layer
doped
polar
gallium
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侯合林
谢志文
张铭信
陈铭胜
文国昇
金从龙
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Jiangxi Zhao Chi Semiconductor Co Ltd
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Jiangxi Zhao Chi Semiconductor Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
    • H01L33/325Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen characterised by the doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure

Abstract

The invention discloses a light-emitting diode epitaxial wafer, a preparation method thereof and an LED, wherein the light-emitting diode epitaxial wafer comprises a substrate, and a buffer layer, an undoped gallium nitride layer, an N-type gallium nitride layer, an active layer and a P-type nitride layer are sequentially arranged on the substrate; the active layer comprises a potential well layer and a barrier layer which are periodically and alternately arranged, the barrier layer comprises an Mg-doped nitrogen polar nitride layer, an AlInN layer and an Si-doped gallium polar nitride layer which are sequentially stacked, and the forbidden band width of the AlInN layer is larger than that of the Mg-doped nitrogen polar nitride layer and the Si-doped gallium polar nitride layer. The light-emitting diode epitaxial wafer provided by the invention can improve the binding capacity of an active layer to electrons, reduce electron leakage, improve the injection efficiency of holes into the active layer, improve the concentration of electrons and holes in a potential well layer and improve the luminous efficiency.

Description

LED epitaxial wafer, preparation method thereof and LED
Technical Field
The invention relates to the technical field of photoelectricity, in particular to a light-emitting diode epitaxial wafer, a preparation method thereof and an LED.
Background
The conventional light-emitting diode has weaker electron binding capacity, so that electrons overflow to a P-type nitride layer, non-radiative recombination is caused, the luminous efficiency is reduced, meanwhile, the electric leakage of the device is caused, the reliability is reduced and the like.
Disclosure of Invention
The invention aims to solve the technical problem of providing a light-emitting diode epitaxial wafer, which can improve the binding capacity of an active layer to electrons, reduce electron leakage, improve the injection efficiency of holes into the active layer, improve the concentration of electrons and holes in a potential well layer and improve the luminous efficiency.
The invention also aims to provide a preparation method of the light-emitting diode epitaxial wafer, which has simple process and can stably prepare the light-emitting diode epitaxial wafer with good luminous efficiency.
In order to solve the technical problems, the invention provides a light-emitting diode epitaxial wafer, which comprises a substrate, wherein a buffer layer, an undoped gallium nitride layer, an N-type gallium nitride layer, an active layer and a P-type nitride layer are sequentially arranged on the substrate;
the active layer comprises a potential well layer and a barrier layer which are periodically and alternately arranged, the barrier layer comprises an Mg-doped nitrogen polar nitride layer, an AlInN layer and an Si-doped gallium polar nitride layer which are sequentially stacked, and the forbidden band width of the AlInN layer is larger than that of the Mg-doped nitrogen polar nitride layer and the Si-doped gallium polar nitride layer.
In one embodiment, the Mg-doped nitrogen-polarity nitride layer is one or more combinations of a Mg-doped nitrogen-polarity AlGaN layer, a Mg-doped nitrogen-polarity GaN layer, and a Mg-doped nitrogen-polarity InGaN layer;
the thickness of the Mg-doped nitrogen polar nitride layer is 3 nm-12 nm;
the Mg doping concentration of the Mg-doped nitrogen polar nitride layer is 1 multiplied by 10 16 atoms/cm 3 ~1×10 17 atoms/cm 3
In one embodiment, the Mg-doped nitrogen-polarity nitride layer is a Mg-doped nitrogen-polarity InGaN layer, and an In composition In the Mg-doped nitrogen-polarity InGaN layer gradually decreases In a growth direction.
In one embodiment, the AlInN layer has a thickness of 1nm to 6nm;
the Al component of the AlInN layer is 0.8-0.9.
In one embodiment, the Si-doped gallium-polar nitride layer is one or more combinations of a Si-doped gallium-polar AlGaN layer, a Si-doped gallium-polar GaN layer, and a Si-doped gallium-polar InGaN layer;
the thickness of the Si doped gallium polar nitride layer is 3 nm-12 nm;
the Si doping concentration of the Si doped gallium polar nitride layer is 1 multiplied by 10 17 atoms/cm 3 ~1×10 18 atoms/cm 3
In one embodiment, the Si-doped gallium-polar nitride layer is a Si-doped gallium-polar InGaN layer, and the In composition In the Si-doped gallium-polar InGaN layer gradually increases along the growth direction.
In order to solve the problems, the invention also provides a preparation method of the light-emitting diode epitaxial wafer, which comprises the following steps:
s1, preparing a substrate;
s2, sequentially depositing a buffer layer, an undoped gallium nitride layer, an N-type gallium nitride layer, an active layer and a P-type nitride layer on the substrate;
the active layer comprises a potential well layer and a barrier layer which are periodically and alternately arranged, the barrier layer comprises an Mg-doped nitrogen polar nitride layer, an AlInN layer and an Si-doped gallium polar nitride layer which are sequentially stacked, and the forbidden band width of the AlInN layer is larger than that of the Mg-doped nitrogen polar nitride layer and the Si-doped gallium polar nitride layer.
In one embodiment, the Mg doped nitrogen polar nitride layer is made using the following method:
and controlling the temperature of the reaction chamber at 850-950 ℃ and the pressure at 150-250 torr, introducing source materials, wherein the source materials comprise an N source and a Ga source, and growing the Mg-doped nitrogen polar nitride layer by keeping the ratio of the flow of the N source to the flow of the Ga source introduced into the reaction chamber to be more than 1400.
In one embodiment, the Si-doped gallium-polar nitride layer is made using the following method:
and controlling the temperature of the reaction chamber at 850-950 ℃ and the pressure at 150-250 torr, and introducing source materials, wherein the source materials comprise an N source and a Ga source, and the ratio of the flow of the N source to the flow of the Ga source introduced into the reaction chamber is kept to be less than 300, so as to grow the Si-doped gallium polar nitride layer.
Correspondingly, the invention further provides an LED, and the LED comprises the LED epitaxial wafer.
The implementation of the invention has the following beneficial effects:
the light-emitting diode epitaxial wafer provided by the invention is provided with an active layer with a specific structure, wherein the active layer comprises a potential well layer and a barrier layer which are periodically and alternately arranged, the barrier layer comprises an Mg-doped nitrogen-polarity nitride layer, an AlInN layer and an Si-doped gallium-polarity nitride layer which are sequentially stacked, and the forbidden band width of the AlInN layer is larger than that of the Mg-doped nitrogen-polarity nitride layer and the Si-doped gallium-polarity nitride layer.
The Mg doped nitrogen polar nitride layer can solve the problem that a large number of nitrogen vacancies appear in the nitride layer along with the increase of the Mg doping concentration, reduce the probability that the acceptor doping concentration of the nitride layer is compensated by the nitrogen vacancies under the high Mg doping concentration, improve the Mg doping efficiency, and further improve the luminous efficiency because the lattice constant of the barrier layer is smaller than that of the potential well layer, the barrier layer is subjected to the tensile stress of the potential well layer, and the nitrogen polar nitride layer generates a polarized electric field pointing to the N type nitride layer along the P type nitride layer.
Compared with the Mg-doped nitrogen polar nitride layer and the Si-doped gallium polar nitride layer, the AlInN layer has a larger forbidden bandwidth, can effectively block electron overflow, enhance the binding capacity of an active layer on electrons, improve the electron concentration of a potential well layer, reduce the leakage current of a device and improve the performance of the device. And the Al and In components of the AlInN layer are regulated and controlled to enable the AlInN layer and the Mg-doped nitrogen polar nitride layer to have higher lattice matching degree, so that the defect density increase In the barrier layer can be reduced, and the overall crystal quality of the active layer is improved.
The Si doped gallium polar nitride layer can fill up the flat surfaces of the Mg doped nitrogen polar nitride layer and the AlInN layer which are not grown due to defects, dislocation defects are reduced to extend to the potential well layer, the crystal quality of the active layer is improved, and the electron concentration of the active layer can be improved by introducing Si doping, so that the luminous efficiency is improved.
Drawings
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to the present invention;
fig. 2 is a flowchart of a method for preparing an led epitaxial wafer according to the present invention;
fig. 3 is a flowchart of step S2 of the method for manufacturing a light emitting diode epitaxial wafer according to the present invention.
Detailed Description
The present invention will be described in further detail below in order to make the objects, technical solutions and advantages of the present invention more apparent.
Unless otherwise indicated or contradicted, terms or phrases used herein have the following meanings:
in the present invention, "preferred" is merely to describe embodiments or examples that are more effective, and it should be understood that they are not intended to limit the scope of the present invention.
In the invention, the technical characteristics described in an open mode comprise a closed technical scheme composed of the listed characteristics and also comprise an open technical scheme comprising the listed characteristics.
In the present invention, the numerical range is referred to, and both ends of the numerical range are included unless otherwise specified.
In order to solve the above problems, the present invention provides a light emitting diode epitaxial wafer, as shown in fig. 1, comprising a substrate 1, wherein a buffer layer 2, an undoped gallium nitride layer 3, an n-type gallium nitride layer 4, an active layer 5, and a P-type nitride layer 6 are sequentially disposed on the substrate 1;
the active layer 5 includes a potential well layer 51 and a barrier layer 52 which are periodically and alternately arranged, the barrier layer 52 includes a Mg-doped nitrogen-polarity nitride layer 521, an AlInN layer 522, and a Si-doped gallium-polarity nitride layer 523 which are sequentially stacked, and a forbidden band width of the AlInN layer 522 is larger than those of the Mg-doped nitrogen-polarity nitride layer 521 and the Si-doped gallium-polarity nitride layer 523.
The specific structure of the active layer 5 is as follows:
in one embodiment, the active layer 5 includes potential well layers and barrier layers alternately arranged periodically, the alternating period being 6-12; the potential well layer is an InGaN layer.
In one embodiment, the Mg-doped nitrogen-polarity nitride layer 521 is one or more combinations of a Mg-doped nitrogen-polarity AlGaN layer, a Mg-doped nitrogen-polarity GaN layer, and a Mg-doped nitrogen-polarity InGaN layer; the thickness of the Mg-doped nitrogen polar nitride layer 521 is 3 nm-12 nm; exemplary thicknesses of the Mg doped nitrogen polar nitride layer 521 are 4nm, 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, 11nm, but are not limited thereto. In one embodiment, the Mg doping concentration of the Mg doped nitrogen polar nitride layer 521 is 1×10 16 atoms/cm 3 ~1×10 17 atoms/cm 3 Preferably, the Mg doping concentration of the Mg doped nitrogen polar nitride layer 521 is 2×10 16 atoms/cm 3 ~9×10 16 atoms/cm 3 . The Mg-doped nitrogen-polarity nitride layer can solve the problem that a large number of nitrogen vacancies are generated in the nitride layer along with the increase of the Mg doping concentration, reduce the probability that the acceptor doping concentration of the nitride layer is compensated by the nitrogen vacancies under the condition of high Mg doping concentration, improve the Mg doping efficiency, and because the lattice constant of the barrier layer is smaller than that of the potential well layer, the barrier layer is subjected to the potential wellThe layer tensile stress, the nitrogen polar nitride layer generates a polarized electric field pointing to the N type nitride layer along the P type nitride layer, so that the efficiency of injecting holes into the potential well layer is improved, the hole concentration of the potential well layer is improved, and the luminous efficiency is further improved.
Preferably, the Mg-doped nitrogen-polarity nitride layer 521 is a Mg-doped nitrogen-polarity InGaN layer, and the In composition In the Mg-doped nitrogen-polarity InGaN layer gradually decreases along the growth direction. The lattice constant of the barrier layer is smaller than that of the potential well layer, the In component of the Mg-doped nitrogen-polarity InGaN layer contacted with the potential well layer is gradually reduced along the growth direction, so that the lattice constant of the Mg-doped nitrogen-polarity InGaN layer is gradually reduced, the lattice constant of the Mg-doped nitrogen-polarity InGaN layer is changed from the lattice constant close to the InGaN potential well layer to the lattice constant close to GaN, the lattice mismatch between the barrier layer and the potential well layer is relieved, the defect density of the barrier layer is reduced, and the crystal quality of the barrier layer is improved.
In one embodiment, the AlInN layer 522 has a thickness of 1nm to 6nm; exemplary thicknesses of the AlInN layer 522 are 2nm, 3nm, 4nm, 5nm, but are not limited thereto. In the invention, compared with the Mg-doped nitrogen polar nitride layer and the Si-doped gallium polar nitride layer, the AlInN layer has larger forbidden bandwidth, can effectively block electron overflow, enhance the binding capacity of an active layer on electrons, improve the electron concentration of a potential well layer, reduce the leakage current of a device and improve the performance of the device. In one embodiment, the Al component of the AlInN layer 522 is 0.8 to 0.9. By regulating and controlling Al and In components of the AlInN layer, lattice mismatch between AlInN and GaN is less than or equal to 1.2%, and the AlInN layer and the Mg-doped nitrogen polar nitride layer have higher lattice matching degree, so that defect density increase In the barrier layer can be reduced, and the overall crystal quality of the active layer is improved.
In one embodiment, the Si-doped gallium-polar nitride layer 523 is one or more combinations of Si-doped gallium-polar AlGaN layer, si-doped gallium-polar GaN layer, and Si-doped gallium-polar InGaN layer; the thickness of the Si doped gallium polar nitride layer 523 is 3nm to 12nm; exemplary thicknesses of the Si-doped gallium polar nitride layer 523 are 4nm, 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, 11nm, but are not limited thereto. In one embodiment, the Si-doped gallium-doped polar nitride layer 523 is Si-doped denseDegree of 1×10 17 atoms/cm 3 ~1×10 18 atoms/cm 3 The method comprises the steps of carrying out a first treatment on the surface of the Preferably, the Si doping concentration of the Si doped gallium polar nitride layer 523 is 2×10 17 atoms/cm 3 ~9×10 17 atoms/cm 3 . The Si doped gallium polar nitride layer can fill up the flat surfaces of the Mg doped nitrogen polar nitride layer and the AlInN layer which are not grown due to defects, dislocation defects are reduced to extend to the potential well layer, the crystal quality of the active layer is improved, and the electron concentration of the active layer can be improved by introducing Si doping, so that the luminous efficiency is improved.
Preferably, the Si-doped gallium-polar nitride layer 523 is a Si-doped gallium-polar InGaN layer, and an In component In the Si-doped gallium-polar InGaN layer gradually increases along a growth direction, so that lattice mismatch between the barrier layer and the potential well layer can be relieved, defect density of the barrier layer is reduced, and crystal quality of the barrier layer is improved.
Correspondingly, the invention provides a preparation method of the light-emitting diode epitaxial wafer, as shown in fig. 2, comprising the following steps:
s1, preparing a substrate 1;
in one embodiment, the substrate can be sapphire substrate or SiO 2 One of a sapphire composite substrate, a silicon carbide substrate, a gallium nitride substrate and a zinc oxide substrate. Preferably, the substrate is a sapphire substrate.
S2, sequentially depositing a buffer layer 2, an undoped gallium nitride layer 3, an N-type gallium nitride layer 4, an active layer 5 and a P-type nitride layer 6 on the substrate 1;
as shown in fig. 3, step S2 includes the steps of:
s21, depositing a buffer layer 2 on the substrate 1.
In one embodiment, the temperature of the reaction chamber is controlled at 750-820 ℃, the pressure is controlled at 100-200 torr, an N source, an Al source and a Ga source are introduced to grow an AlGaN buffer layer with the thickness of 0.5-3 nm, and then an N source and a Ga source are introduced to grow a GaN buffer layer with the thickness of 5-25 nm.
And S22, depositing an undoped gallium nitride layer 3 on the buffer layer 2.
In one embodiment, the temperature of the reaction chamber is controlled at 1050-1200 ℃, the pressure is controlled at 150-200 torr, an N source and a Ga source are introduced, and a GaN intrinsic layer with the thickness of 1-1.4 μm is grown;
s23, depositing an N-type gallium nitride layer 4 on the undoped gallium nitride layer 3.
In one embodiment, the temperature of the reaction chamber is controlled to 1040-1160 ℃, the pressure is controlled to 100-200 torr, an N source, a Ga source and a Si source are introduced, and an N-type GaN layer with a thickness of 1.1-1.8 μm is grown.
And S24, depositing an active layer 5 on the N-type gallium nitride layer 4.
In one embodiment, the active layer is made using the following method:
and alternately growing potential well layers and barrier layers of a plurality of periods, wherein the barrier layers comprise Mg doped nitrogen polar nitride layers, alInN layers and Si doped gallium polar nitride layers which are sequentially stacked.
Preferably, the Mg-doped nitrogen polar nitride layer is prepared by the following method:
controlling the temperature of the reaction chamber at 850-950 ℃ and the pressure at 150-250 torr, introducing source materials, wherein the source materials comprise an N source and a Ga source, and growing the Mg-doped nitrogen polar nitride layer by keeping the ratio of the flow of the N source to the flow of the Ga source introduced into the reaction chamber to be more than 1400;
the AlInN layer is prepared by the following method:
controlling the temperature of the reaction chamber at 850-950 ℃ and the pressure at 150-250 torr, and introducing an N source, an Al source and an In source to grow the AlInN layer;
the Si doped gallium polar nitride layer is prepared by the following method:
and controlling the temperature of the reaction chamber at 850-950 ℃ and the pressure at 150-250 torr, and introducing source materials, wherein the source materials comprise an N source and a Ga source, and the ratio of the flow of the N source to the flow of the Ga source introduced into the reaction chamber is kept to be less than 300, so as to grow the Si-doped gallium polar nitride layer.
S25, depositing a P-type nitride layer 6 on the active layer 5.
In one embodiment, the P-type nitride layer comprises a P-type electron blocking layer, a P-type filling layer and a Mg-doped gallium nitride layer which are deposited in sequence.
Preferably, the preparation method of the P-type electron blocking layer is as follows; the temperature of the reaction chamber is controlled between 950 ℃ and 980 ℃ and NH is controlled 3 As an N (nitrogen) source, TEGa as a Ga (gallium) source, TMAl as an Al source, TMIn as an In source, and controlling the thickness of the deposited P-type AlInGaN electron blocking layer to be 15nm to 25nm.
Preferably, the specific preparation process of the P-type filling layer comprises the following steps: the temperature of the reaction chamber is 950-1050 ℃, NH 3 As N (nitrogen) source, TEGa as Ga (gallium) source, and a large amount of H is introduced 2 The thickness of the deposited P-type undoped GaN filling layer is controlled to be 15-20 nm, so that the P-type undoped GaN filling layer can fill up V-shaped pits on the surface of the epitaxial layer.
Preferably, the specific process of the Mg doped gallium nitride layer is as follows: the temperature of the reaction chamber is 930 ℃ to 1000 ℃, NH 3 As an N (nitrogen) source, TEGa (triethylgallium) as a Ga (gallium) source, CP 2 Mg is used as a Mg source, and the thickness of the deposited Mg doped GaN layer is controlled to be 5 nm-15 nm, wherein the doping concentration of Mg can be 1 multiplied by 10 18 atoms/cm 3 ~1×10 20 atoms/cm 3
Correspondingly, the invention further provides an LED, and the LED comprises the LED epitaxial wafer. The photoelectric efficiency of the LED is effectively improved, and other items have good electrical properties.
The invention is further illustrated by the following examples:
example 1
The embodiment provides a light-emitting diode epitaxial wafer, which comprises a substrate, wherein a buffer layer, an undoped gallium nitride layer, an N-type gallium nitride layer, an active layer and a P-type nitride layer are sequentially arranged on the substrate;
the active layer comprises a potential well layer and a barrier layer which are periodically and alternately arranged, the barrier layer comprises an Mg-doped nitrogen-polarity InGaN layer, an Mg-doped nitrogen-polarity GaN layer, an AlInN layer, an Si-doped gallium-polarity GaN layer and an Si-doped gallium-polarity InGaN layer which are sequentially stacked, and the forbidden band width of the AlInN layer is larger than that of the Mg-doped nitrogen-polarity InGaN layer, the Mg-doped nitrogen-polarity GaN layer, the Si-doped gallium-polarity GaN layer and the Si-doped gallium-polarity InGaN layer;
the thickness of the Mg-doped nitrogen polarity InGaN layer is 0.5nm, and the Mg doping concentration is 5 multiplied by 10 16 atoms/cm 3 The In composition In the layer gradually decreases In the growth direction;
the thickness of the Mg-doped nitrogen polarity GaN layer is 3nm, and the Mg doping concentration is 5 multiplied by 10 16 atoms/cm 3
The thickness of the AlInN layer is 2nm;
the thickness of the Si doped gallium polar GaN layer is 3nm, and the Si doping concentration is 5 multiplied by 10 17 atoms/cm 3
The thickness of the Si doped gallium polar InGaN layer is 0.5nm, and the Si doping concentration is 5 multiplied by 10 16 atoms/cm 3 The In composition In the layer gradually increases In the growth direction.
Example 2
The embodiment provides a light-emitting diode epitaxial wafer, which comprises a substrate, wherein a buffer layer, an undoped gallium nitride layer, an N-type gallium nitride layer, an active layer and a P-type nitride layer are sequentially arranged on the substrate;
the active layer comprises a potential well layer and a barrier layer which are periodically and alternately arranged, the barrier layer comprises an Mg-doped nitrogen polar GaN layer, an AlInN layer and an Si-doped gallium polar GaN layer which are sequentially stacked, and the forbidden band width of the AlInN layer is larger than that of the Mg-doped nitrogen polar GaN layer and the Si-doped gallium polar GaN layer;
the thickness of the Mg-doped nitrogen polarity GaN layer is 3.5nm, and the Mg doping concentration is 5 multiplied by 10 16 atoms/cm 3
The thickness of the AlInN layer is 2nm;
the thickness of the Si doped gallium polar GaN layer is 3.5nm, and the Si doping concentration is 5 multiplied by 10 17 atoms/cm 3
Example 3
The embodiment provides a light-emitting diode epitaxial wafer, which comprises a substrate, wherein a buffer layer, an undoped gallium nitride layer, an N-type gallium nitride layer, an active layer and a P-type nitride layer are sequentially arranged on the substrate;
the active layer comprises a potential well layer and a barrier layer which are periodically and alternately arranged, the barrier layer comprises an Mg-doped nitrogen-polarity InGaN layer, an AlInN layer and an Si-doped gallium-polarity InGaN layer which are sequentially stacked, and the forbidden band width of the AlInN layer is larger than that of the Mg-doped nitrogen-polarity InGaN layer and the Si-doped gallium-polarity InGaN layer;
the thickness of the Mg-doped nitrogen polarity InGaN layer is 3.5nm, and the Mg doping concentration is 5 multiplied by 10 16 atoms/cm 3 The In composition In the layer gradually decreases In the growth direction;
the thickness of the AlInN layer is 2nm;
the thickness of the Si doped gallium polar InGaN layer is 3.5nm, and the Si doping concentration is 5 multiplied by 10 16 atoms/cm 3 The In composition In the layer gradually increases In the growth direction.
Comparative example 1
The comparative example provides a light-emitting diode epitaxial wafer, which comprises a substrate, wherein a buffer layer, an undoped gallium nitride layer, an N-type gallium nitride layer, an active layer and a P-type nitride layer are sequentially arranged on the substrate;
the active layer comprises a potential well layer and a barrier layer which are periodically and alternately arranged, wherein the barrier layer comprises an undoped nitrogen polarity InGaN layer, an undoped nitrogen polarity GaN layer, an AlInN layer, an undoped gallium polarity GaN layer and an undoped gallium polarity InGaN layer which are sequentially stacked;
the thickness of the undoped nitrogen polarity InGaN layer is 0.5nm, and the In component In the layer is gradually reduced along the growth direction;
the thickness of the undoped nitrogen polarity GaN layer is 3nm
The thickness of the AlInN layer is 2nm;
the thickness of the undoped gallium polar GaN layer is 3nm;
the thickness of the undoped gallium polar InGaN layer is 0.5nm, and the In component In the layer gradually rises along the growth direction.
Comparative example 2
The comparative example provides a light-emitting diode epitaxial wafer, which comprises a substrate, wherein a buffer layer, an undoped gallium nitride layer, an N-type gallium nitride layer, an active layer and a P-type nitride layer are sequentially arranged on the substrate;
the active layer comprises a potential well layer and a barrier layer which are periodically and alternately arranged, and the barrier layer comprises an Mg-doped gallium polar InGaN layer, an Mg-doped gallium polar GaN layer, an AlInN layer, an Si-doped gallium polar GaN layer and an Si-doped gallium polar InGaN layer which are sequentially stacked;
the thickness of the Mg-doped gallium-polarity InGaN layer is 0.5nm, and the Mg doping concentration is 5 multiplied by 10 16 atoms/cm 3 The In composition In the layer gradually decreases In the growth direction;
the thickness of the Mg-doped gallium-polarity GaN layer is 3nm, and the Mg doping concentration is 5 multiplied by 10 16 atoms/cm 3
The thickness of the AlInN layer is 2nm;
the thickness of the Si doped gallium polar GaN layer is 3nm, and the Si doping concentration is 5 multiplied by 10 17 atoms/cm 3
The thickness of the Si doped gallium polar InGaN layer is 0.5nm, and the Si doping concentration is 5×10 16 atoms/cm 3 The In composition In the layer gradually increases In the growth direction.
Comparative example 3
The comparative example provides a light-emitting diode epitaxial wafer, which comprises a substrate, wherein a buffer layer, an undoped gallium nitride layer, an N-type gallium nitride layer, an active layer and a P-type nitride layer are sequentially arranged on the substrate;
the active layer comprises a potential well layer and a barrier layer which are periodically and alternately arranged, and the barrier layer comprises an Mg-doped nitrogen-polarity InGaN layer, an Mg-doped nitrogen-polarity GaN layer, an Si-doped gallium-polarity GaN layer and an Si-doped gallium-polarity InGaN layer which are sequentially stacked;
the thickness of the Mg-doped nitrogen polarity InGaN layer is 0.5nm, and the Mg doping concentration is 5 multiplied by 10 16 atoms/cm 3 The In composition In the layer gradually decreases In the growth direction;
the thickness of the Mg-doped nitrogen polarity GaN layer is 3nm, and the Mg doping concentration is 5 multiplied by 10 16 atoms/cm 3
The thickness of the Si doped gallium polar GaN layer is 3nm, and the Si doping concentration is 5 multiplied by 10 17 atoms/cm 3
The thickness of the Si doped gallium polar InGaN layer is 0.5nm, and the Si doping concentration is 5 multiplied by 10 16 atoms/cm 3 The In composition In the layer gradually increases In the growth direction.
Comparative example 4
The comparative example provides a light-emitting diode epitaxial wafer, which comprises a substrate, wherein a buffer layer, an undoped gallium nitride layer, an N-type gallium nitride layer, an active layer and a P-type nitride layer are sequentially arranged on the substrate;
the active layer comprises potential well layers and barrier layers which are periodically and alternately arranged, and the barrier layers comprise AlGaN layers and/or GaN layers.
The light emitting diode epitaxial wafers prepared in examples 1 to 3 and comparative examples 1 to 4 were prepared into 10mil×24mil chips using the same chip process conditions, 300 LED chips were extracted, and tested at 120mA/60mA current, and the light emitting efficiency improvement rates of each example and comparative example were calculated with reference to comparative example 4, and the specific test results are shown in table 1.
TABLE 1 results of Performance test of LEDs from examples 1-3 and comparative examples 1-3
As can be seen from the above results, the light emitting diode epitaxial wafer provided by the invention has an active layer with a specific structure, wherein the active layer comprises a potential well layer and a barrier layer which are periodically and alternately arranged, the barrier layer comprises a Mg-doped nitrogen-polarity nitride layer, an AlInN layer and a Si-doped gallium-polarity nitride layer which are sequentially stacked, and the forbidden band width of the AlInN layer is larger than that of the Mg-doped nitrogen-polarity nitride layer and the Si-doped gallium-polarity nitride layer.
The Mg doped nitrogen polar nitride layer can solve the problem that a large number of nitrogen vacancies appear in the nitride layer along with the increase of the Mg doping concentration, reduce the probability that the acceptor doping concentration of the nitride layer is compensated by the nitrogen vacancies under the high Mg doping concentration, improve the Mg doping efficiency, and further improve the luminous efficiency because the lattice constant of the barrier layer is smaller than that of the potential well layer, the barrier layer is subjected to the tensile stress of the potential well layer, and the nitrogen polar nitride layer generates a polarized electric field pointing to the N type nitride layer along the P type nitride layer.
Compared with the Mg-doped nitrogen polar nitride layer and the Si-doped gallium polar nitride layer, the AlInN layer has a larger forbidden bandwidth, can effectively block electron overflow, enhance the binding capacity of an active layer on electrons, improve the electron concentration of a potential well layer, reduce the leakage current of a device and improve the performance of the device. And the Al and In components of the AlInN layer are regulated and controlled to enable the AlInN layer and the Mg-doped nitrogen polar nitride layer to have higher lattice matching degree, so that the defect density increase In the barrier layer can be reduced, and the overall crystal quality of the active layer is improved.
The Si doped gallium polar nitride layer can fill up the flat surfaces of the Mg doped nitrogen polar nitride layer and the AlInN layer which are not grown due to defects, dislocation defects are reduced to extend to the potential well layer, the crystal quality of the active layer is improved, and the electron concentration of the active layer can be improved by introducing Si doping, so that the luminous efficiency is improved.
In conclusion, the light-emitting diode epitaxial wafer provided by the invention can improve the binding capacity of the active layer to electrons, reduce electron leakage, improve the injection efficiency of holes into the active layer, improve the concentration of electrons and holes in the potential well layer and improve the luminous efficiency.
While the foregoing is directed to the preferred embodiments of the present invention, it will be appreciated by those skilled in the art that changes and modifications may be made without departing from the principles of the invention, such changes and modifications are also intended to be within the scope of the invention.

Claims (10)

1. The light-emitting diode epitaxial wafer is characterized by comprising a substrate, wherein a buffer layer, an undoped gallium nitride layer, an N-type gallium nitride layer, an active layer and a P-type nitride layer are sequentially arranged on the substrate;
the active layer comprises a potential well layer and a barrier layer which are periodically and alternately arranged, the barrier layer comprises an Mg-doped nitrogen polar nitride layer, an AlInN layer and an Si-doped gallium polar nitride layer which are sequentially stacked, and the forbidden band width of the AlInN layer is larger than that of the Mg-doped nitrogen polar nitride layer and the Si-doped gallium polar nitride layer.
2. The light emitting diode epitaxial wafer of claim 1, wherein the Mg-doped nitrogen-polarity nitride layer is one or more combinations of a Mg-doped nitrogen-polarity AlGaN layer, a Mg-doped nitrogen-polarity GaN layer, and a Mg-doped nitrogen-polarity InGaN layer;
the thickness of the Mg-doped nitrogen polar nitride layer is 3 nm-12 nm;
the Mg doping concentration of the Mg-doped nitrogen polar nitride layer is 1 multiplied by 10 16 atoms/cm 3 ~1×10 17 atoms/cm 3
3. The light-emitting diode epitaxial wafer of claim 2, wherein the Mg-doped nitrogen-polarity nitride layer is a Mg-doped nitrogen-polarity InGaN layer, and an In composition In the Mg-doped nitrogen-polarity InGaN layer gradually decreases along a growth direction.
4. The light-emitting diode epitaxial wafer of claim 1, wherein the AlInN layer has a thickness of 1nm to 6nm;
the Al component of the AlInN layer is 0.8-0.9.
5. The light emitting diode epitaxial wafer of claim 1, wherein the Si-doped gallium-polar nitride layer is one or more combinations of Si-doped gallium-polar AlGaN layer, si-doped gallium-polar GaN layer, and Si-doped gallium-polar InGaN layer;
the thickness of the Si doped gallium polar nitride layer is 3 nm-12 nm;
the Si doping concentration of the Si doped gallium polar nitride layer is 1 multiplied by 10 17 atoms/cm 3 ~1×10 18 atoms/cm 3
6. The light emitting diode epitaxial wafer of claim 5, wherein the Si-doped gallium-polar nitride layer is a Si-doped gallium-polar InGaN layer, and an In composition In the Si-doped gallium-polar InGaN layer gradually increases along a growth direction.
7. A method for manufacturing a light emitting diode epitaxial wafer according to any one of claims 1 to 6, comprising the steps of:
s1, preparing a substrate;
s2, sequentially depositing a buffer layer, an undoped gallium nitride layer, an N-type gallium nitride layer, an active layer and a P-type nitride layer on the substrate;
the active layer comprises a potential well layer and a barrier layer which are periodically and alternately arranged, the barrier layer comprises an Mg-doped nitrogen polar nitride layer, an AlInN layer and an Si-doped gallium polar nitride layer which are sequentially stacked, and the forbidden band width of the AlInN layer is larger than that of the Mg-doped nitrogen polar nitride layer and the Si-doped gallium polar nitride layer.
8. The method for preparing a light-emitting diode epitaxial wafer according to claim 7, wherein the Mg-doped nitrogen-polarity nitride layer is prepared by the following method:
and controlling the temperature of the reaction chamber at 850-950 ℃ and the pressure at 150-250 torr, introducing source materials, wherein the source materials comprise an N source and a Ga source, and growing the Mg-doped nitrogen polar nitride layer by keeping the ratio of the flow of the N source to the flow of the Ga source introduced into the reaction chamber to be more than 1400.
9. The method for preparing a light emitting diode epitaxial wafer of claim 7, wherein the Si doped gallium nitride layer is prepared by the following method:
and controlling the temperature of the reaction chamber at 850-950 ℃ and the pressure at 150-250 torr, and introducing source materials, wherein the source materials comprise an N source and a Ga source, and the ratio of the flow of the N source to the flow of the Ga source introduced into the reaction chamber is kept to be less than 300, so as to grow the Si-doped gallium polar nitride layer.
10. An LED comprising the light emitting diode epitaxial wafer according to any one of claims 1 to 6.
CN202311259995.9A 2023-09-27 2023-09-27 LED epitaxial wafer, preparation method thereof and LED Pending CN117276440A (en)

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