CN116936582A - Pixel structure, preparation method, image sensor and electronic equipment - Google Patents
Pixel structure, preparation method, image sensor and electronic equipment Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
- H01L27/14605—Structural or functional details relating to the position of the pixel elements, e.g. smaller pixel elements in the center of the imager compared to pixel elements at the periphery
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
- H01L27/14614—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor having a special gate structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
The invention provides a pixel structure, a preparation method, an image sensor and electronic equipment. In the pixel structure design, an electric field modulation structure is formed between the transmission control gate electrode and the floating diffusion region, and the electric field formed between the transmission control gate electrode and the floating diffusion region can be modulated based on the arranged electric field modulation structure; in addition, when a high potential difference is formed between the grid electrode of the charge transfer transistor and the floating diffusion active region, the electric field intensity of the overlapped region of the grid electrode and the floating diffusion active region can be reduced or lowered, so that the grid electrode induced electric leakage (GIDL) is reduced, the problem of white spots and bad pixels of the CIS image is solved, and the image quality of the CIS is improved.
Description
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a pixel structure, a preparation method, an image sensor and electronic equipment.
Background
Today, CMOS Image Sensors (CIS) have been ubiquitous in our everyday life, ranging from smartphones to automobiles, security cameras, robots, and AR/VR entertainment devices. As we gradually transition to the internet of things age, the strong demand for intelligent, interconnected and autonomous consumer products has driven this trend. In response, leading image sensor designers, suppliers, and world foundries continue to advance technological innovations to facilitate pixel pitch scaling to smaller dimensions and greater CIS/ISP integration through pixel-level interconnects. Recently, CMOS image sensor products of smaller pixel size, e.g., 0.7um pixels, are demanded under the strong demand driving force of the mobile phone market. The CIS pixel size is continuously reduced, so that production merchants adopt a process platform with smaller line width and higher precision to manufacture products. Based on high mobility, most CIS use n-type metal oxide semiconductor (nMOS) transistors, including charge transfer transistors and source follower amplifiers.
Along with the miniaturization trend of the production process, the gate oxide layer and the side wall process of the nMOS charge transport transistor are thinner and shorter, so that the electric field between the charge transport transistor and the drain end (i.e., the floating diffusion active region) of the nMOS charge transport transistor is difficult to effectively regulate, and in addition, the trend also promotes the problem of gate induced leakage (GIDL) to be more obvious. During exposure of the CIS pixel, the gate bias of the charge transfer transistor is negative to completely prevent any electrons from flowing into the photodiode in the dark condition; the gate of the charge transfer transistor and its drain terminal (i.e., the floating diffusion active region) form a high potential difference, and GIDL phenomenon easily occurs. GIDL phenomenon causes a problem of a bad pixel of a CIS image white point, thereby degrading the image quality of the CIS.
Therefore, it is necessary to provide a pixel structure, an image sensor, an electronic device and a manufacturing method for solving the above technical problems in the prior art.
It should be noted that the foregoing description of the background art is only for the purpose of providing a clear and complete description of the technical solution of the present application and is presented for the convenience of understanding by those skilled in the art. The above-described solutions are not considered to be known to the person skilled in the art simply because they are set forth in the background of the application section.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a pixel structure, a manufacturing method thereof, an image sensor, and an electronic device, which are used for solving the problems that in the prior art, an electric field between a charge transfer transistor and a floating diffusion active region is difficult to be effectively regulated and controlled, and gate induced leakage is difficult to be effectively solved.
To achieve the above and other related objects, the present invention provides a pixel structure including:
a semiconductor substrate having a first surface and a second surface opposite to each other;
a photoelectric conversion region extending from the first face into the semiconductor substrate for receiving an optical signal to generate an electrical signal;
a floating diffusion region extending from the first face into the semiconductor substrate and having a pitch from the photoelectric conversion region;
a transfer control gate electrode disposed on the first face and corresponding to an overlapping region between the photoelectric conversion region and the floating diffusion region and at least with the floating diffusion region, to transfer an electric signal of the photoelectric conversion region to the floating diffusion region based on the transfer control gate electrode;
and the electric field modulation structure is arranged between the transmission control gate electrode and the floating diffusion region, and the projection of the electric field modulation structure on the first surface is overlapped with the projection of the overlapping region on the first surface.
Optionally, the pixel structure includes a transmission control gate, where the transmission control gate includes a gate dielectric layer and a transmission control gate electrode stacked from bottom to top, the gate dielectric layer is disposed on a first surface of the semiconductor substrate, and the electric field modulation structure is disposed in the transmission control gate electrode.
Optionally, the electric field modulation structure extends from a lower surface of the transmission control gate electrode into the transmission control gate electrode, and the electric field modulation structure is in contact with the gate dielectric layer.
Optionally, the width of the electric field modulation structure is greater than or equal to 40nm.
Optionally, the thickness of the electric field modulation structure is greater than 2nm, and an upper surface of the electric field modulation structure does not exceed an upper surface of the transmission control gate electrode.
Optionally, an outer edge of the electric field modulation structure on a side near the floating diffusion region is aligned with an outer edge of the transmission control gate electrode on a corresponding side.
Optionally, the material of the electric field modulation structure comprises an oxide comprising at least one of silicon dioxide, hafnium oxide, aluminum oxide, tantalum oxide, and silicon oxynitride.
Optionally, the electric field modulation structure extends from the first face of the semiconductor substrate into the floating diffusion region, and the electric field modulation structure does not exceed a lower surface of the floating diffusion region.
Optionally, the electric field modulation structure further extends into a device channel below the transfer gate electrode to form the electric field modulation structure comprising a channel modulation portion and a body modulation portion, wherein the channel modulation portion is located in the device channel and the body modulation portion is located in the floating diffusion region.
Optionally, the width of the channel modulation part is greater than or equal to 20nm, and the width of the main body modulation part is greater than or equal to 20nm.
Optionally, the thickness of the electric field modulation structure is greater than 2nm.
Optionally, the electric field modulation structure is far from the outer edge of one side of the transmission control gate electrode beyond the outer edge of the corresponding side of the transmission control gate electrode.
Optionally, the material of the electric field modulation structure comprises an oxide comprising at least one of silicon dioxide, hafnium oxide, aluminum oxide, tantalum oxide, and silicon oxynitride.
Optionally, the pixel structure further includes a gate dielectric layer formed under the transmission control gate electrode and in contact with the electric field modulation structure.
Optionally, the floating diffusion region includes a doped drain region and a main doped region extending downward from the first surface of the semiconductor substrate in sequence, and the lower surface of the electric field modulation structure exceeds the outer edge of the doped drain region at a corresponding position.
Optionally, the projection of the electric field modulation structure on the first face covers at least the projection of the overlap region on the first face.
The invention also provides an image sensor comprising the pixel structure according to any one of the above schemes.
The invention also provides electronic equipment comprising the image sensor according to any one of the schemes.
The invention also provides a preparation method of the pixel structure, wherein the preparation method can be any one of the preparation methods of the pixel structure in the scheme, and of course, any one of the preparation methods of the pixel structure in the scheme can also be prepared by other methods. The preparation method of the pixel structure comprises the following steps:
providing the semiconductor substrate having the first and second opposite sides;
preparing the electric field modulation structure on the first surface of the semiconductor substrate;
preparing the transmission control gate electrode on a first side of the semiconductor substrate;
the photoelectric conversion region and the floating diffusion region are prepared in the semiconductor substrate from the first face.
Optionally, when the electric field modulation structure is located in the transmission control gate electrode, the step of preparing the electric field modulation structure includes:
Forming an electric field modulation structure material layer on the surface of the first surface of the semiconductor substrate;
forming a first patterned mask plate on the electric field modulation structure material layer, wherein the first patterned mask plate defines a pattern of the electric field modulation structure;
and etching the electric field modulation structure material layer based on the first patterned mask plate through a wet etching process to obtain the electric field modulation structure on the surface of the first surface of the semiconductor substrate.
Optionally, when the pixel structure includes the transmission control gate, the step of forming the transmission control gate includes:
forming a gate dielectric material layer on the first surface of the semiconductor substrate after forming the electric field modulation structure;
forming a transmission control gate electrode material layer on the gate dielectric material layer and the electric field modulation structure;
and etching the gate electrode material layer and the gate dielectric material layer to form the transmission control gate comprising the gate dielectric layer and the transmission gate control gate electrode which are overlapped from bottom to top.
Optionally, the electric field modulation structure material layer is formed through a first oxidation process, and the temperature of the first oxidation process is 600 ℃ or higher.
Optionally, the gate dielectric material layer is formed through a second oxidation process, and the temperature of the second oxidation process is greater than or equal to 600 ℃.
Optionally, when the electric field modulation structure extends into the floating diffusion region, the step of forming the electric field modulation structure comprises:
forming a groove in the semiconductor substrate from the first surface by adopting a wet etching process;
forming an electric field modulation structure material layer in the groove and on the first surface of the semiconductor substrate around the groove;
forming a second patterned mask plate on the electric field modulation structure material layer, wherein the second patterned mask plate defines a pattern of the electric field modulation structure;
and removing the electric field modulation structure material layer around the groove based on the second patterned mask plate through a wet etching process to obtain the electric field modulation structure formed in the groove.
Optionally, when the pixel structure further includes the gate dielectric layer, the step of forming the gate dielectric layer and the transmission gate control gate electrode includes:
forming a gate dielectric material layer on the first surface of the semiconductor substrate after forming the electric field modulation structure;
forming a transmission control gate electrode material layer on the gate dielectric material layer;
And etching the gate electrode material layer and the gate dielectric material layer to form the gate dielectric layer and the transmission gate control gate electrode which are overlapped from bottom to top.
Optionally, the electric field modulation structure material layer is formed through a third oxidation process, and the temperature of the third oxidation process is more than or equal to 600 ℃.
Optionally, the gate dielectric material layer is formed through a fourth oxidation process, and the temperature of the fourth oxidation process is greater than or equal to 600 ℃.
As described above, in the pixel structure, the manufacturing method, the image sensor, and the electronic device of the present invention, in the pixel structure design, an electric field modulation structure is formed between the transmission control gate electrode and the floating diffusion region, and the electric field formed between the transmission control gate electrode and the floating diffusion region can be modulated based on the set electric field modulation structure; in addition, when a high potential difference is formed between the grid electrode of the charge transfer transistor and the floating diffusion active region, the electric field intensity of the overlapped region of the grid electrode and the floating diffusion active region can be reduced or lowered, so that the grid electrode induced electric leakage (GIDL) is reduced, the problem of white spots and bad pixels of the CIS image is solved, and the image quality of the CIS is improved.
Drawings
Fig. 1 shows a pixel circuit of an image sensor commonly used in the prior art.
Fig. 2 is a cross-sectional view of a corresponding device structure in the dashed box of the pixel circuit shown in fig. 1.
FIG. 3 is a graph of TCAD simulation data of highest electric field strength versus gate polysilicon layer voltage for the structure of FIG. 2.
Fig. 4 shows a process flow diagram of the preparation of the pixel structure according to the present invention.
Fig. 5 to 14 are schematic views of a pixel structure and a structure obtained in each step in the manufacturing process according to the first embodiment of the present invention.
Fig. 15 to 27 are schematic views of a pixel structure and a structure obtained in each step in the manufacturing process according to the second embodiment of the present invention.
Fig. 28 shows simulation data for a process computer aided design (TCAD) of a device designed based on the present invention.
Description of element reference numerals
200. 300 semiconductor substrate
200a, 300a first side
200b, 300b second side
201. Electric field modulation structure material layer
203. Photoresist layer
204. First patterned mask plate
205. Electric field modulation structure
206. 306 gate dielectric material layer
207. 307 transmission gate electrode material layer
208. 308 gate dielectric layer
209. 309 transmission control gate electrode
210. 310 transmission control gate
211. 311 photoelectric conversion region
212. 312 floating diffusion region
301. Groove etching mask layer
301a trench pattern opening
302. Groove
303. Electric field modulation structure material layer
304. Electric field modulation structure
304a channel modulation section
304b main body modulation unit
305. Second patterned mask plate
312a doped drain region
312b body doped region
S1 to S4 steps
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
As described in detail in the embodiments of the present application, the cross-sectional view of the device structure is not partially enlarged to a general scale for convenience of explanation, and the schematic drawings are only examples, which should not limit the scope of the present application. In addition, the three-dimensional dimensions of length, width and depth should be included in actual fabrication.
For ease of description, spatially relative terms such as "under", "below", "beneath", "above", "upper" and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Furthermore, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers or one or more intervening layers may also be present. In addition, "between … …" as used in the present application includes two end points.
In the context of the present application, a structure described as a first feature being "on" a second feature may include embodiments where the first and second features are formed in direct contact, as well as embodiments where additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of each component in actual implementation may be changed at will, and the layout of the components may be more complex.
In the image sensor pixel of the prior art, a circuit schematic structure as shown in fig. 1 is mostly used, and the image sensor pixel includes a photodiode 101, a charge transfer transistor 102, a reset transistor 103, a source follower transistor 104, a pixel selection transistor 105, and a floating diffusion active region FD. In addition, along with the promotion of the mobile market of the mobile phone on the miniaturization requirement of the image sensor product, a sharing layout mode is often adopted among pixels; in the image sensor product with small-area pixels, a sharing structure mode is often adopted between pixels, and a plurality of photodiodes 101 and charge transfer transistors 102 are connected in parallel and are commonly connected to the FD end of a floating diffusion active area, for example, a four-pixel sharing structure mode published by application publication number CN110336953a and a two-pixel sharing structure mode published by application publication number CN110061026 a.
Along with the miniaturization trend of the production process, the gate oxide layer and the side wall process of the nMOS charge transfer transistor are thinner and shorter, the electric field between the charge transfer transistor and the drain end (i.e. the floating diffusion active region) of the charge transfer transistor is difficult to effectively regulate, the problem of gate induced leakage (GIDL) is more obvious, and the white point bad pixels are difficult to effectively solve. The image sensor collects white point bad pixels of an image, and the white point bad pixels mainly comprise two sources: a photodiode 101 and a floating diffusion active region FD. Specifically, the photodiode 101 generates a white dot bad pixel due to pixel signal aberration caused by leakage of the channel of the charge transfer transistor 102, and in order to suppress the white dot factor, the gate of the charge transfer transistor 102 is usually set to be biased at a negative voltage in the prior art; however, the negative bias charge transfer transistor 102 is more prone to gate induced leakage (GIDL) drawbacks, which can cause signal aberrations in the floating diffusion active region FD, which can cause the image pixel to appear white and bright. Particularly, the pixels in the sharing structure mode and the pixels in the sharing layout mode are more prone to suffering from the defects of white point bad pixels, wherein one pixel has the problem of GIDL, and then the image signals of all the pixels in the sharing structure are in abnormal conditions of white and shiny.
Fig. 2 shows a schematic cross-sectional view of the device of dashed box 100 shown in fig. 1. In fig. 2, a schematic cross-sectional view includes a photodiode 101, a gate oxide layer 201 of a charge transfer transistor 102, a gate polysilicon layer 202 of the charge transfer transistor 102, a floating diffusion active region FD (n+ region in fig. 2) which is a high concentration N-type impurity ion region, and a P-epi (P-type semiconductor silicon substrate). During normal operation of the image sensor pixel, the n+ region of FD is set to a high voltage state, e.g., 2.5V, and the gate polysilicon layer 202 is set to a negative voltage, e.g., -2V; the gate polysilicon layer 202 and the N+ region of the FD are in a high-voltage bias state, the gate oxide layer 201 region and the N+ region silicon surface between the overlapped region are in a high-electric field intensity state, and the high-electric field intensity state easily causes charge tunneling phenomenon between the gate polysilicon layer 202 and the N+ region of the FD, thereby causing the defects of GIDL; the existence of silicon dangling bonds and defects on the silicon surface of the N+ region between the overlapped regions can capture and release charges tunneled from the grid polycrystalline silicon layer 202, and the strength of GIDL is further boosted under the action of a high electric field; an exponentially increasing relationship is present between the strength of GIDL and the highest electric field strength. In addition, fig. 3 is a TCAD (process computer aided design) simulation data diagram of the highest electric field strength and the voltage of the gate polysilicon layer 202 in the device of the structure of fig. 2, and it is known from fig. 3 that the more negative the voltage of the gate polysilicon layer 202 is, the higher the highest electric field strength is, and the more obvious GIDL problem is caused by the higher highest electric field strength.
In view of the foregoing, the present invention provides a pixel structure, an image sensor, an electronic device, and a manufacturing method, where the pixel structure includes: the semiconductor device comprises a semiconductor substrate, a photoelectric conversion region, a floating diffusion region, a transmission control gate electrode and an electric field modulation structure. Through the design of the electric field modulation structure, the electric field formed between the voltage applied to the transmission control gate electrode and the voltage applied to the floating diffusion region can be effectively regulated and controlled based on the electric field modulation structure; and the electric field intensity of the overlapped area between the transmission control gate electrode and the floating diffusion area can be effectively reduced through the electric field modulation structure, so that the problem of image white dot bad pixels caused by GIDL is improved.
Fig. 4 is a process flow diagram of the pixel structure according to the present invention. Fig. 5-14 and fig. 15-27 show two pixel structures according to the present invention and the structure obtained by each step in the preparation process. Fig. 28 shows simulation data of a process computer aided design (TCAD) for designing a device structure based on the present invention.
The pixel structure and the method for manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.
Embodiment one:
as shown in fig. 4, the present invention provides a method for manufacturing a pixel structure, where the pixel structure provided by the present invention is preferably manufactured by using the manufacturing method provided by the present embodiment, and of course, other methods may also be used for manufacturing the pixel structure. As shown in fig. 4, the method for manufacturing the pixel structure provided in this embodiment includes the following steps:
S1: providing the semiconductor substrate having the first and second opposite sides;
s2: preparing the electric field modulation structure on the first surface of the semiconductor substrate;
s3: preparing the transmission control gate electrode on a first side of the semiconductor substrate;
s4: the photoelectric conversion region and the floating diffusion region are prepared in the semiconductor substrate from the first face.
The method for fabricating a pixel structure according to the present invention will be described in detail with reference to the accompanying drawings, wherein fig. 5-14 represent schematic structural views obtained by each step in the fabrication of a pixel structure according to the present embodiment. In addition, it should be noted that the above sequence does not strictly represent the preparation sequence of the pixel structure protected by the present invention, and those skilled in the art may vary depending on the actual process steps. Fig. 4 shows only the sequence of steps for preparing a pixel structure in one example provided by the present invention.
First, as shown in S1 in fig. 4 and fig. 5, a semiconductor substrate 200 having opposite first and second faces 200a and 200b is provided.
Specifically, the semiconductor substrate 200 may be any structure used for preparing each functional area of the image sensor in the field of image sensors, such as preparing a photosensitive element and each control transistor of a CMOS image sensor based on the semiconductor substrate 200. The semiconductor substrate 200 may be a structure formed of a single material layer, including but not limited to a silicon substrate, in which elements in each region are prepared, and may be single crystal silicon, single crystal germanium, polycrystalline silicon, amorphous silicon, a silicon germanium compound, or the like.
In addition, the semiconductor substrate 200 may be a stacked structure of two or more material layers, and each region may be prepared in any desired layer. For example, the semiconductor substrate 200 includes a silicon substrate and an epitaxial layer (EPI) formed on the silicon substrate in which the photosensitive elements, the respective control transistors, and the like are prepared, as a back-illuminated (BSI) image sensor may be prepared based on the above-described structure. In addition, the semiconductor substrate 200 may be silicon on insulator (Silicon On Insulater, SOI). In addition, the semiconductor substrate 200 may also be a structure with N-type doping or P-type doping to meet the functional requirements of the device.
In this embodiment, the semiconductor substrate 200 is selected as a P-epi single crystal material, and the silicon substrate is exposed on the surface.
Next, as shown in S2 in fig. 4 and fig. 6-10, the electric field modulation structure 205 is prepared on the first side 200a of the semiconductor substrate 200. The specific steps can be as follows:
first, as shown in fig. 6, an electric field modulation structure material layer 201 is formed on a surface of a first surface of a semiconductor substrate 200. Wherein the material of the electric field modulation structure material layer 201 includes an oxide, so as to prepare the electric field modulation structure. The oxide includes at least one of silicon dioxide, hafnium oxide, aluminum oxide, tantalum oxide and silicon oxynitride, and may be any one of the material layers formed of the above materials, or may be a stacked structure formed of a single-layer material layer formed of the above materials.
In an example, the electric field modulation structure material layer 201 is formed through a first oxidation process at a temperature of 600 ℃ or more, for example, 800 ℃, 900 ℃, 1000 ℃. In addition, the oxidation time length can be adjusted, and an oxide layer with a preset thickness can be manufactured to obtain an electric field modulation structure with a required thickness.
Next, as shown in fig. 7-8, a first patterned mask 204 is formed on the electric field modulation structure material layer 201, where the first patterned mask 204 defines a pattern of an electric field modulation structure to be formed subsequently.
In an example, a photoresist layer 203 may be formed on the electric field modulation structure material layer 201, i.e., a photoresist layer is spin-coated to be used as a photoresist, as shown in fig. 7; then, the photoresist is exposed and developed, as shown in fig. 8, and the photoresist is left only at the position where the electric field modulation structure is formed in a preset manner, so as to obtain the first patterned mask 204.
Continuing, as shown in fig. 9-10, the electric field modulation structure material layer 201 is etched by a wet etching process based on the first patterned mask 204 to obtain an electric field modulation structure 205 on the surface of the first side of the semiconductor substrate 200.
Specifically, the wet etching of the oxide layer is adopted to etch away the unnecessary oxide layer, and the preset oxide layer is reserved only at the position with the photoresist, so that the electric field modulation structure 205 is obtained, as shown in fig. 9, the wet etching process is adopted, so that the surface defect of the electric field modulation structure 205 is reduced, the preparation precision of the electric field modulation structure 205 is improved, and the modulation of the electric field intensity is facilitated. In addition, the step of removing the residual photoresist is further included after forming the electric field modulation structure 205, as shown in fig. 10.
Next, as shown in S3 in fig. 4 and fig. 11-13, after the electric field modulation structure 205 is formed, a transmission control gate electrode 210 is prepared on the first face 200a of the semiconductor substrate 200.
Wherein, the step of forming the transmission control gate 210 includes:
first, as shown in fig. 11, after the electric field modulation structure 205 is formed, a gate dielectric material layer 206 is formed on the first surface of the semiconductor substrate 200, where the gate dielectric material layer 206 may be made of a conventional gate oxide material, including but not limited to silicon oxide.
In an example, the gate dielectric material layer 206 is formed by a second oxidation process at a temperature of 600 ℃ or higher, for example, 800 ℃, 900 ℃, 1000 ℃. In addition, the oxidation time length can be adjusted, and a gate oxide material layer with a preset thickness can be manufactured to obtain a gate oxide layer with a required thickness, and the thickness of the gate oxide layer can be consistent with the technical parameters of the prior process platform. By adopting the above process, it is beneficial to form a high-performance gate oxide layer on the basis that the electric field modulation structure 205 is formed, and meanwhile, when the first oxidation process and the second oxidation process are matched, in the process of the preparation process of the embodiment, under the condition that the high-performance gate oxide layer is formed, a good electric field modulation structure is formed between the gate oxide layer and a transmission gate electrode formed subsequently.
Next, as shown in fig. 12, a transmission control gate electrode material layer 207 is formed on the gate dielectric material layer 206 and the electric field modulation structure 205. The transmission gate electrode material layer 207 may be formed by Physical Vapor Deposition (PVD) or Chemical Vapor Deposition (CVD), and the material thereof may include, but is not limited to, polysilicon, to obtain a subsequent transmission control gate electrode.
Continuing, as shown in fig. 13, the gate electrode material layer 207 and the gate dielectric material layer 206 are etched to form a transfer control gate 210 including a gate dielectric layer (gate oxide layer) 208 and a transfer gate control gate electrode 209 stacked from bottom to top.
Finally, as shown in S4 in fig. 4 and 14, a photoelectric conversion region (PD) 211 and a floating diffusion region (FD) 212 are prepared in the semiconductor substrate 200 from the first face 200a thereof.
Specifically, the photoelectric conversion region (PD) 211 and the floating diffusion region (FD) 212 may be formed by an existing ion implantation process, for example, n-type ion doping may be performed by an existing process. In an alternative example, the photoelectric conversion region 211 may form a photodiode. In addition, in other embodiments, the photoelectric conversion element may be manufactured first and then the transmission control gate may be manufactured, and of course, other suitable manufacturing sequences may be used.
It should be noted that, the pixel structure obtained in this embodiment includes: a conductor substrate 200, a photoelectric conversion region 211, a floating diffusion region 212, a transmission control gate electrode 209, and an electric field modulation structure 205, wherein the semiconductor substrate 200 has a first face 200a and a second face 200b opposite to each other; the photoelectric conversion region 211 extends from the first face 200a into the semiconductor substrate 200 for receiving an optical signal to generate an electrical signal; the floating diffusion region 212 extends from the first surface 200a into the semiconductor substrate 200 with a space from the photoelectric conversion region 211; the transfer control gate electrode 209 is disposed on the first surface 200a and is correspondingly located between the photoelectric conversion region 211 and the floating diffusion region 212, and it is understood that the edge of the transfer control gate electrode 209 may be aligned with the edge of the photoelectric conversion region 211 or the floating diffusion region 212, or the edge of the transfer control gate electrode 209 may be overlapped with both sides correspondingly to form an effective device channel, so as to implement charge transfer of the image sensor. In addition, the electric field modulation structure 205 is disposed between the transfer control gate electrode 209 and the floating diffusion region 212, and the projection of the electric field modulation structure 205 on the first surface 200a overlaps with the projection of the overlapping region on the first surface 200a, so that the electric field of the overlapping region can be modulated based on the electric field modulation structure, that is, when the electric field is formed between the transfer control gate electrode 209 and the floating diffusion region 212, the electric field can be modulated based on the disposed electric field modulation structure to satisfy the requirement. When a high potential difference is formed between the gate electrode (transfer control gate electrode 209) of the charge transfer transistor and the drain electrode (floating diffusion active region 212) thereof, such as when the gate bias voltage of the charge transfer transistor is negative during exposure of the CIS pixel, the high potential difference can be reduced by the electric field modulation structure 205, thereby reducing gate induced leakage (GIDL), improving the problem of the CIS image white dot bad pixel, and improving the image quality of the CIS.
As an example, referring to fig. 14, the pixel structure of the present invention includes a transmission control gate 210, the transmission control gate 210 includes a gate dielectric layer 208 and a transmission control gate electrode 209 stacked from bottom to top, wherein the gate dielectric layer 208 is disposed on a surface of a first face 200a of the semiconductor substrate 200, and the electric field modulation structure 205 is disposed in the transmission control gate electrode 209.
In a further example, the electric field modulation structure 205 extends from a lower surface of the transfer control gate electrode 209 into the transfer control gate electrode 209, and the electric field modulation structure 205 is in contact with the gate dielectric layer 208.
Specifically, it can be understood that the electric field modulation structure 205 is formed in the transmission control gate electrode 209, where the electric field modulation structure 205 is disposed on the surface of the gate dielectric layer 208, so as to improve the effect of electric field modulation, and meanwhile, referring to fig. 11-14, the above arrangement is convenient for implementing the process and improving the overall performance of the device. Additionally, in an alternative example, the outer edge of the electric field modulation structure 205 on one side near the floating diffusion region 212 is aligned with the outer edge of the transfer control gate electrode 209 on the corresponding side. Is beneficial to the improvement of the electric field modulation effect and the implementation of the process.
As an example, as shown in fig. 14, the width w of the electric field modulation structure 205 is 40nm or more; for example, 50nm, 60nm, 80nm, thereby facilitating efficient modulation of the electric field in the overlap region.
As an example, the thickness t of the electric field modulation structure 205 is greater than 2nm, for example, may be 3nm, 4nm, and the upper surface of the electric field modulation structure 205 does not exceed the upper surface of the transmission control gate electrode 209; thereby optimizing the modulation of the electric field by the electric field modulation structure while facilitating the performance of the device itself.
As an example, as shown in fig. 14, the projection of the electric field modulation structure 205 on the first surface 200a covers at least the projection of the overlapping region on the first surface, thereby facilitating the modulation effect of the electric field modulation structure, and improving the GIDL effect.
Embodiment two:
the second embodiment provides another pixel structure and a corresponding manufacturing method, and the difference between the second embodiment and the first embodiment is mainly that the position and the forming process of the electric field modulation structure are different, and the difference between the second embodiment and the first embodiment will be described in detail with reference to the accompanying drawings, and other related structures and manufacturing may be referred to the first embodiment and will not be described herein.
First, as shown in fig. 15, a semiconductor substrate 300 having opposite first and second faces 300a and 300b is provided;
Next, as shown in fig. 16-22, an electric field modulation structure 304 is fabricated on the first side 300a of the semiconductor substrate 300;
the step of forming the electric field modulation structure 304 includes:
as shown in fig. 16-18, a wet etching process is used to form a recess 302 in the semiconductor substrate 300 from the first side 300 a; the wet etching process is favorable for forming the electric field modulation structure with good performance subsequently. The method specifically comprises the following steps: as shown in fig. 16, a trench etching mask layer 301 with a trench pattern opening 301a formed on a first surface of a semiconductor substrate 300 is prepared, which may be formed by spin-coating photoresist on a surface of the first surface 300a, exposing and developing, and perforating the photoresist only at a position where an electric field modulation structure is preset; then, as shown in fig. 17, the bare substrate, such as silicon, is wet etched; next, as shown in fig. 18, the remaining photoresist is removed to obtain a recess 302, and a spare trench is formed.
As shown in fig. 19-22, an electric field modulation structure 304 is fabricated within the recess 302; the method specifically comprises the following steps: as shown in fig. 19, an electric field modulation structure material layer 303 is formed on the first surface of the semiconductor substrate in and around the recess 302, including the portion formed in the recess 302, which is an electric field modulation structure 304 to be formed; the electric field modulation structure material layer 303 may be formed by a third oxidation process, the temperature of which is 600 ℃ or higher, for example, 800 ℃, 900 ℃, 1000 ℃; then, as shown in fig. 20, a second patterned mask 305 is formed on the electric field modulation structure material layer 303, where the second patterned mask 305 defines a pattern of the electric field modulation structure 304, that is, a material layer portion in the groove; next, as shown in fig. 21-22, the electric field modulation structure material layer 303 around the recess 302 is removed based on the second patterned mask 305 by a wet etching process, so as to obtain an electric field modulation structure 304 formed in the recess 302, where the wet etching process is beneficial to forming a device structure with good performance subsequently.
Next, as shown in fig. 23 to 25, a transfer control gate electrode 309 is prepared on the first face 300a of the semiconductor substrate 300; further, the pixel structure of the present embodiment includes a transmission control gate 310, where the transmission control gate 310 includes a gate dielectric layer 308 and a transmission control gate electrode 309 stacked from bottom to top, and specifically includes the following steps:
as shown in fig. 23, after forming the electric field modulation structure 304, a gate dielectric material layer 306 is formed on the first surface of the semiconductor substrate 300; the gate dielectric material layer may be formed by a fourth oxidation process at a temperature of 600 ℃ or higher, for example, 800 ℃, 900 ℃, 1000 ℃; the oxidation time length can be adjusted, and a gate oxide material layer with a preset thickness can be manufactured to obtain a gate oxide layer with a required thickness, and the thickness of the gate oxide layer can be consistent with the technical parameters of the prior process platform. By adopting the process, a high-performance gate oxide layer can be formed on the basis that the electric field modulation structure 304 is formed, and the gate oxide layer is formed below the transmission control gate electrode and is in contact with the electric field modulation structure; meanwhile, when the first oxidation process and the second oxidation process are matched, and under the condition that a high-performance gate oxide layer is formed in the preparation process of the embodiment, a good electric field modulation structure is formed between the gate oxide layer and a transmission gate electrode formed subsequently; then, as shown in fig. 24, a transmission control gate electrode material layer 307 is formed on the gate dielectric material layer 306; continuing, as shown in fig. 25, the gate electrode material layer 307 and the gate dielectric material layer 306 are etched to form a gate dielectric layer 308 and a transfer gate control gate electrode 309, which are stacked from bottom to top, resulting in a transfer control gate 310.
Finally, as shown in fig. 26, the photoelectric conversion region PD and the floating diffusion region FD are prepared in the semiconductor substrate from the first side.
In this embodiment, the electric field modulation structure 304 extends from the first surface 300a of the semiconductor substrate into the floating diffusion region 312, and the electric field modulation structure 304 does not extend beyond the lower surface of the floating diffusion region 312.
As an example, as shown in fig. 26, the electric field modulation structure 304 further extends into the device channel under the transfer gate electrode 309, that is, the device channel formed by the transfer control gate 310, and the charges of the photoelectric conversion region are transferred to the floating diffusion region based on the channel to form the electric field modulation structure 304 including the channel modulation portion 304a and the body modulation portion 304b, where the channel modulation portion 304a is located in the device channel, the body modulation portion 304b is located in the floating diffusion region 312, and the electric field modulation structure extending into the channel beyond the floating diffusion region 312 may further be beneficial to improve the electric field modulation effect and the overall performance of the device.
As an example, the width d1 of the channel modulation section 304a is 20nm or more, for example, 25nm, 30nm; the width d2 of the body modulation unit 304b is 20nm or more, for example, 25nm or 30nm; the whole is beneficial to the improvement of the performance of the device.
As an example, the thickness of the electric field modulation structure 304 is greater than 2nm, such as may be 3nm, 4nm, etc.
As an example, the outer edge of one side of the electric field modulation structure 304 away from the transfer control gate electrode 309 exceeds the outer edge of the transfer control gate electrode 309 on the corresponding side, as in fig. 14 the right side edge of the charge modulation structure 304 exceeds the right side edge of the transfer control gate electrode 309, i.e. the right side edge of the charge modulation structure 304 exceeds the right side edge of the transfer control gate 310.
As an example, the floating diffusion region 312 includes a doped drain region (LDD) 312a and a body doped region 312b extending downward in order from the first side of the semiconductor substrate, and referring to fig. 27, a dashed dotted line simply illustrates a region of a lightly doped drain region LDD, which may be any lightly doped drain LDD region formed in the prior art, as will be understood by those skilled in the art, in which case the lower surface of the electric field modulation structure 304 extends beyond the outer edge of the doped drain region 312a at a corresponding location. That is, as shown in fig. 27, the electric field modulation structure 304 extends to the channel direction to cover the lightly doped drain region at the corresponding position, so that the realization of the function of the device itself can be facilitated, and the improvement of the electric field modulation effect of the electric field modulation structure can be facilitated.
Embodiment III:
the third embodiment provides an image sensor, which includes the pixel structure according to any one of the aspects of the present invention, for example, it may include the pixel structure according to any one of the first embodiment or the second embodiment. The image sensor of the present invention may be a CMOS image sensor. In addition, the embodiment also provides electronic equipment, which comprises the image sensor according to any one of the schemes of the invention. The electronic equipment can be security camera equipment, automobile electronic camera equipment, mobile phone camera equipment, unmanned aerial vehicle, machine vision, existing cameras and other equipment.
In summary, the invention provides a pixel structure, a manufacturing method thereof, an image sensor and an electronic device, wherein in the design of the pixel structure, an electric field modulation structure is formed between a transmission control gate electrode and a floating diffusion region, and an electric field formed between the transmission control gate electrode and the floating diffusion region can be modulated based on the arranged electric field modulation structure; in addition, when a high potential difference is formed between the grid electrode of the charge transfer transistor and the floating diffusion active region, the electric field intensity of the overlapped region of the grid electrode and the floating diffusion active region can be reduced or lowered, so that the grid electrode induced electric leakage (GIDL) is reduced, the problem of white spots and bad pixels of the CIS image is solved, and the image quality of the CIS is improved. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (18)
1. A pixel structure, the pixel structure comprising:
a semiconductor substrate having a first surface and a second surface opposite to each other;
a photoelectric conversion region extending from the first face into the semiconductor substrate for receiving an optical signal to generate an electrical signal;
a floating diffusion region extending from the first face into the semiconductor substrate and having a pitch from the photoelectric conversion region;
a transfer control gate electrode disposed on the first face and corresponding to an overlapping region between the photoelectric conversion region and the floating diffusion region and at least with the floating diffusion region, to transfer an electric signal of the photoelectric conversion region to the floating diffusion region based on the transfer control gate electrode;
And the electric field modulation structure is arranged between the transmission control gate electrode and the floating diffusion region, and the projection of the electric field modulation structure on the first surface is overlapped with the projection of the overlapping region on the first surface.
2. The pixel structure of claim 1, wherein the pixel structure comprises a transmission control gate comprising a gate dielectric layer and the transmission control gate electrode stacked from bottom to top, wherein the gate dielectric layer is disposed on a first surface of the semiconductor substrate and the electric field modulation structure is disposed in the transmission control gate electrode.
3. The pixel structure of claim 2, wherein the electric field modulation structure extends from a lower surface of the transfer control gate electrode into the transfer control gate electrode, and the electric field modulation structure is in contact with the gate dielectric layer.
4. The pixel structure according to claim 2, wherein a width of the electric field modulation structure is 40nm or more; and/or the thickness of the electric field modulation structure is greater than 2nm, and the upper surface of the electric field modulation structure does not exceed the upper surface of the transmission control gate electrode; and/or the outer edge of one side of the electric field modulation structure close to the floating diffusion region is aligned with the outer edge of the transmission control gate electrode of the corresponding side; and/or the material of the electric field modulation structure comprises an oxide comprising at least one of silicon dioxide, hafnium oxide, aluminum oxide, tantalum oxide, and silicon oxynitride.
5. The pixel structure of claim 1, wherein the electric field modulation structure extends from the first side of the semiconductor substrate into the floating diffusion region and the electric field modulation structure does not extend beyond a lower surface of the floating diffusion region.
6. The pixel structure of claim 5, wherein the electric field modulation structure further extends into a device channel below the transfer gate electrode to form the electric field modulation structure comprising a channel modulation portion and a body modulation portion, wherein the channel modulation portion is located in the device channel and the body modulation portion is located in the floating diffusion region.
7. The pixel structure according to claim 6, wherein a width of the channel modulation portion is 20nm or more, and a width of the body modulation portion is 20nm or more; and/or the thickness of the electric field modulation structure is greater than 2nm; and/or the outer edge of one side of the electric field modulation structure far away from the transmission control gate electrode exceeds the outer edge of the corresponding side of the transmission control gate electrode; and/or the material of the electric field modulation structure comprises an oxide comprising at least one of silicon dioxide, hafnium oxide, aluminum oxide, tantalum oxide, and silicon oxynitride; and/or the pixel structure further comprises a gate dielectric layer, wherein the gate dielectric layer is formed under the transmission control gate electrode and is in contact with the electric field modulation structure.
8. The pixel structure of claim 5, wherein the floating diffusion region comprises a doped drain region and a body doped region extending downward from the first side of the semiconductor substrate in sequence, the lower surface of the electric field modulation structure exceeding the outer edge of the doped drain region at corresponding locations.
9. A pixel structure according to any one of claims 1-8, wherein the projection of the electric field modulation structure on the first face covers at least the projection of the overlap region on the first face.
10. An image sensor comprising a pixel structure according to any one of claims 1-9.
11. An electronic device comprising the image sensor of claim 10.
12. A method of manufacturing a pixel structure according to any one of claims 1 to 9, comprising the steps of:
providing the semiconductor substrate having the first and second opposite sides;
preparing the electric field modulation structure on the first surface of the semiconductor substrate;
preparing the transmission control gate electrode on a first side of the semiconductor substrate;
The photoelectric conversion region and the floating diffusion region are prepared in the semiconductor substrate from the first face.
13. The method of manufacturing a pixel structure according to claim 12, wherein the step of manufacturing the electric field modulation structure when the electric field modulation structure is located in the transfer control gate electrode comprises:
forming an electric field modulation structure material layer on the surface of the first surface of the semiconductor substrate;
forming a first patterned mask plate on the electric field modulation structure material layer, wherein the first patterned mask plate defines a pattern of the electric field modulation structure;
and etching the electric field modulation structure material layer based on the first patterned mask plate through a wet etching process to obtain the electric field modulation structure on the surface of the first surface of the semiconductor substrate.
14. The method of manufacturing a pixel structure according to claim 13, wherein when the pixel structure includes the transfer control gate, the step of forming the transfer control gate includes:
forming a gate dielectric material layer on the first surface of the semiconductor substrate after forming the electric field modulation structure;
forming a transmission control gate electrode material layer on the gate dielectric material layer and the electric field modulation structure;
And etching the gate electrode material layer and the gate dielectric material layer to form the transmission control gate comprising the gate dielectric layer and the transmission gate control gate electrode which are overlapped from bottom to top.
15. The method of claim 14, wherein the electric field modulation structure material layer is formed by a first oxidation process at a temperature of 600 ℃ or more; and/or forming the gate dielectric material layer through a second oxidation process, wherein the temperature of the second oxidation process is more than or equal to 600 ℃.
16. The method of fabricating a pixel structure according to claim 12, wherein the step of forming the electric field modulation structure when the electric field modulation structure extends into the floating diffusion region comprises:
forming a groove in the semiconductor substrate from the first surface by adopting a wet etching process;
forming an electric field modulation structure material layer in the groove and on the first surface of the semiconductor substrate around the groove; forming a second patterned mask plate on the electric field modulation structure material layer, wherein the second patterned mask plate defines a pattern of the electric field modulation structure;
And removing the electric field modulation structure material layer around the groove based on the second patterned mask plate through a wet etching process to obtain the electric field modulation structure formed in the groove.
17. The method of claim 16, wherein when the pixel structure further comprises the gate dielectric layer, the step of forming the gate dielectric layer and the transfer gate control gate electrode comprises:
forming a gate dielectric material layer on the first surface of the semiconductor substrate after forming the electric field modulation structure;
forming a transmission control gate electrode material layer on the gate dielectric material layer;
and etching the gate electrode material layer and the gate dielectric material layer to form the gate dielectric layer and the transmission gate control gate electrode which are overlapped from bottom to top.
18. The method of fabricating a pixel structure according to claim 17, wherein the electric field modulation structure material layer is formed by a third oxidation process, the temperature of the third oxidation process being 600 ℃ or higher; and/or forming the gate dielectric material layer through a fourth oxidation process, wherein the temperature of the fourth oxidation process is more than or equal to 600 ℃.
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