CN217903121U - Pixel structure, image sensor and electronic device - Google Patents

Abstract

The utility model provides a pixel structure, image sensor, electronic equipment, pixel structure include the semiconductor substrate, set up the photoelectric conversion district in the semiconductor substrate and float diffusion zone, transmission gate electrode and electric field modulation structure. In the pixel structure design of the utility model, an electric field modulation structure is formed between the transmission control gate electrode and the floating diffusion region, and the electric field formed between the transmission control gate electrode and the floating diffusion region can be modulated based on the set electric field modulation structure; in addition, when a high potential difference is formed between the grid of the charge transfer transistor and the floating diffusion active region, the electric field intensity of an overlapped region of the grid and the floating diffusion active region can be reduced or lowered, so that grid induced leakage (GIDL) is reduced, the problem of white spots and bad pixels of CIS images is solved, and the image quality of the CIS is improved.

Description

Pixel structure, image sensor and electronic device

Technical Field

The utility model belongs to the technical field of the semiconductor, especially, relate to a pixel structure, image sensor, electronic equipment.

Background

Today, CMOS Image Sensors (CIS) are ubiquitous in our daily lives, from smart phones to automobiles, security cameras, robots, and AR/VR entertainment devices. As we gradually transitioned into the era of internet of things, the strong demand for intelligent, interconnected, and autonomous consumer products has driven this trend. In response, leading image sensor designers, vendors, and world foundries continue to advance technological innovations to facilitate pixel pitch scaling to smaller dimensions and to achieve greater CIS/ISP integration through pixel-level interconnects. Recently, under the strong demand driving force of the mobile phone market, CMOS image sensor products with smaller pixel size, such as 0.7um pixels, are required. CIS pixel sizes are continuously shrinking, which enables manufacturers to adopt process platforms with smaller line widths and higher precision to manufacture products. Most CIS use n-type metal oxide semiconductor (nMOS) transistors, including charge transfer transistors and source follower amplifiers, based on high mobility.

With the miniaturization trend of the production process, the gate oxide layer and the side wall process of the nMOS charge transfer transistor become thinner and shorter, which causes the electric field between the charge transfer transistor and the drain end (i.e., the floating diffusion active region) thereof to be difficult to be effectively controlled, and in addition, the trend also promotes the problem of gate induced leakage (GIDL) to be more practical and novel. In the CIS pixel, during exposure, the grid of the charge transfer transistor is biased to be negative voltage so as to completely prevent any electrons from flowing into the photodiode under the dark condition; the gate of the charge transfer transistor and its drain terminal (i.e., the floating diffusion active region) constitute a high potential difference, and GIDL phenomenon easily occurs. The GIDL phenomenon causes a problem of white spots and bad pixels of the CIS image, thereby reducing image quality of the CIS.

Therefore, it is necessary to provide a pixel structure, an image sensor, an electronic device and a manufacturing method thereof to solve the above technical problems in the prior art.

It should be noted that the above background description is only for the convenience of clear and complete description of the technical solutions of the present application and for the understanding of those skilled in the art. These solutions are not considered to be known to the person skilled in the art merely because they are set forth in the background section of the present application.

SUMMERY OF THE UTILITY MODEL

In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a pixel structure, an image sensor, and an electronic device, which are used to solve the problems that the electric field between the charge transfer transistor and the floating diffusion active region is difficult to be effectively controlled and the gate induced leakage is difficult to be effectively solved.

To achieve the above and other related objects, the present invention provides a pixel structure, including:

a semiconductor substrate having a first surface and a second surface opposite to each other;

the photoelectric conversion region extends from the first surface to the semiconductor substrate and is used for receiving an optical signal to generate an electric signal;

a floating diffusion region extending from the first face into the semiconductor substrate and having a spacing from the photoelectric conversion region;

a transfer control gate electrode disposed on the first face and corresponding between the photoelectric conversion region and the floating diffusion region and having an overlapping area with at least the floating diffusion region to transfer an electric signal of the photoelectric conversion region to the floating diffusion region based on the transfer control gate electrode;

and the electric field modulation structure is arranged between the transmission control gate electrode and the floating diffusion region, and the projection of the electric field modulation structure on the first surface has overlap with the projection of the overlapping region on the first surface.

Optionally, the pixel structure includes a transmission control gate, the transmission control gate includes a gate dielectric layer and a transmission control gate electrode stacked from bottom to top, the gate dielectric layer is disposed on the first surface of the semiconductor substrate, and the electric field modulation structure is disposed in the transmission control gate electrode.

Optionally, the electric field modulation structure extends from the lower surface of the transmission control gate electrode to the transmission control gate electrode, and the electric field modulation structure is in contact with the gate dielectric layer.

Optionally, the width of the electric field modulation structure is greater than or equal to 40nm.

Optionally, the thickness of the electric field modulation structure is greater than 2nm, and the upper surface of the electric field modulation structure does not exceed the upper surface of the transmission control gate electrode.

Optionally, an outer edge of one side of the electric field modulation structure close to the floating diffusion region is aligned with an outer edge of the transmission control gate electrode on a corresponding side.

Optionally, the material of the electric field modulation structure comprises an oxide, and the oxide comprises at least one of silicon dioxide, hafnium oxide, aluminum oxide, tantalum oxide, and silicon oxynitride.

Optionally, the electric field modulation structure extends from the first face of the semiconductor substrate into the floating diffusion region, and the electric field modulation structure does not extend beyond the lower surface of the floating diffusion region.

Optionally, the electric field modulation structure further extends into a device channel under the transfer gate electrode to form the electric field modulation structure comprising a channel modulation part and a body modulation part, wherein the channel modulation part is located in the device channel and the body modulation part is located in the floating diffusion region.

Optionally, the width of the channel modulation part is greater than or equal to 20nm, and the width of the main body modulation part is greater than or equal to 20nm.

Optionally, the thickness of the electric field modulation structure is greater than 2nm.

Optionally, an outer edge of one side of the electric field modulation structure, which is far away from the transmission control gate electrode, exceeds an outer edge of the transmission control gate electrode on the corresponding side.

Optionally, the material of the electric field modulation structure comprises an oxide, and the oxide comprises at least one of silicon dioxide, hafnium oxide, aluminum oxide, tantalum oxide, and silicon oxynitride.

Optionally, the pixel structure further includes a gate dielectric layer formed under the transmission control gate electrode and in contact with the electric field modulation structure.

Optionally, the floating diffusion region includes a doped drain region and a body doped region that extend downward from the first surface of the semiconductor substrate in sequence, and the lower surface of the electric field modulation structure exceeds the outer edge of the doped drain region at the corresponding position.

Optionally, the projection of the electric field modulation structure on the first face at least covers the projection of the overlap region on the first face.

The utility model also provides an image sensor, include as in any one of above-mentioned scheme the pixel structure.

The utility model also provides an electronic equipment, include as in any one of above-mentioned scheme image sensor.

The utility model also provides a preparation method of pixel structure, wherein, preparation method can be any one in above-mentioned scheme the preparation method of pixel structure, of course, any one in above-mentioned scheme the pixel structure also can adopt other methods to prepare. The preparation method of the pixel structure comprises the following steps:

providing the semiconductor substrate having the first and second opposing faces;

preparing the electric field modulation structure on the first surface of the semiconductor substrate;

preparing the transmission control gate electrode on the first surface of the semiconductor substrate;

the photoelectric conversion region and the floating diffusion region are prepared in the semiconductor substrate from the first face.

Optionally, when the electric field modulation structure is located in the transmission control gate electrode, the step of preparing the electric field modulation structure comprises:

forming an electric field modulation structure material layer on the surface of the first surface of the semiconductor substrate;

forming a first graphical mask plate on the electric field modulation structure material layer, wherein the first graphical mask plate defines a graph of the electric field modulation structure;

and etching the electric field modulation structure material layer based on the first graphical mask plate through a wet etching process so as to obtain the electric field modulation structure on the surface of the first surface of the semiconductor substrate.

Optionally, when the pixel structure includes the transfer control gate, the step of forming the transfer control gate includes:

forming a gate dielectric material layer on the first surface of the semiconductor substrate after the electric field modulation structure is formed;

forming a transmission control gate electrode material layer on the gate dielectric material layer and the electric field modulation structure;

and etching the gate electrode material layer and the gate dielectric material layer to form the transmission control gate comprising the gate dielectric layer and the transmission gate control gate electrode which are overlapped from bottom to top.

Optionally, the electric field modulation structure material layer is formed by a first oxidation process, and the temperature of the first oxidation process is greater than or equal to 600 ℃.

Optionally, the gate dielectric material layer is formed by a second oxidation process, and the temperature of the second oxidation process is greater than or equal to 600 ℃.

Optionally, when the electric field modulation structure extends into the floating diffusion region, the step of forming the electric field modulation structure comprises:

forming a groove in the semiconductor substrate from the first surface by adopting a wet etching process;

forming an electric field modulation structure material layer on the first surface of the semiconductor substrate in the groove and around the groove;

forming a second graphical mask plate on the electric field modulation structure material layer, wherein the second graphical mask plate defines a graph of the electric field modulation structure;

and removing the electric field modulation structure material layer around the groove based on the second graphical mask plate through a wet etching process to obtain the electric field modulation structure formed in the groove.

Optionally, when the pixel structure further includes the gate dielectric layer, the step of forming the gate dielectric layer and the transmission gate control gate electrode includes:

forming a gate dielectric material layer on the first surface of the semiconductor substrate after the electric field modulation structure is formed;

forming a transmission control gate electrode material layer on the gate dielectric material layer;

and etching the gate electrode material layer and the gate dielectric material layer to form the gate dielectric layer and the transmission gate control gate electrode which are overlapped from bottom to top.

Optionally, the electric field modulation structure material layer is formed through a third oxidation process, and the temperature of the third oxidation process is greater than or equal to 600 ℃.

Optionally, the gate dielectric material layer is formed through a fourth oxidation process, and the temperature of the fourth oxidation process is greater than or equal to 600 ℃.

As described above, the present invention provides a pixel structure, an image sensor, and an electronic device, in which an electric field modulation structure is formed between a transmission control gate electrode and a floating diffusion region, and an electric field formed between the transmission control gate electrode and the floating diffusion region can be modulated based on the set electric field modulation structure; in addition, when a high potential difference is formed between the grid electrode of the charge transfer transistor and the floating diffusion active region, the electric field intensity of an overlapped region of the grid electrode and the floating diffusion active region can be reduced or lowered, so that grid induced leakage (GIDL) is reduced, the problem of white point and bad pixels of a CIS image is solved, and the image quality of the CIS is improved.

Drawings

Fig. 1 shows a pixel circuit of an image sensor commonly used in the prior art.

Fig. 2 is a cross-sectional view of a corresponding device structure in a dashed-line box of the pixel circuit shown in fig. 1.

FIG. 3 is a graph of TCAD simulation data showing the highest electric field strength and gate polysilicon layer voltage in the structure of FIG. 2.

Fig. 4 shows a flow chart of a manufacturing process of the pixel structure provided by the present invention.

Fig. 5-14 are schematic structural diagrams illustrating a pixel structure and structures obtained in steps of a manufacturing process according to an embodiment of the present invention.

Fig. 15-27 are schematic structural diagrams illustrating a pixel structure and structures obtained in steps of a manufacturing process according to a second embodiment of the present invention.

Fig. 28 (a) -28 (c) show simulation data for a process computer aided design (TCAD) of a device designed according to the present invention.

Description of the element reference numerals

200. 300 semiconductor substrate

200a, 300a first surface

200b, 300b second face

201. Electric field modulation structure material layer

203. Photoresist layer

204. First graphical mask plate

205. Electric field modulation structure

206. 306 gate dielectric material layer

207. 307 transfer gate electrode material layer

208. 308 gate dielectric layer

209. 309 transmission control gate electrode

210. 310 transmission control gate

211. 311 photoelectric conversion region

212. 312 floating diffusion region

301. Trench etch mask layer

301a trench pattern opening

302. Groove

303. Electric field modulation structure material layer

304. Electric field modulation structure

304a channel modulation part

304b main body modulation part

305. Second patterned mask plate

312a doped drain region

312b body doped region

S1 to S4

Detailed Description

The following description of the embodiments of the present invention is provided for illustrative purposes, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The present invention can be implemented or applied by other different specific embodiments, and various details in the present specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

As in the detailed description of the embodiments of the present invention, the cross-sectional views illustrating the device structure are not enlarged partially in general scale for the convenience of illustration, and the schematic views are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.

For convenience in description, spatial relational terms such as "below," "beneath," "below," "under," "over," "upper," and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatial relationship terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Further, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present. In addition, "between" \\8230: "\8230" \ 8230between "used in the utility model includes two end point values.

In the context of this application, a structure described as a first feature being "on" a second feature may include embodiments where the first and second features are formed in direct contact, and may also include embodiments where additional features are formed in between the first and second features, such that the first and second features may not be in direct contact.

It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention in a schematic manner, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the form, amount and proportion of each component may be changed arbitrarily in actual implementation, and the layout of the components may be more complicated.

In the prior art, the image sensor pixel mostly uses the structure of the circuit schematic shown in fig. 1, and includes a photodiode 101, a charge transfer transistor 102, a reset transistor 103, a source follower transistor 104, a pixel selection transistor 105, and a floating diffusion active region FD. In addition, with the push of the mobile market of mobile phones to the miniaturization requirement of image sensor products, a sharing layout mode is often adopted among pixels; in an image sensor product with small-area pixels, a sharing structure is often adopted between pixels, in which a plurality of photodiodes 101 and charge transfer transistors 102 are connected in parallel and are commonly connected to an FD terminal of a floating diffusion active region, for example, a four-pixel sharing structure disclosed in CN110336953A and a two-pixel sharing structure disclosed in CN 110061026A.

Along with the miniaturization trend of production process, the gate oxide layer and the side wall process of the nMOS charge transfer transistor are thinner and shorter, the electric field between the charge transfer transistor and the drain end (namely, a floating diffusion active region) of the charge transfer transistor is difficult to effectively regulate and control, the problem of grid induced leakage (GIDL) is more practical and novel, and white dot bad pixels are difficult to effectively solve. The image sensor collects white spot bad pixels of an image, and the white spot bad pixels mainly come from two parts: a photodiode 101 and a floating diffusion active region FD. Specifically, the photodiode 101 generates a white-point defective pixel due to pixel signal malfunction caused by channel leakage of the charge transfer transistor 102, and in order to suppress this white-point factor, the gate of the charge transfer transistor 102 is usually set to be under negative bias in the prior art; however, the negatively biased charge transfer transistor 102 is more likely to cause gate induced leakage (GIDL), which causes signal aberration in the floating diffusion active region FD, thereby causing the image pixel to turn white and bright. Especially, the pixels in the shared structure mode and the pixels in the shared layout mode have the defect that an image is easy to have white-point bad pixels, wherein one pixel has a GIDL problem, and then the image signals of all the pixels in the shared structure are represented as an abnormal condition of white and bright.

Fig. 2 shows a schematic cross-sectional view of the device shown in fig. 1, dashed box 100. In fig. 2, the cross-sectional view includes the photodiode 101, the gate oxide layer 201 of the charge transfer transistor 102, the gate polysilicon layer 202 of the charge transfer transistor 102, the floating diffusion active region FD (N + region in fig. 2) being a high concentration N-type impurity ion region, and P-epi (P-type semiconductor silicon substrate). In the normal operation of the image sensor pixel, the N + region of the FD is set to a high voltage state, for example, 2.5V, and the gate polysilicon layer 202 is set to a negative voltage, for example, -2V; a high voltage bias state is formed between the gate polysilicon layer 202 and the N + region of the FD, and the silicon surfaces of the gate oxide layer 201 region and the N + region between the two overlapping regions are in a high electric field intensity state, which easily causes a charge tunneling phenomenon between the gate polysilicon layer 202 and the N + region of the FD, thereby causing the GIDL defect; silicon dangling bonds and defects exist on the silicon surface of the N + region between the overlapping regions, charges tunneled from the grid polycrystalline silicon layer 202 can be captured and released, and the strength of GIDL is further promoted under the action of a high electric field; the strength of GIDL exhibits an exponential growth relationship with the highest electric field strength. In addition, fig. 3 is a TCAD (process computer aided design) simulation data chart of the highest electric field strength and the voltage of the gate polysilicon layer 202 in the device with the structure of fig. 2, and it can be seen from fig. 3 that the more negative the voltage of the gate polysilicon layer 202 is, the higher the highest electric field strength is, and the more obvious GIDL problem is caused by the higher the highest electric field strength.

In view of the above problem, the present invention provides a pixel structure, an image sensor, an electronic device and a manufacturing method, wherein the pixel structure includes: the photoelectric conversion device comprises a semiconductor substrate, a photoelectric conversion region, a floating diffusion region, a transmission control gate electrode and an electric field modulation structure. Through the design of the electric field modulation structure, the electric field formed between the voltage applied to the transmission control gate electrode and the voltage applied to the floating diffusion region can be effectively regulated and controlled; and the electric field intensity of an overlapping area between the transmission control gate electrode and the floating diffusion area can be effectively reduced through the electric field modulation structure, so that the problem of image white spots and bad pixels caused by GIDL is solved.

Fig. 4 is a flow chart of the manufacturing process of the pixel structure of the present invention. Fig. 5-14 and fig. 15-27 show two pixel structures and schematic structural diagrams obtained in steps of the manufacturing process thereof according to the present invention. Fig. 28 (a) -28 (c) show simulation data of a process computer aided design (TCAD) based on the design device structure of the present invention.

The pixel structure and the manufacturing method thereof according to the present invention will be described in detail below with reference to the accompanying drawings.

The first embodiment is as follows:

as shown in fig. 4, the present invention provides a method for manufacturing a pixel structure, wherein the pixel structure provided by the present invention is preferably manufactured by the manufacturing method provided by the present embodiment, and certainly, can also be manufactured by other methods. As shown in fig. 4, the method for manufacturing the pixel structure provided in this embodiment includes the following steps:

s1: providing the semiconductor substrate having the first and second opposing faces;

s2: preparing the electric field modulation structure on the first surface of the semiconductor substrate;

s3: preparing the transmission control gate electrode on the first surface of the semiconductor substrate;

s4: the photoelectric conversion region and the floating diffusion region are prepared in the semiconductor substrate from the first face.

The following describes the method for manufacturing a pixel structure in detail with reference to the accompanying drawings, in which fig. 5 to 14 represent schematic structural diagrams obtained in each step in the manufacturing of the pixel structure of this embodiment. In addition, it should be noted that the above sequence does not strictly represent the preparation sequence of the pixel structure protected by the present invention, and those skilled in the art can change the sequence according to the actual process steps. Fig. 4 only shows a sequence of steps for manufacturing a pixel structure in an example provided by the present invention.

First, as shown in S1 in fig. 4 and fig. 5, a semiconductor substrate 200 having a first face 200a and a second face 200b opposed to each other is provided.

Specifically, the semiconductor substrate 200 may be any structure used in the field of image sensors for preparing various functional regions of an image sensor, such as a photosensitive element and various control transistors of a CMOS image sensor based on the semiconductor substrate 200. The semiconductor substrate 200 may be a structure formed by a single layer of material, including but not limited to a silicon substrate, in which elements in each region are prepared, and may be single crystal silicon, single crystal germanium, polycrystalline silicon, amorphous silicon, or a silicon germanium compound.

In addition, the semiconductor substrate 200 may also be a stacked structure of two or more material layers, each region being prepared in any desired layer thereof. For example, the semiconductor substrate 200 includes a silicon substrate and an epitaxial layer (EPI) formed on the silicon substrate in which the photosensitive elements and the respective control transistors and the like are fabricated, as can a backside illuminated (BSI) image sensor based on the above-described structure. In addition, the semiconductor substrate 200 may be a Silicon On Insulator (SOI). In addition, the semiconductor substrate 200 may also be a structure with N-type doping or P-type doping to meet the functional requirements of the device.

In this embodiment, the semiconductor substrate 200 is selected as a P-epi single crystal material, and the silicon substrate is exposed on the surface.

Next, as shown in S2 of fig. 4 and fig. 6 to 10, the electric field modulation structure 205 is prepared on the first surface 200a of the semiconductor substrate 200. The method comprises the following specific steps:

first, as shown in fig. 6, an electric field modulation structure material layer 201 is formed on the surface of the first surface of the semiconductor substrate 200. The material of the electric field modulation structure material layer 201 includes an oxide, so as to prepare an electric field modulation structure. The oxide may be any one of the material layers formed of the above materials, or may be a stacked structure formed by a single material layer formed of the above materials.

In one example, the electric field modulation structure material layer 201 is formed by a first oxidation process at a temperature of 600 ℃ or higher, which may be, for example, 800 ℃, 900 ℃, 1000 ℃. In addition, the oxidation time length can be adjusted, and an oxide layer with a preset thickness can be manufactured to obtain an electric field modulation structure with a required thickness.

Next, as shown in fig. 7 to 8, a first patterned mask 204 is formed on the electric field modulation structure material layer 201, and the first patterned mask 204 defines a pattern of the electric field modulation structure to be formed subsequently.

In one example, a photoresist layer 203 may be formed on the electric field modulation structure material layer 201, i.e. a photoresist layer is spin-coated for use as a photoresist, as shown in fig. 7; then, the photoresist is exposed and developed, as shown in fig. 8, the photoresist is left only at the position preset for forming the electric field modulation structure, and a first patterned mask 204 is obtained.

Continuing, as shown in fig. 9-10, the electric field modulation structure material layer 201 is etched by a wet etching process based on the first patterned mask 204, so as to obtain an electric field modulation structure 205 on the surface of the first side of the semiconductor substrate 200.

Specifically, the oxide layer is etched by a wet etching method, the unnecessary oxide layer is etched away, and the preset oxide layer is only reserved at the position where the photoresist is present, so as to obtain the electric field modulation structure 205, as shown in fig. 9, the wet etching process is based on, which is beneficial to reducing the surface defects of the electric field modulation structure 205, improving the preparation precision of the electric field modulation structure 205, and being beneficial to modulating the electric field intensity. In addition, the step of removing the residual photoresist is also included after forming the electric field modulation structure 205, as shown in FIG. 10.

Next, as shown in S3 in fig. 4 and fig. 11 to 13, after the electric field modulation structure 205 is formed, the transmission control gate electrode 210 is prepared on the first surface 200a of the semiconductor substrate 200.

Wherein the step of forming the transmission control gate 210 comprises:

first, as shown in fig. 11, after forming the electric field modulation structure 205, a gate dielectric material layer 206 is formed on the first surface of the semiconductor substrate 200, and the material of the gate dielectric material layer 206 may be selected from the existing gate oxide materials, including but not limited to silicon oxide.

In one example, the gate dielectric material layer 206 is formed by a second oxidation process at a temperature of 600 ℃ or higher, which may be, for example, 800 ℃, 900 ℃, 1000 ℃. In addition, the length of the oxidation time can be adjusted, a gate oxide material layer with a preset thickness can be manufactured to obtain a gate oxide layer with a required thickness, and the thickness of the gate oxide layer can be consistent with the technical parameters of the existing process platform. By adopting the above process, it is beneficial to form a high-performance gate oxide layer on the basis of the electric field modulation structure 205 that has already been formed, and meanwhile, the cooperation of the first oxidation process and the second oxidation process forms a good electric field modulation structure between the gate oxide layer and the subsequently formed transmission gate electrode under the condition that the high-performance gate oxide layer is formed in the preparation process of this embodiment.

Next, as shown in fig. 12, a transmission control gate electrode material layer 207 is formed on the gate dielectric material layer 206 and the electric field modulation structure 205. The material layer 207 of the transmission gate electrode can be formed by Physical Vapor Deposition (PVD), chemical Vapor Deposition (CVD), etc., and the material includes, but is not limited to, polysilicon, so as to obtain a subsequent transmission control gate electrode.

Continuing, as shown in fig. 13, the gate electrode material layer 207 and the gate dielectric material layer 206 are etched to form a transmission control gate 210 including a gate dielectric layer (gate oxide layer) 208 and a transmission gate control gate electrode 209 stacked from bottom to top.

Finally, as shown in S4 in fig. 4 and fig. 14, a photoelectric conversion region (PD) 211 and a floating diffusion region (FD) 212 are prepared in the semiconductor substrate 200 from the first face 200a thereof.

Specifically, the photoelectric conversion region (PD) 211 and the floating diffusion region (FD) 212 may be formed by conventional ion implantation processes, for example, n-type ion doping, and conventional processes may be used. In an alternative example, the photoelectric conversion region 211 may form a photodiode. In addition, in other embodiments, a manner of preparing the photoelectric conversion element first and then preparing the transmission control gate may be adopted, and of course, other suitable preparation sequences may also be adopted.

It should be noted that the pixel structure obtained in this embodiment includes: a conductor substrate 200, a photoelectric conversion region 211, a floating diffusion region 212, a transmission control gate electrode 209, and an electric field modulation structure 205, wherein the semiconductor substrate 200 has a first surface 200a and a second surface 200b opposite to each other; the photoelectric conversion region 211 extends from the first surface 200a into the semiconductor substrate 200, and is configured to receive an optical signal to generate an electrical signal; the floating diffusion region 212 extends from the first face 200a into the semiconductor substrate 200 with a space from the photoelectric conversion region 211; the transfer control gate electrode 209 is disposed on the first surface 200a and is correspondingly located between the photoelectric conversion region 211 and the floating diffusion region 212, and it can be understood that there may be an edge of the transfer control gate electrode 209 aligned with an edge of the photoelectric conversion region 211 or the floating diffusion region 212, or an edge of the transfer control gate electrode 209 may be overlapped with both sides to form an effective device channel, so as to realize charge transfer of the image sensor. In addition, the electric field modulation structure 205 is disposed between the transmission control gate electrode 209 and the floating diffusion region 212, and a projection of the electric field modulation structure 205 on the first face 200a has an overlap with a projection of the overlap region on the first face 200a, so that the electric field of the overlap region can be modulated based on the electric field modulation structure, that is, when an electric field is formed between the transmission control gate electrode 209 and the floating diffusion region 212, the electric field can be modulated based on the disposed electric field modulation structure to meet the requirement. When a high potential difference is formed between the gate electrode (the transfer control gate electrode 209) of the charge transfer transistor and the drain electrode (the floating diffusion active region 212) thereof, such as when the gate bias voltage of the charge transfer transistor is negative during exposure of a CIS pixel, the high potential difference can be reduced by the electric field modulation structure 205, thereby reducing gate induced leakage (GIDL), improving the problem of white spots and bad pixels of CIS images, and improving the image quality of the CIS.

As an example, referring to fig. 14, the pixel structure of the present invention includes a transmission control gate 210, the transmission control gate 210 includes a gate dielectric layer 208 and a transmission control gate electrode 209 stacked from bottom to top, wherein the gate dielectric layer 208 is disposed on the surface of the first surface 200a of the semiconductor substrate 200, and the electric field modulation structure 205 is disposed in the transmission control gate electrode 209.

In a further example, the electric field modulation structure 205 extends from the lower surface of the transmission control gate electrode 209 into the transmission control gate electrode 209, and the electric field modulation structure 205 is in contact with the gate dielectric layer 208.

Specifically, it can be understood that the electric field modulation structure 205 is prepared in the transmission control gate electrode 209, in which the electric field modulation structure 205 is disposed on the surface of the gate dielectric layer 208, which is beneficial to improving the effect of electric field modulation, and meanwhile, as shown in fig. 11 to 14, the above arrangement is convenient for the implementation of the process, and improves the overall performance of the device. In addition, in an alternative example, the outer edge of the electric field modulation structure 205 on the side close to the floating diffusion region 212 is aligned with the outer edge of the transmission control gate electrode 209 on the corresponding side. Is beneficial to the improvement of the electric field modulation effect and the implementation of the process.

As an example, as shown in fig. 14, the width w of the electric field modulation structure 205 is 40nm or more; for example, 50nm, 60nm, 80nm, thereby facilitating effective modulation of the electric field in the overlap region.

As an example, the thickness t of the electric field modulation structure 205 is greater than 2nm, for example, 3nm, 4nm, and the upper surface of the electric field modulation structure 205 does not exceed the upper surface of the transmission control gate electrode 209; thereby being beneficial to the performance of the device and optimizing the modulation of the electric field modulation structure on the electric field.

As an example, as shown in fig. 14, the projection of the electric field modulation structure 205 on the first surface 200a at least covers the projection of the overlap region on the first surface, so as to facilitate the modulation effect of the electric field modulation structure, and may improve the GIDL improvement effect.

Example two:

the second embodiment provides another pixel structure and a corresponding manufacturing method, and the second embodiment is different from the first embodiment mainly in the position and the forming process of the electric field modulation structure, and the differences between the first embodiment and the second embodiment will be described in detail below with reference to the drawings, and other related structures and manufacturing methods may refer to the first embodiment, and will not be described again here.

First, as shown in fig. 15, a semiconductor substrate 300 having a first face 300a and a second face 300b opposed to each other is provided;

next, as shown in fig. 16-22, an electric field modulation structure 304 is prepared on the first surface 300a of the semiconductor substrate 300;

the step of forming the electric field modulation structure 304 includes:

as shown in fig. 16-18, a recess 302 is formed in the semiconductor substrate 300 from the first side 300a using a wet etching process; the wet etching process is beneficial to forming an electric field modulation structure with good performance subsequently. The method specifically comprises the following steps: as shown in fig. 16, a trench etching mask layer 301 with a trench pattern opening 301a formed therein is prepared on a first surface of a semiconductor substrate 300, and the trench etching mask layer may be formed by spin-coating a photoresist on the surface of the first surface 300a, exposing and developing the photoresist, and opening the photoresist only at a position preset with an electric field modulation structure; then, as shown in fig. 17, the exposed substrate, such as silicon, is wet etched; next, as shown in fig. 18, the remaining photoresist is removed to obtain a recess 302, and a spare trench is formed.

As shown in fig. 19-22, an electric field modulation structure 304 is fabricated within the recess 302; the method specifically comprises the following steps: as shown in fig. 19, an electric field modulation structure material layer 303 is formed on the first surface of the semiconductor substrate in and around the groove 302, including the portion formed in the groove 302, as an electric field modulation structure 304 to be formed; the electric field modulation structure material layer 303 may be formed by a third oxidation process, where the temperature of the third oxidation process is greater than or equal to 600 ℃, for example, 800 ℃, 900 ℃, 1000 ℃; then, as shown in fig. 20, a second patterned mask 305 is formed on the electric field modulation structure material layer 303, and the second patterned mask 305 defines a pattern of the electric field modulation structure 304, that is, a material layer portion in the groove; next, as shown in fig. 21 to 22, the electric field modulation structure material layer 303 around the groove 302 is removed based on the second patterned mask 305 through a wet etching process to obtain the electric field modulation structure 304 formed in the groove 302, and the wet etching process is favorable for forming a device structure with good performance subsequently.

Next, as shown in fig. 23 to 25, the transfer control gate electrode 309 is prepared on the first face 300a of the semiconductor substrate 300; further, the pixel structure of this embodiment includes a transmission control gate 310, where the transmission control gate 310 includes a gate dielectric layer 308 and a transmission control gate electrode 309 stacked from bottom to top, and the specific forming steps include:

as shown in fig. 23, after forming the electric field modulation structure 304, a gate dielectric material layer 306 is formed on the first side of the semiconductor substrate 300; the gate dielectric material layer may be formed through a fourth oxidation process, where the temperature of the fourth oxidation process is greater than or equal to 600 ℃, for example, 800 ℃, 900 ℃, 1000 ℃; the length of the oxidation time can be adjusted, a gate oxide material layer with a preset thickness can be manufactured to obtain a gate oxide layer with a required thickness, and the thickness of the gate oxide layer can be consistent with the technical parameters of the existing process platform. By adopting the process, a high-performance gate oxide layer can be formed on the basis of the formed electric field modulation structure 304, and the gate oxide layer is formed under the transmission control gate electrode and is in contact with the electric field modulation structure; meanwhile, due to the cooperation of the first oxidation process and the second oxidation process, in the preparation process of the embodiment, under the condition that the high-performance gate oxide layer is formed, a good electric field modulation structure is formed between the gate oxide layer and the subsequently formed transmission gate electrode; then, as shown in fig. 24, a transfer control gate electrode material layer 307 is formed on the gate dielectric material layer 306; continuing, as shown in fig. 25, the gate electrode material layer 307 and the gate dielectric material layer 306 are etched to form a gate dielectric layer 308 and a transmission gate control gate electrode 309 stacked from bottom to top, so as to obtain a transmission control gate 310.

Finally, as shown in fig. 26, the photoelectric conversion region PD and the floating diffusion region FD are prepared in the semiconductor substrate from the first side.

It should be noted that, in this embodiment, the electric field modulation structure 304 extends from the first surface 300a of the semiconductor substrate into the floating diffusion region 312, and the electric field modulation structure 304 does not extend beyond the lower surface of the floating diffusion region 312.

As an example, as shown in fig. 26, the electric field modulation structure 304 further extends into a device channel under the transfer gate electrode 309, that is, the device channel formed by the transfer control gate 310, and charges in the photoelectric conversion region are transferred to the floating diffusion region based on the channel, so as to form the electric field modulation structure 304 including the channel modulation part 304a and the body modulation part 304b, wherein the channel modulation part 304a is located in the device channel, the body modulation part 304b is located in the floating diffusion region 312, and the electric field modulation structure extends into the channel beyond the floating diffusion region 312, which may further contribute to improving the electric field modulation effect and the overall performance of the device.

As an example, the width d1 of the channel modulation section 304a is 20nm or more, e.g., 25nm, 30nm; the width d2 of the main body modulation section 304b is not less than 20nm, for example, 25nm or 30nm; the whole is beneficial to improving the performance of the device.

By way of example, the thickness of the electric field modulation structure 304 is greater than 2nm, such as may be 3nm, 4nm, etc.

As an example, the outer edge of the electric field modulation structure 304 on the side away from the transmission control gate electrode 309 exceeds the outer edge of the transmission control gate electrode 309 on the corresponding side, such as the right edge of the charge modulation structure 304 exceeds the right edge of the transmission control gate electrode 309 in fig. 14, i.e. the right edge of the charge modulation structure 304 exceeds the right edge of the transmission control gate 310.

The floating diffusion region 312 illustratively includes a doped drain (LDD) region 312a and a body doped region 312b extending sequentially down from the first side of the semiconductor substrate, as shown in fig. 27, where the dashed-dotted line simply illustrates the region of the lightly doped drain LDD, which can be any lightly doped drain LDD region formed in the prior art, as will be understood by those skilled in the art, in which case the bottom surface of the electric field modulation structure 304 extends beyond the outer edge of the corresponding doped drain 312 a. That is, as shown in fig. 27, the electric field modulation structure 304 extends toward the channel direction to cover the shallow doped drain region at the corresponding position, thereby being beneficial to the realization of the function of the device itself and the improvement of the electric field modulation effect of the electric field modulation structure.

Example three:

a third embodiment provides an image sensor, which includes the pixel structure according to any aspect of the present invention, for example, the pixel structure according to any one of the first embodiment and the second embodiment. The utility model discloses an image sensor can CMOS image sensor. In addition, this embodiment still provides an electronic equipment, includes like the utility model discloses an arbitrary scheme the image sensor. The electronic equipment can be equipment such as a security camera device, an automobile electronic camera device, a mobile phone camera device, an unmanned aerial vehicle, machine vision and an existing camera.

To sum up, the present invention provides a pixel structure, an image sensor, and an electronic device, wherein, in the pixel structure design of the present invention, an electric field modulation structure is formed between a transmission control gate electrode and a floating diffusion region, and an electric field formed between the transmission control gate electrode and the floating diffusion region can be modulated based on the set electric field modulation structure; in addition, when a high potential difference is formed between the grid electrode of the charge transfer transistor and the floating diffusion active region, the electric field intensity of an overlapped region of the grid electrode and the floating diffusion active region can be reduced or lowered, so that grid induced leakage (GIDL) is reduced, the problem of white point and bad pixels of a CIS image is solved, and the image quality of the CIS is improved. Therefore, the utility model effectively overcomes various defects in the prior art and has high industrial utilization value.

The above embodiments are merely illustrative of the principles and effects of the present invention, and are not to be construed as limiting the invention. Modifications and variations can be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which may be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (11)

1. A pixel structure, comprising:

a semiconductor substrate having a first surface and a second surface opposite to each other;

the photoelectric conversion region extends into the semiconductor substrate from the first surface and is used for receiving an optical signal to generate an electrical signal;

a floating diffusion region extending from the first face into the semiconductor substrate and having a spacing from the photoelectric conversion region; a transfer control gate electrode disposed on the first face and corresponding between the photoelectric conversion region and the floating diffusion region and having an overlapping area with at least the floating diffusion region to transfer an electrical signal of the photoelectric conversion region to the floating diffusion region based on the transfer control gate electrode;

and the electric field modulation structure is arranged between the transmission control gate electrode and the floating diffusion region, and the projection of the electric field modulation structure on the first surface has overlap with the projection of the overlapping region on the first surface.

2. The pixel structure of claim 1, wherein the pixel structure comprises a transmission control gate comprising a gate dielectric layer and a transmission control gate electrode stacked from bottom to top, wherein the gate dielectric layer is disposed on the first surface of the semiconductor substrate, and the electric field modulation structure is disposed in the transmission control gate electrode.

3. The pixel structure of claim 2, wherein the electric field modulation structure extends from a lower surface of the transmission control gate electrode into the transmission control gate electrode, and the electric field modulation structure is in contact with the gate dielectric layer.

4. The pixel structure of claim 2, wherein the width of the electric field modulation structure is greater than or equal to 40nm; and/or the thickness of the electric field modulation structure is more than 2nm, and the upper surface of the electric field modulation structure does not exceed the upper surface of the transmission control gate electrode; and/or the outer edge of one side of the electric field modulation structure, which is close to the floating diffusion region, is aligned with the outer edge of the transmission control gate electrode on the corresponding side; and/or the material of the electric field modulation structure comprises an oxide, wherein the oxide comprises silicon dioxide, hafnium oxide, aluminum oxide, tantalum oxide or silicon oxynitride.

5. The pixel structure of claim 1, wherein the electric field modulation structure extends from the first side of the semiconductor substrate into the floating diffusion region, and the electric field modulation structure does not extend beyond a lower surface of the floating diffusion region.

6. The pixel structure of claim 5, wherein the electric field modulation structure further extends into a device channel under the transfer control gate electrode to form the electric field modulation structure comprising a channel modulation portion and a body modulation portion, wherein the channel modulation portion is in the device channel and the body modulation portion is in the floating diffusion region.

7. The pixel structure according to claim 6, wherein a width of the channel modulation portion is 20nm or more, and a width of the body modulation portion is 20nm or more; and/or the thickness of the electric field modulation structure is more than 2nm; and/or the outer edge of one side of the electric field modulation structure, which is far away from the transmission control gate electrode, exceeds the outer edge of the transmission control gate electrode on the corresponding side; and/or the material of the electric field modulation structure comprises an oxide, wherein the oxide comprises silicon dioxide, hafnium oxide, aluminum oxide, tantalum oxide or silicon oxynitride; and/or the pixel structure further comprises a gate dielectric layer which is formed below the transmission control gate electrode and is in contact with the electric field modulation structure.

8. The pixel structure of claim 5, wherein the floating diffusion region comprises a doped drain region and a body doped region extending downward from the first surface of the semiconductor substrate, and a lower surface of the electric field modulation structure extends beyond an outer edge of the doped drain region at a corresponding position.

9. A pixel structure according to any one of claims 1-8, wherein a projection of the electric field modulation structure onto the first face at least overlaps a projection of the overlap region onto the first face.

10. An image sensor comprising a pixel structure according to any one of claims 1 to 9.

11. An electronic device characterized by comprising the image sensor of claim 10.

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