CN116722083A - Preparation method of high-radiation light-emitting diode and light-emitting diode - Google Patents

Preparation method of high-radiation light-emitting diode and light-emitting diode Download PDF

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CN116722083A
CN116722083A CN202310443745.4A CN202310443745A CN116722083A CN 116722083 A CN116722083 A CN 116722083A CN 202310443745 A CN202310443745 A CN 202310443745A CN 116722083 A CN116722083 A CN 116722083A
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layer
barrier layer
doped
quantum well
deposited
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舒俊
程龙
高虹
郑文杰
印从飞
程金连
张彩霞
刘春杨
胡加辉
金从龙
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Jiangxi Zhao Chi Semiconductor Co Ltd
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Jiangxi Zhao Chi Semiconductor Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Manufacturing & Machinery (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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Abstract

The application provides a preparation method of a high-radiation light-emitting diode and the light-emitting diode, wherein the preparation method comprises the following steps: providing a substrate; sequentially depositing a buffer layer, an N-type GaN layer, a low-temperature stress release layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer on a substrate; wherein the multiple quantum well layer comprises In deposited on the low temperature stress release layer In a first period x Ga 1‑x N quantum well layer and In y Ga 1‑y N superlattice quantum barrier layer, x > y, in y Ga 1‑y The N superlattice quantum barrier layer comprises a Mg-doped first barrier layer and a second barrier layer which are deposited in a second period in a crossing manner, wherein the Mg-doped first barrier layer is formed by adopting a 3D mode deposition, and the second barrier layer is formed by adopting a 2D mode deposition. The LED provided by the application can weaken energy bands caused by polarization effect in the multiple quantum well layersAnd the tilting phenomenon improves the quality of the light-emitting diode.

Description

Preparation method of high-radiation light-emitting diode and light-emitting diode
Technical Field
The application relates to the technical field of photoelectricity, in particular to a preparation method of a high-radiation light-emitting diode and the light-emitting diode.
Background
Light emitting diodes (Light Emitting Diode) are simply referred to as LEDs, which have been attracting great attention in recent years as a new energy-saving and environment-friendly light source, and various types of LEDs are widely used in the fields of indication, display, backlight, projection, etc. many countries consider LED-related semiconductor illumination as a strategic technique.
These achievements achieved by semiconductor illumination mainly benefit from the progress of GaN-based LED related technologies, however, for InGaN-based long wavelength LEDs, since GaN-based semiconductor materials have strong spontaneous polarization and piezoelectric polarization phenomena, a large built-in electric field is formed in InGaN/GaN multiple quantum well regions, and this polarization electric field causes the energy band of InGaN/GaN multiple quantum wells to be changed from flat band to tilt, so that electrons and holes are spatially separated, and overlapping of electron-hole wave functions is reduced, thereby prolonging carrier radiation lifetime, reducing internal quantum efficiency, and further resulting in reduced light emission efficiency.
Disclosure of Invention
Based on the above, the present application is directed to a method for manufacturing a high-emissivity light emitting diode and a light emitting diode, so as to solve the problems in the prior art.
In one aspect, the present application provides a method for preparing a high-emissivity light emitting diode, comprising the steps of:
providing a substrate;
sequentially depositing a buffer layer, an N-type GaN layer, a low-temperature stress release layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer on the substrate;
wherein the multiple quantum well layer comprises In deposited on the low temperature stress release layer In a first period x Ga 1-x N quantum well layer and In y Ga 1-y An N superlattice quantum barrier layer, x > y, the In y Ga 1-y The N superlattice quantum barrier layer comprises a Mg-doped first barrier layer and a second barrier layer which are deposited in a second period in a crossing manner, wherein the Mg-doped first barrier layer is formed by adopting a 3D mode deposition, and the second barrier layer is formed by adopting a 2D mode deposition.
The beneficial effects of the application are as follows: the application provides a preparation method of a high-emissivity light-emitting diode, a deposited multiple quantum well layer comprises In which is deposited on a low-temperature stress release layer In a crossed manner according to a first period x Ga 1-x N quantum well layer and In y Ga 1-y N superlattice quantum barrier layer, x > y, in y Ga 1-y The N superlattice quantum barrier layer comprises a Mg-doped first barrier layer and a second barrier layer which are deposited in a second cycle in a crossing manner, wherein the Mg-doped first barrier layer is formed by adopting a 3D mode to deposit, a plurality of irregular bulges are formed on the surface of the Mg-doped first barrier layer which is deposited in a 3D mode, so that the stress on the quantum well layer can be released, mg elements are doped, the atomic radius of Mg is smaller than that of Ga, the stress borne by the quantum well layer can be further reduced, the energy band inclination phenomenon caused by polarization effect in the multi-quantum well layer is weakened, further, the Mg elements can be doped to provide holes for radiation recombination of the quantum well layer, the hole shortage phenomenon in the multi-quantum well layer is improved, and the luminous efficiency of the light emitting diode is further improved. Still further, the second barrier layer is formed by adopting 2D mode deposition, the surface of the second barrier layer formed by adopting 2D deposition is flat, forward growth of the epitaxial layer is facilitated, deflection in the growth process of the epitaxial layer is reduced, the quality of the diode is improved, and the stress on the quantum well layer is further released by doping the first barrier layer and the second barrier layer with Mg deposited in a second period in a crossing manner.
Preferably, in the x Ga 1-x In the N quantum well layer, x is more than or equal to 0.05 and less than or equal to 0.55, and In is as follows y Ga 1-y In the N superlattice quantum barrier layer, y is more than or equal to 0 and less than or equal to 0.25.
Preferably, the thickness of the Mg-doped first barrier layer is 0.2nm-1nm, and the thickness of the second barrier layer is 0.5nm-5nm.
Preferably, the thickness ratio of the Mg-doped first barrier layer to the second barrier layer is 1:2.5-1:5.
Preferably, the first period is 4-16, and the second period is 2-10.
Preferably, the In is deposited x Ga 1-x The thickness of the N quantum well layer is 2nm-6nm, and the thickness of the superlattice quantum barrier layer is 7nm-15nm.
Preferably, the doping concentration of Mg in the Mg-doped first barrier layer is 1×10 12 atoms/cm 3 -5*10 18 atoms/cm 3
Preferably, the temperature at which the Mg doped first barrier layer is deposited is 20 ℃ to 50 ℃ lower than the temperature at which the second barrier layer is deposited.
Preferably, the ratio of the flow rate of Ga when depositing the Mg-doped first InGaN barrier layer to the flow rate of Ga when depositing the second InGaN barrier layer is 0.5-0.8:1.
The application also provides a light-emitting diode prepared by the preparation method of the high-emissivity light-emitting diode, the light-emitting diode comprises a substrate, and a buffer layer, an N-type GaN layer, a low-temperature stress release layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially deposited on the substrate, wherein the multiple quantum well layer comprises In which is deposited on the low-temperature stress release layer In a crossing manner according to a first period x Ga 1-x N quantum well layer and In y Ga 1-y An N superlattice quantum barrier layer, x > y, the In y Ga 1-y The N-superlattice quantum barrier layer includes Mg doped first and second barrier layers deposited alternately at a second period.
Additional aspects and advantages of the application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.
Drawings
FIG. 1 is a flow chart of a method for manufacturing a light emitting diode according to the present application;
fig. 2 is a schematic diagram of a light emitting diode structure according to the present application.
Description of main reference numerals:
substrate and method for manufacturing the same 10 Buffer layer 20
N-type GaN layer 30 Low temperature stress relief layer 40
Multiple quantum well layer 50 In x Ga 1-x N quantum well layer 51
Superlattice quantum barrier layer 52 Mg doped first barrier layer 521
Second barrier layer 522 Electron blocking layer 60
P-type GaN layer 70
The application will be further described in the following detailed description in conjunction with the above-described figures.
Detailed Description
In order that the application may be readily understood, a more complete description of the application will be rendered by reference to the appended drawings. Several embodiments of the application are presented in the figures. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
The application provides a preparation method of a high-radiation light-emitting diode, which comprises the following steps: providing a substrate; in turnDepositing a buffer layer, an N-type GaN layer, a low-temperature stress release layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer on a substrate; the deposited multiple quantum well layer comprises In deposited on the low temperature stress release layer In a first period crossing manner x Ga 1-x N quantum well layer and In y Ga 1-y N superlattice quantum barrier layer, x > y, in y Ga 1-y The N superlattice quantum barrier layer comprises a Mg-doped first barrier layer and a second barrier layer which are deposited in a second cycle in a crossing manner, wherein the Mg-doped first barrier layer is formed by adopting a 3D mode to deposit, a plurality of irregular bulges are formed on the surface of the Mg-doped first barrier layer which is deposited in a 3D mode, so that the stress on the quantum well layer can be released, mg elements are doped, the atomic radius of Mg is smaller than that of Ga, the stress borne by the quantum well layer can be further reduced, the energy band inclination phenomenon caused by polarization effect in the multi-quantum well layer is weakened, further, the Mg elements can be doped to provide holes for radiation recombination of the quantum well layer, the hole shortage phenomenon in the multi-quantum well layer is improved, and the luminous efficiency of the light emitting diode is further improved. Still further, the second barrier layer is formed by adopting 2D mode deposition, the surface of the second barrier layer formed by adopting 2D deposition is flat, forward growth of the epitaxial layer is facilitated, deflection in the growth process of the epitaxial layer is reduced, the quality of the diode is improved, and the stress on the quantum well layer is further released by doping the first barrier layer and the second barrier layer with Mg deposited in a second period in a crossing manner.
Referring to fig. 1, a method for manufacturing a high-emissivity light emitting diode according to an embodiment of the application, specifically, the method for manufacturing a light emitting diode according to the application includes steps S10-S80.
Step S10, providing a substrate;
specifically, the substrate can be sapphire substrate or SiO 2 One of a sapphire composite substrate, a silicon carbide substrate, a gallium nitride substrate and a zinc oxide substrate. The sapphire substrate has the greatest advantages of mature technology, good stability and low production cost. Therefore, in this embodiment mode, sapphire is used as a substrate.
Step S20, depositing a buffer layer on a substrate;
specifically, physical vapor deposition (Physical Vapor Deposition, PVD) can be adopted to deposit a buffer layer on the substrate, the thickness of the buffer layer is 10nm-15nm, in the embodiment, alN buffer layer is adopted to control the crystal defect of the substrate, the quality of the subsequently grown crystal is improved, and the stress between the substrate and the epitaxial layer caused by lattice mismatch and thermal mismatch is relieved.
Step S30, preprocessing the substrate on which the buffer layer is deposited.
Specifically, the sapphire substrate on which the buffer layer has been deposited is transferred to a medium-micro A7 Metal organic vapor deposition (MOCVD for Metal-organic Chemical Vapor Deposition) equipment, in which high purity H can be used 2 (Hydrogen), high purity N 2 (Nitrogen) high purity H 2 And high purity N 2 Is used as carrier gas, high-purity NH 3 As N source, trimethylgallium (TMGa) and triethylgallium (TEGa) as gallium source, trimethylindium (TMIn) as indium source, trimethylaluminum (TMAL) as aluminum source, silane (SiH) 4 ) As an N-type dopant, magnesium-bis-cyclopentadienyl (CP 2 Mg) was epitaxially grown as a P-type dopant.
Specifically, the substrate on which the buffer layer has been deposited is subjected to a process of H 2 The atmosphere is treated for 2-8 min, the treatment temperature is 900-1100 ℃, and then nitriding treatment is carried out on the GaN epitaxial layer, so that the crystal quality of the buffer layer is improved, and the crystal quality of a subsequent deposited GaN epitaxial layer can be effectively improved.
Step S40, depositing an N-type GaN layer on the buffer layer.
Specifically, after nitriding the substrate on which the buffer layer is deposited, continuously depositing an N-type GaN layer in the MOCVD equipment, wherein the N-type GaN layer can be doped with Si, and the concentration of doped Si in the N-type GaN layer doped with Si can be 2×10 18 -7.5*10 19 atoms/cm 3 The impurity Si is doped in the GaN layer, sufficient electrons can be provided for LED luminescence, the electrons of the N-type GaN layer and holes in the multiple quantum well layer are subjected to radiation recombination, luminescence is carried out, and the more the electrons and the holes are subjected to radiation recombination, the better the luminescence effect of the LED is.
And S50, depositing a low-temperature stress release layer on the N-type GaN layer.
Specifically, after the N-type GaN layer is deposited, a low-temperature stress release layer is continuously deposited on the N-type GaN layer, and the low-temperature stress release layer can reduce the stress of the N-type GaN layer conducted onto the multiple quantum well layers.
Step S60, depositing a multiple quantum well layer on the low temperature stress release layer.
Specifically, the multi-quantum well layer is continuously deposited In the MOCVD equipment, and comprises In which is deposited on the low-temperature stress release layer In a crossed manner according to the first period x Ga 1-x N quantum well layer and In y Ga 1-y N superlattice quantum barrier layers, x > y, i.e. In x Ga 1-x The content of In component In the N quantum well layer is greater than In y Ga 1-y Content of In component In N superlattice quantum barrier layer, further, in y Ga 1-y The N superlattice quantum barrier layer comprises a Mg-doped first barrier layer and a second barrier layer which are deposited in a second cycle in a crossing manner, wherein the Mg-doped first barrier layer is formed by adopting a 3D mode to deposit, a plurality of irregular bulges are formed on the surface of the Mg-doped first barrier layer which is deposited in a 3D mode, so that the stress on the quantum well layer can be released, mg elements are doped, the atomic radius of Mg is smaller than that of Ga, the stress borne by the quantum well layer can be further reduced, the energy band inclination phenomenon caused by polarization effect in the multi-quantum well layer is weakened, further, the Mg elements can be doped to provide holes for radiation recombination of the quantum well layer, the hole shortage phenomenon in the multi-quantum well layer is improved, and the luminous efficiency of the light emitting diode is further improved. Still further, the second barrier layer is formed by adopting 2D mode deposition, the surface of the second barrier layer formed by adopting 2D deposition is flat, forward growth of the epitaxial layer is facilitated, deflection in the growth process of the epitaxial layer is reduced, the quality of the diode is improved, and the stress on the quantum well layer is further released by doping the first barrier layer and the second barrier layer with Mg deposited in a second period in a crossing manner.
Specifically, in the present embodiment, in x Ga 1-x In the N quantum well layer, x is more than or equal to 0.05 and less than or equal to 0.55, in y Ga 1-y In the N superlattice quantum barrier layer, y is more than or equal to 0 and less than or equal to 0.55, and In x Ga 1-x The content of In component of the N quantum well layer is always larger than In y Ga 1-y The content of In component In the N superlattice quantum barrier layer is preferablyIn y Ga 1-y In the N superlattice quantum barrier layer, the thickness of Mg doped first barrier layer monolayer deposition is 0.2nm-1nm, and the thickness of second barrier layer monolayer deposition is 0.5nm-5nm. Specifically, the thickness ratio of the deposited Mg-doped first barrier layer to the deposited Mg-doped second barrier layer is 1:2.5-1:1.5, preferably, the thickness ratio of the deposited Mg-doped first barrier layer to the deposited Mg-doped second barrier layer is 1:3, and the Mg doping concentration in the Mg-doped first barrier layer is 1 x 10 12 atoms/cm 3 -5*10 18 atoms/cm 3 In alternately deposited on low temperature stress relief layer x Ga 1-x N quantum well layer and In y Ga 1-y The period of the N superlattice quantum barrier layer is 4-16.In (In) x Ga 1-x The thickness of the N quantum well layer monolayer is 2nm-6nm; cross-depositing In formed by doping Mg with first barrier layer and second barrier layer y Ga 1-y The period of the N superlattice quantum barrier layer is 2-10, and the thickness of the superlattice quantum barrier layer formed by periodical cross deposition is 7-15 nm.
Further, in the MOCVD apparatus, trimethylgallium (TMGa) and triethylgallium (TEGa) are used as Ga sources, and the ratio of the Ga flux when Mg is doped with the first InGaN barrier layer to the Ga flux when the second InGaN barrier layer is deposited is 0.5-0.8:1. The temperature for depositing the Mg-doped first barrier layer is 20-50 ℃ lower than the temperature for depositing the second barrier layer; the growth atmosphere for depositing the Mg-doped first InGaN barrier layer and the second InGaN barrier layer is N 2 /H 2 /NH 3 Is mixed with N in the mixed gas 2 /H 2 /NH 3 The ratio of (2) can be controlled according to the actual requirement, and N is N when Mg is doped with the first InGaN barrier layer and the second InGaN barrier layer 2 /H 2 /NH 3 The flow rate of the mixed gas is uniform.
Step S70, depositing an electron blocking layer on the multiple quantum well layer.
Specifically, the electron blocking layer is an AlInGaN layer, the thickness of the electron blocking layer is 15-40 nm, the growth deposition temperature is 950-1100 ℃, the pressure is 150-300 torr, preferably, the thickness of the electron blocking layer is 25nm, the growth deposition temperature is 1000 ℃, and the pressure is 250torr. The electron blocking layer can not only effectively limit electron overflow, but also reduce blocking of holes, improve injection efficiency of holes to the quantum well, reduce carrier auger recombination, and improve luminous efficiency of the light emitting diode.
In step S80, a P-type GaN layer is deposited on the electron blocking layer.
Specifically, the P-type GaN layer mainly functions to provide holes to the multiple quantum well layer, so that electrons and holes are radiative-recombined in the multiple quantum well layer to emit light. The growth temperature of the P-type GaN layer is 850-1050 ℃, the thickness is 15-40 nm, the growth pressure is 150-500 torr, mg is adopted for doping, and the doping concentration is 2 x 10 19 ~8*10 20 atoms/cm 3 Too high a Mg doping concentration can damage crystal quality, while too low a doping concentration can affect hole concentration. Preferably, the growth temperature of the P-type GaN layer is 955 ℃, the thickness is 20nm, the growth pressure is 300torr, and the Mg doping concentration is 3-10 20 atoms/cm 3
Referring to fig. 2, in order to provide a light emitting diode according to an embodiment of the present application, the light emitting diode is manufactured by the above-mentioned method for manufacturing a high-emissivity light emitting diode, and specifically, the light emitting diode includes: a substrate 10, and a buffer layer 20, an N-type GaN layer 30, a low temperature stress release layer 40, a multiple quantum well layer 50, an electron blocking layer 60, and a P-type GaN layer 70 sequentially deposited on the substrate, wherein the multiple quantum well layer 50 is cross-deposited In a first cycle on the low temperature stress release layer 40 x Ga 1-x N quantum well layer 51 and In y Ga 1-y N-superlattice quantum barrier layer 52, x > y, preferably with a first period of 4-16, in y Ga 1-y The N-superlattice quantum barrier layer 52 includes Mg doped first barrier layers and 521 second barrier layers 522 deposited alternately at a second period, preferably 2-10, in x Ga 1-x In the N quantum well layer 51, x is 0.05.ltoreq.x.ltoreq.0.55, in y Ga 1-y In the N superlattice quantum barrier layer, y is more than or equal to 0 and less than or equal to 0.55.
Specifically, the substrate 10 may be a sapphire substrate or SiO 2 One of a sapphire composite substrate, a silicon carbide substrate, a gallium nitride substrate and a zinc oxide substrate. The sapphire substrate has the greatest advantages of mature technology, good stability and low production cost, so that sapphire is selected as the substrate in the embodiment. And a buffer layer. However, the sapphire substrate surface has major defects, which followSince the epitaxial layer is easily grown into the active layer to affect the light emitting effect, it is generally necessary to deposit a buffer layer 20 on the surface of the substrate, for example, an AlN buffer layer may be used, the thickness of the buffer layer 20 is 10-15nm, and defects on the surface of the substrate 10 are reduced to extend toward the epitaxial layer when the epitaxial layer is grown on the surface of the substrate.
The N-type GaN layer 30 is deposited on the buffer layer 20, and may be doped with Si, where the N-type GaN layer 30 is mainly used to provide enough electrons for LED light emission and make the electrons smoothly move to the multiple quantum well layer to perform radiative recombination with holes in the multiple quantum well layer; further reducing the defect of the crystal can improve the quality of the crystal, and providing enough electrons to be combined with holes in the multiple quantum well layer can effectively improve the overall luminous efficiency of the LED. A low temperature stress relief layer 40 is deposited on the N-type GaN layer 30, the low temperature stress relief layer 40 may reduce stress of the N-type GaN layer 30 conducted onto the multiple quantum well layer 50.
The multiple quantum well layer 50 is deposited on the low temperature stress release layer 40, and is an electron and hole radiation recombination region, and the reasonable structural design can significantly increase the overlapping degree of the electron and hole wave functions, so that the luminous efficiency of the LED device is improved. Specifically, in the present embodiment, the multiple quantum well layer 50 includes In x Ga 1-x N quantum well layer 51 and In y Ga 1-y An N-superlattice quantum barrier layer 52.In (In) x Ga 1-x The thickness of the N quantum well layer 51 is 2nm-6nm, and the thickness of the superlattice quantum barrier layer 52 is 7nm-15nm. Further, the thickness of the Mg doped first barrier layer 521 is 0.2nm to 1nm, the thickness of the second barrier layer 522 is 0.5nm to 5nm, and preferably, the thickness ratio of the Mg doped first barrier layer 521 to the second barrier layer 522 is 1:2.5 to 1:1.5. In the Mg doped first barrier layer 521, the Mg doping concentration is 1×10 12 atoms/cm 3 -5*10 18 atoms/cm 3
The electron blocking layer 60 is an AlInGaN layer with the thickness of 15-40 nm; the electron blocking layer can not only effectively limit electron overflow, but also reduce blocking of holes, improve injection efficiency of holes into the quantum well, reduce carrier auger recombination, and improve luminous efficiency of the light emitting diode, and the P-type GaN layer 70 mainly acts as multiple quantumThe well layer provides holes with the thickness of 10-50 nm, and can be doped by adopting Mg with the doping concentration of 2 x 10 19 ~8*10 20 atoms/cm 3
Example 1
In this embodiment, sapphire is used as the substrate. In x Ga 1-x In the N quantum well layer, x is 0.05, in y Ga 1-y Y in the N superlattice quantum barrier layer is 0.In (In) x Ga 1-x The thickness of the N quantum well layer is 2nm, the thickness of the Mg doped first barrier layer is 0.2nm, the thickness of the second barrier layer is 0.5nm, the first period is 8, the second period is 10, and the doping concentration of Mg in the Mg doped first barrier layer is 2 x 10 18 atoms/cm 3 The temperature of the Mg-doped first barrier layer is 30 ℃ lower than the temperature of the second barrier layer, and the ratio of the Ga flux when the Mg-doped first InGaN barrier layer is deposited to the Ga flux when the second InGaN barrier layer is deposited is 0.6:1.
Example 2
The light emitting diode In this embodiment is different from the light emitting diode In embodiment 1 In that In x Ga 1-x In the N quantum well layer, x is 0.5, in y Ga 1-y Y in the N superlattice quantum barrier layer is 0.2.In (In) x Ga 1-x The thickness of the N quantum well layer is 4nm, the thickness of the Mg doped first barrier layer is 0.3nm, the thickness of the second barrier layer is 0.9nm, the first period is 4, the second period is 8, and the doping concentration of Mg in the Mg doped first barrier layer is 1 x 10 12 atoms/cm 3 The temperature of the Mg-doped first barrier layer is 20 ℃ lower than the temperature of the second barrier layer, and the ratio of the Ga flux when the Mg-doped first InGaN barrier layer is deposited to the Ga flux when the second InGaN barrier layer is deposited is 0.5:1.
Example 3
The light emitting diode In this embodiment is different from the light emitting diode In embodiment 1 In that In x Ga 1-x In the N quantum well layer, x is 0.55, in y Ga 1-y Y in the N superlattice quantum barrier layer is 0.15.In (In) x Ga 1-x The thickness of the N quantum well layer is 6nm, the thickness of the Mg doped first barrier layer is 1nm, and the thickness of the second barrier layerAt 5nm, the first period is 10, the second period is 2, and the doping concentration of Mg in the Mg-doped first barrier layer is 5×10 16 atoms/cm 3 The temperature of the Mg-doped first barrier layer is 40 ℃ lower than the temperature of the second barrier layer, and the ratio of the Ga flux when the Mg-doped first InGaN barrier layer is deposited to the Ga flux when the second InGaN barrier layer is deposited is 0.75:1.
Example 4
The light emitting diode In this embodiment is different from the light emitting diode In embodiment 1 In that In x Ga 1-x In the N quantum well layer, x is 0.45, in y Ga 1-y Y in the N superlattice quantum barrier layer is 0.25.In (In) x Ga 1-x The thickness of the N quantum well layer is 5nm, the thickness of the Mg doped first barrier layer is 0.6nm, the thickness of the second barrier layer is 2.5nm, the first period is 8, the second period is 3, and the doping concentration of Mg in the Mg doped first barrier layer is 3 x 10 18 atoms/cm 3 The temperature of the Mg-doped first barrier layer is 50 ℃ lower than the temperature of the second barrier layer, and the ratio of the Ga flux when the Mg-doped first InGaN barrier layer is deposited to the Ga flux when the second InGaN barrier layer is deposited is 0.8:1.
Example 5
The light emitting diode In this embodiment is different from the light emitting diode In embodiment 1 In that In x Ga 1-x In the N quantum well layer, x is 0.4, in y Ga 1-y Y in the N superlattice quantum barrier layer is 0.1.In (In) x Ga 1-x The thickness of the N quantum well layer is 4nm, the thickness of the Mg doped first barrier layer is 0.4nm, the thickness of the second barrier layer is 1nm, the first period is 8, the second period is 6, and the doping concentration of Mg in the Mg doped first barrier layer is 1 x 10 18 atoms/cm 3 The temperature of depositing the Mg-doped first barrier layer is 35 ℃ lower than the temperature of depositing the second barrier layer, and the ratio of the flow rate of Ga when depositing the Mg-doped first InGaN barrier layer to the flow rate of Ga when depositing the second InGaN barrier layer is 0.7:1.
Example 6
The light emitting diode In this embodiment is different from the light emitting diode In embodiment 1 In that In x Ga 1-x N quantum well layerWherein x is 0.25, in y Ga 1-y Y in the N superlattice quantum barrier layer is 0.1.In (In) x Ga 1-x The thickness of the N quantum well layer is 3nm, the thickness of the Mg doped first barrier layer is 0.8nm, the thickness of the second barrier layer is 2.5nm, the first period is 7, the second period is 3, and the doping concentration of Mg in the Mg doped first barrier layer is 5 x 10 18 atoms/cm 3 The temperature of the Mg-doped first barrier layer is 30 ℃ lower than the temperature of the second barrier layer, and the ratio of the Ga flux when the Mg-doped first InGaN barrier layer is deposited to the Ga flux when the second InGaN barrier layer is deposited is 0.65:1.
Example 7
The light emitting diode In this embodiment is different from the light emitting diode In embodiment 1 In that In x Ga 1-x In the N quantum well layer, x is 0.35, in y Ga 1-y Y in the N superlattice quantum barrier layer is 0.2.In (In) x Ga 1-x The thickness of the N quantum well layer is 5nm, the thickness of the Mg doped first barrier layer is 1nm, the thickness of the second barrier layer is 2nm, the first period is 16, the second period is 5, and the doping concentration of Mg in the Mg doped first barrier layer is 1 x 10 16 atoms/cm 3 The temperature of depositing the Mg-doped first barrier layer is 25 ℃ lower than the temperature of depositing the second barrier layer, and the ratio of the flow rate of Ga when depositing the Mg-doped first InGaN barrier layer to the flow rate of Ga when depositing the second InGaN barrier layer is 0.55:1.
Example 8
The light emitting diode In this embodiment is different from the light emitting diode In embodiment 1 In that In x Ga 1-x In the N quantum well layer, x is 0.4, in y Ga 1-y Y in the N superlattice quantum barrier layer is 0.2.In (In) x Ga 1-x The thickness of the N quantum well layer is 3nm, the thickness of the Mg doped first barrier layer is 0.5nm, the thickness of the second barrier layer is 2nm, the first period is 6, the second period is 4, and the doping concentration of Mg in the Mg doped first barrier layer is 1 x 10 15 atoms/cm 3 The temperature of the Mg-doped first barrier layer is 35 ℃ lower than the temperature of the second barrier layer, and the ratio of the Ga flux when the Mg-doped first InGaN barrier layer is deposited to the Ga flux when the second InGaN barrier layer is deposited is 0.65:1.
Example 9
The light emitting diode In this embodiment is different from the light emitting diode In embodiment 1 In that In x Ga 1-x In the N quantum well layer, x is 0.3, in y Ga 1-y Y in the N superlattice quantum barrier layer is 0.15.In (In) x Ga 1-x The thickness of the N quantum well layer is 2nm, the thickness of the Mg doped first barrier layer is 0.5nm, the thickness of the second barrier layer is 1.5nm, the first period is 5, the second period is 5, and the doping concentration of Mg doped in the Mg doped first barrier layer is 1 x 10 13 atoms/cm 3 The temperature of depositing the Mg-doped first barrier layer is 45 ℃ lower than the temperature of depositing the second barrier layer, and the ratio of the flow rate of Ga when depositing the Mg-doped first InGaN barrier layer to the flow rate of Ga when depositing the second InGaN barrier layer is 0.75:1.
Comparative example
The light emitting diode In this embodiment is different from the light emitting diode In the corresponding embodiments 1 to 9 In that the multiple quantum well layer includes In alternately deposited x Ga 1-x N quantum well layer and In y Ga 1-y N quantum barrier layer, x > y, in x Ga 1-x N quantum well layer and In y Ga 1-y The N quantum barrier layers are grown in a 2D mode.
Referring to table 1, the results of comparing the parameters and the corresponding light transmittance of the above examples and comparative examples are shown.
TABLE 1
As can be seen from Table 1, the light-emitting diode epitaxial wafer provided by the application has the advantage that the photoelectric efficiency is improved by 0.36-2.83% compared with the light-emitting diode epitaxial wafer prepared by mass production at present.
It should be noted that the foregoing implementation procedure is only for illustrating the feasibility of the present application, but this does not represent that the light emitting diode of the present application has only a few implementation procedures, and may be incorporated into the feasible embodiments of the present application as long as the light emitting diode of the present application can be implemented. In addition, in the embodiment of the present application, the structural part of the light emitting diode corresponds to the part of the method for manufacturing the light emitting diode according to the present application, and the specific implementation details thereof are the same, which is not described herein again.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.

Claims (10)

1. The preparation method of the high-radiation light-emitting diode is characterized by comprising the following steps of:
providing a substrate;
sequentially depositing a buffer layer, an N-type GaN layer, a low-temperature stress release layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer on the substrate;
wherein the multiple quantum well layer comprises In deposited on the low temperature stress release layer In a first period x Ga 1-x N quantum well layer and In y Ga 1-y An N superlattice quantum barrier layer, x > y, the In y Ga 1-y The N superlattice quantum barrier layer comprises a Mg-doped first barrier layer and a second barrier layer which are deposited in a second period in a crossing way, wherein the Mg-doped first barrier layer is formed by adopting a 3D mode deposition, and the second barrier layer is formed by adopting a three-dimensional (CD) mode depositionThe barrier layer is formed using 2D mode deposition.
2. The method of claim 1, wherein In is as follows x Ga 1-x In the N quantum well layer, x is more than or equal to 0.05 and less than or equal to 0.55, and In is as follows y Ga 1-y In the N superlattice quantum barrier layer, y is more than or equal to 0 and less than or equal to 0.25.
3. The method of claim 1, wherein the Mg doped first barrier layer is deposited to a thickness of 0.2nm to 1nm and the second barrier layer is deposited to a thickness of 0.5nm to 5nm.
4. The method of claim 1, wherein the Mg doped first barrier layer is deposited to a thickness ratio of 1:2.5 to 1:5 to the second barrier layer.
5. The method of claim 1, wherein the first period is 4-16 and the second period is 2-10.
6. The method of claim 1, wherein the In is deposited x Ga 1-x The thickness of the N quantum well layer is 2nm-6nm, and the thickness of the superlattice quantum barrier layer is 7nm-15nm.
7. The method of claim 1, wherein the Mg doping concentration in the Mg doped first barrier layer is 1 x 10 12 atoms/cm 3 -5*10 18 atoms/cm 3
8. The method of claim 1, wherein the Mg doped first barrier layer is deposited at a temperature 20-50 ℃ lower than the second barrier layer.
9. The method of claim 1, wherein a ratio of a flow rate of Ga when depositing the Mg-doped first InGaN barrier layer to a flow rate of Ga when depositing the second InGaN barrier layer is 0.5-0.8:1.
10. A light emitting diode produced by the method for producing a high-emissivity light emitting diode according to any one of claims 1 to 9, comprising a substrate, and a buffer layer, an N-type GaN layer, a low-temperature stress release layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer sequentially deposited on the substrate, wherein the multiple quantum well layer comprises In deposited on the low-temperature stress release layer at first periodic intersections x Ga 1-x N quantum well layer and In y Ga 1-y An N superlattice quantum barrier layer, x > y, the In y Ga 1-y The N-superlattice quantum barrier layer includes Mg doped first and second barrier layers deposited alternately at a second period.
CN202310443745.4A 2023-04-23 2023-04-23 Preparation method of high-radiation light-emitting diode and light-emitting diode Pending CN116722083A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117712249A (en) * 2024-02-05 2024-03-15 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer and preparation method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117712249A (en) * 2024-02-05 2024-03-15 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer and preparation method thereof
CN117712249B (en) * 2024-02-05 2024-05-28 江西兆驰半导体有限公司 Light-emitting diode epitaxial wafer and preparation method thereof

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