CN117712249B - Light-emitting diode epitaxial wafer and preparation method thereof - Google Patents

Abstract

The invention provides a light-emitting diode epitaxial wafer and a preparation method thereof, wherein the light-emitting diode epitaxial wafer comprises a substrate, a first semiconductor layer, an active layer and a second semiconductor layer which are sequentially deposited on the substrate, the active layer comprises a plurality of alternately laminated composite quantum well layers and quantum barrier layers, the composite quantum well layers comprise a polarization regulation layer, a first quantum well sub-layer, a second quantum well sub-layer and a lattice matching layer which are sequentially deposited on the first semiconductor layer, wherein after the second quantum well sub-layer is deposited, the lattice matching layer is deposited after the temperature, the pressure and the atmosphere of the second quantum well sub-layer are kept to be stopped for a preset time, the polarization regulation layer is an In gradual change P-type In _xGa_1‑x N layer, and the In component of the In gradual change P-type In _xGa_1‑x N layer is gradually increased, so that the light-emitting efficiency of the light-emitting diode is improved.

Description

Light emitting diode epitaxial wafer and preparation method thereof

Technical Field

The invention belongs to the field of semiconductor technology, and in particular relates to a light emitting diode epitaxial wafer and a preparation method thereof.

Background technique

As an important part of the national information industry, semiconductor materials have been widely used in lighting display, information storage, radio frequency communication, integrated circuits and power electronic devices. Gallium nitride (GaN), as a typical representative of the third generation of semiconductors, has many advantages such as wide bandgap, strong breakdown electric field, high electron saturation rate, high thermal conductivity, and strong radiation resistance. It has significant advantages in wireless fast charging, laser radar, high-frequency communication, aerospace and other fields; at the same time, GaN can form _{AlxGa1 -xN} , _{InyGa1 -} yN, _{AlxInyGa1 -xyN system} semiconductor materials with other III-V semiconductors. This kind of multi-element alloy material can achieve a continuous change of the material bandgap from 0.77eV-6.20eV by adjusting the ratio between the metal atoms in the solid solution. The emission wavelength covers the ultraviolet-visible-infrared range, playing an important role in the field of optoelectronic devices.

Currently, commercially available high-efficiency GaN-based blue-green light-emitting diodes usually use InGaN quantum well layer/AlGaN quantum barrier layer as the active region. Therefore, high-quality InGaN quantum well layer/AlGaN quantum barrier layer is the key to achieving high-efficiency and high-brightness light-emitting diodes;

First, due to the lattice mismatch and thermal mismatch between GaN epitaxial materials and sapphire substrates, heteroepitaxial growth is prone to dislocations. As the epitaxial material grows, the screw dislocations are not annihilated, and they are prone to form non-radiative recombination centers when growing to the quantum well region, reducing the internal quantum efficiency. Second, the quantum confined Stark effect (QCSE) is strong. Due to the large differences in lattice constants and thermal expansion rates between GaN materials and commercial sapphire, the resulting stress field makes the polarization electric field of the multi-quantum well layer very strong, causing the energy band to tilt and the wave function of electrons and holes to separate in space, resulting in a reduced probability of carrier recombination.

Summary of the invention

In order to solve the above technical problems, the present invention provides a light-emitting diode epitaxial wafer and a preparation method, the purpose of which is to improve the crystal quality of the quantum well layer, reduce the polarization effect of the quantum well layer, improve the radiation recombination efficiency of the active layer, and improve the luminous efficiency of the light-emitting diode.

On the one hand, the invention provides the following technical solution: a light-emitting diode epitaxial wafer, comprising a substrate and a first semiconductor layer, an active layer and a second semiconductor layer sequentially deposited on the substrate, the active layer comprising a plurality of alternately stacked composite quantum well layers and quantum barrier layers, the composite quantum well layer comprising a polarization regulation layer, a first quantum well sublayer, a second quantum well sublayer and a lattice matching layer sequentially deposited on the first semiconductor layer, wherein after the second quantum well sublayer is deposited, the temperature, pressure and atmosphere for depositing the second quantum well sublayer are maintained for a preset time before the lattice matching layer is deposited, the polarization regulation layer is an In-graded P-type _{InxGa1 -xN} layer, and the In component of the In-graded P-type _{InxGa1 -xN} layer gradually increases.

Compared with the prior art, the invention has the following beneficial effects: the In gradient n-type In _x Ga _1-x N layer reduces the lattice mismatch between the InGaN quantum well layer and the GaN layer barrier layer through the change of its composition, reduces the defects caused by stress, improves the crystal quality of the quantum well layer, and reduces the non-radiative recombination efficiency of the quantum well layer. In addition, doping with Mg can also regulate the polarization electric field of the quantum well and reduce the polarization effect of the quantum well. The thickness of the InGaN quantum well is less than the de Broglie wavelength of the electron, and the energy levels of the electron and the hole are discrete quantized energy levels, which has a significant quantum confinement effect. The In-rich region of the InGaN layer generates a potential energy valley, and the In-rich region becomes a potential well for carriers. When electrons and holes are injected, they are easily captured by these potential wells and recombine to emit light, which greatly reduces the probability of non-radiative recombination due to capture by dislocations and improves the luminous efficiency of the light-emitting diode. The second quantum well sublayer (low-temperature GaN layer) reduces the surface segregation of In atoms, and the first quantum well sublayer (In _y Ga _1-y N layer) can be increased by the growth pause time to form an In-rich region, thereby improving the radiation recombination efficiency of the first quantum well sublayer (In _y Ga _1-y N layer). The lattice matching layer Al gradient Al _z Ga _1-z N layer can reduce the lattice mismatch by changing the Al component, thereby reducing the polarization effect caused by the lattice mismatch. A suitable quantum barrier layer can not only reduce the non-radiative recombination caused by the overflow of electrons to the P-type layer, but also improve the recombination efficiency of electrons and holes in the quantum well. The multi-period active layer is grown to improve the quantum confinement effect, and the electrons and holes are localized in the multi-quantum wells, thereby increasing the overlap of the electron and hole wave functions, and then increasing the radiation recombination rate. In the above, the present invention improves the crystal quality of the quantum well layer, reduces the polarization effect of the quantum well layer, improves the radiation recombination efficiency of the active layer, and improves the luminous efficiency of the light-emitting diode.

Furthermore, the thickness of the In-graded P-type _{InxGa1 -xN} layer is in the range of 0.1nm-5nm, and the composition of In in the In-graded P-type _{InxGa1 -xN} layer is in the range of 0.01-0.5.

Furthermore, the first quantum well sublayer ( _{InyGa1 -yN} layer), the thickness of the _{InyGa1 -yN} layer is in the range of 1nm-10nm, and the In composition of the _{InyGa1 -yN} layer is in the range of 0.01-0.5.

Further, the second quantum well sublayer is a low-temperature GaN layer, the thickness range of the low-temperature GaN layer is 0.1nm-5nm, the lattice matching layer is an Al-graded _{AlzGa1 -zN} layer, the thickness range of the Al-graded _{AlzGa1 -zN} layer is 0.5nm-10nm, the Al composition range of the Al-graded _{AlzGa1 -zN} layer is 0.01-0.5, the Al composition of the Al-graded _{AlzGa1 -zN} layer gradually increases, and the quantum barrier layer is an AlGaN/GaN layer, and the Al composition range of the AlGaN/GaN layer is 0.01-0.5.

Furthermore, the preset pause time is 5 seconds to 100 seconds, and the number of alternating stacking cycles of the composite quantum well layer and the quantum barrier layer of the active layer is 1 to 20.

Furthermore, the first semiconductor layer includes a buffer layer, an undoped GaN layer and an n-type GaN layer, and the second semiconductor layer includes an electron blocking layer and a p-type GaN layer, wherein the buffer layer, the undoped GaN layer, the n-type GaN layer, the active layer, the electron blocking layer and the p-type GaN layer are sequentially deposited on the substrate.

On the other hand, the present invention also provides a method for preparing a light emitting diode epitaxial wafer, the method comprising the following steps: providing a substrate, and sequentially depositing a buffer layer, a non-doped GaN layer and an n-type GaN layer on the substrate;

An active layer is deposited on the n-type GaN layer, the active layer comprising a plurality of alternately stacked composite quantum well layers and quantum barrier layers, the composite quantum well layer comprising a polarization regulation layer, a first quantum well sublayer, a second quantum well sublayer and a lattice matching layer sequentially deposited on the first semiconductor layer, wherein after the second quantum well sublayer is deposited, the temperature, pressure and atmosphere for depositing the second quantum well sublayer are maintained for a preset time before depositing the lattice matching layer, the polarization regulation layer is an In gradient P-type In _x Ga _1-x N layer, and the In component of the In gradient P-type In _x Ga _1-x N layer gradually increases;

An electron blocking layer and a P-type GaN layer are sequentially deposited on the active layer.

Further, the temperature range of depositing the polarization control layer is 700°C-900°C, the pressure is 50torr-300torr, the atmosphere is _N2 / _H2 / _NH3 , and the Mg doping concentration range is 1E+17atoms/ ^cm3-1E +18atoms/ ^cm3 , wherein the temperature of depositing the polarization control layer gradually decreases.

Further, the first quantum well sublayer is deposited at a temperature range of 700°C-900°C, a pressure range of 50torr-300torr, and an atmosphere of _N2 / _NH3 ; the second quantum well sublayer is deposited at a temperature range of 700°C-900°C, a pressure range of 50torr-300torr, and an atmosphere of _N2 / _NH3 .

Further, the deposition temperature range of the lattice matching layer is 700° C.-900° C., the pressure range is 50 torr-300 torr, and the atmosphere is N ₂ /NH ₃ , wherein the temperature of depositing the lattice matching layer gradually increases.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic structural diagram of a light emitting diode epitaxial wafer in a first embodiment of the present invention.

FIG. 2 is a flow chart of a method for preparing a light emitting diode epitaxial wafer in a second embodiment of the present invention.

Explanation of main component symbols: 100: substrate, 200: buffer layer, 300: non-doped GaN layer, 400: n-type GaN layer, 500: active layer, 510: composite quantum well layer, 520: quantum barrier layer, 600: electron blocking layer, 700: p-type GaN layer.

The following specific implementation manner will further illustrate the present invention in conjunction with the above-mentioned drawings.

Detailed ways

In order to facilitate understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Several embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.

It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present invention belongs. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and/or" used herein includes any and all combinations of one or more of the related listed items.

Embodiment 1

Please refer to FIG. 1 , which shows a light emitting diode epitaxial wafer in a first embodiment of the present invention, comprising a substrate 100 and a first semiconductor layer, an active layer 500 and a second semiconductor layer sequentially deposited on the substrate, wherein the active layer comprises a plurality of alternately stacked composite quantum well layers 510 and quantum barrier layers 520, and the composite quantum well layer comprises a polarization regulation layer, a first quantum well sublayer, a second quantum well sublayer and a lattice matching layer sequentially deposited on the first semiconductor layer, wherein after the second quantum well sublayer is deposited, the temperature, pressure and atmosphere for depositing the second quantum well sublayer are maintained for a preset time before the lattice matching layer is deposited, and the polarization regulation layer is an In-gradient P-type _{InxGa1 -xN} layer, and the In component of the In-gradient P-type _{InxGa1 -xN} layer gradually increases.

In this embodiment, the first semiconductor layer includes a buffer layer 200, an undoped GaN layer 300 and an n-type GaN layer 400, and the second semiconductor layer includes an electron blocking layer 600 and a p-type GaN layer 700, wherein the buffer layer, the undoped GaN layer, the n-type GaN layer, the active layer, the electron blocking layer and the p-type GaN layer are sequentially deposited on the substrate.

Specifically, an active control layer (In gradient P-type In _x Ga _1-x N layer) is deposited on the n-type GaN layer with a thickness of 0.1nm-5nm, a deposition temperature of 700℃-900℃, the temperature gradually decreases, the pressure is 50torr-300torr, the atmosphere is N ₂ /H ₂ /NH ₃ , the In component is 0.01-0.5, gradually increases, and the Mg doping concentration is 1E+17atoms/cm ³ -1E+18atoms/cm ³ .

It is worth noting that by changing the In component of the In gradient n-type In _x Ga _1-x N layer, the lattice mismatch between the InGaN quantum well layer and the GaN barrier layer is reduced, the defects caused by stress are reduced, the crystal quality of the quantum well layer is improved, and the non-radiative recombination efficiency of the quantum well layer is reduced. In addition, Mg doping can also regulate the polarization electric field of the quantum well and reduce the polarization effect of the quantum well.

In this embodiment, a first quantum well sublayer (In _y Ga _1-y N layer) is deposited on the polarization control layer (In gradient P-type In _x Ga 1 _-x N layer) with a thickness of 1nm-10nm, a deposition temperature of 700°C-900°C, a pressure of 50torr-300torr, an atmosphere of N ₂ /NH ₃ , and an In component of 0.01-0.5. The thickness of the InGaN quantum well is less than the de Broglie wavelength of the electron, and the energy levels of the electron and the hole are discrete quantized energy levels, which has a significant quantum confinement effect. The In-rich region of the InGaN layer produces a potential energy valley, and the In-rich region becomes a potential well for carriers. When electrons and holes are injected, they are easily captured by these potential wells and recombine to emit light, which greatly reduces the probability of non-radiative recombination due to dislocation capture, and improves the luminous efficiency of the light-emitting diode.

In this embodiment, a second quantum well sublayer (low-temperature GaN layer) is deposited on the first quantum well sublayer ( _{InyGa1 -yN} layer) with a thickness of 0.1nm-5nm, a deposition temperature of 700℃-900℃, a pressure of 50torr-300torr, and an atmosphere of _N2 / _NH3 . After the deposition of the second quantum well sublayer (low-temperature GaN layer), the original temperature, pressure, and atmosphere are maintained for a growth pause of 5 seconds to 100 seconds. The second quantum well sublayer (low-temperature GaN layer) reduces the surface segregation of In atoms, and the growth pause time can increase the formation of an In-rich region in the first quantum well sublayer ( _{InyGa1 -yN} layer), thereby improving the radiation recombination efficiency of the first quantum well sublayer ( _{InyGa1 -yN} layer).

In this embodiment, a lattice matching layer (Al gradient Al _z Ga _1-z N layer) is deposited on the second quantum well sublayer (low temperature GaN layer) with a thickness of 0.5nm-10nm, a deposition temperature of 700℃-900℃, a temperature gradually increasing, a pressure of 50torr-300torr, an atmosphere of N ₂ /NH ₃ , and an Al composition of 0.01-0.5, which gradually increases. The lattice matching layer (Al gradient Al _z Ga _1-z N layer) can reduce the lattice mismatch by changing the Al composition, thereby reducing the polarization effect caused by the lattice mismatch.

In this embodiment, the quantum barrier layer is an AlGaN/GaN layer, the growth temperature is 800℃-1000℃, the thickness is 5nm-50nm, the growth pressure is 50torr-500torr, and the Al component is 0.01-0.5. A suitable quantum barrier layer can reduce the non-radiative recombination caused by the overflow of electrons to the P-type layer, and can also improve the recombination efficiency of electrons and holes in the quantum well.

In this embodiment, the active layer has a composite quantum well layer and a quantum barrier layer alternately stacked in a period of 1 to 20. Growing a multi-period active layer improves the quantum confinement effect, and electrons and holes are localized in the multi-quantum wells, thereby increasing the overlap of electron and hole wave functions, and further increasing the radiation recombination rate.

In order to facilitate subsequent testing and understanding, experimental group 1 and control group 1, control group 2 and control group 3 are introduced in this application;

Among them, the experimental group 1 adopts the light-emitting diode epitaxial wafer as described in Example 1, which includes the active layer in Example 1, and the structures of the control groups 1, 2, 3 and 4 are substantially the same as those of Example 1.

Specifically, in the experimental group 1, the thickness of the In gradient P-type In _x Ga _1-x N layer is 1.5 nm, the thickness of the In _y Ga _1-y N layer is 3.5 nm, the thickness of the low-temperature GaN layer is 2 nm, the thickness of the Al gradient Al _z Ga _1-z N layer is 3 nm, the In component of the In gradient P-type In _x Ga _1-x N layer is increased from 5% to 15%, the Mg doping concentration of the In gradient P-type In _x Ga _1-x N layer is 6E+17 atoms/cm ³ , the In component of the In _y Ga _1-y N layer is increased from 5% to 10%, and the deposition of the lattice matching layer needs to be paused for a preset time of 15 s;

The structure of the control group 1 is substantially the same as that of the experimental group 1, but the differences are as follows: there is no In graded P-type In _x Ga _1-x N layer, and other conditions are the same as those of Example 1;

The structure of the control group 2 is substantially the same as that of the experimental group 1, but the differences are as follows: there is no In _y Ga _1-y N layer, and the other conditions are the same as those of Example 1;

The structure of control group 3 is substantially the same as that of experimental group 1, but the differences are as follows: there is no low-temperature GaN layer, and other conditions are the same as those of embodiment 1;

The structure of control group 4 is substantially the same as that of experimental group 1, but the differences are as follows: there is no Al graded Al _z Ga _1-z N layer, and other conditions are the same as those of Example 1;

The light-emitting diode epitaxial wafers in the above experimental group 1, control group 1, control group 2, control group 3 and control group 4 were prepared into chips with a size of 10 mil*24 mil, and photoelectric tests were performed. The test results are shown in Table 1:

As shown in Table 1, in experimental group 1, the light efficiency increased by 5.0%;

Control group 1, light efficiency increased by 1.0%;

Control group 2, light efficiency increased by 0.5%;

Control group three, light efficiency increased by 0.8%;

In control group 4, the light efficiency increased by 1.5%.

As can be seen from Table 1, according to the experimental data of the above experimental examples and comparative examples of the present invention, the light-emitting diode epitaxial wafer disclosed in the experimental group 1 has the greatest improvement in light efficiency.

Embodiment 2

Please refer to FIG. 2 , which shows a method for preparing a light emitting diode epitaxial wafer according to a second embodiment of the present invention. The method comprises the following steps: step S01 to step S08;

S01: providing a substrate;

Optionally, the substrate may be one of a sapphire substrate, a _SiO2 sapphire composite substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, and a zinc oxide substrate.

Specifically, the substrate is a sapphire substrate, which is currently the most commonly used GaN-based LED substrate material. The sapphire substrate has a mature preparation process, a low price, is easy to clean and handle, and has good stability at high temperatures.

Step S02: depositing a buffer layer on the substrate.

Specifically, an AlN buffer layer with a thickness of 15 nm was deposited in Applied Materials PVD. The AlN buffer layer provided nucleation centers with the same orientation as the substrate, released the stress caused by the lattice mismatch between GaN and the substrate and the thermal stress caused by the mismatch in thermal expansion coefficients, provided a flat nucleation surface for further growth, reduced the contact angle of nucleation growth, and enabled the island-like grown GaN grains to connect into a surface within a smaller thickness, thus transforming into two-dimensional epitaxial growth.

Step S03, pre-treating the substrate on which the buffer layer has been deposited;

Specifically, the sapphire substrate coated with the AlN buffer layer is transferred into the MOCVD, pretreated in a _H2 atmosphere for 1 min-10 min at a treatment temperature of 1000°C-1200°C, and then the sapphire substrate is nitrided to improve the crystal quality of the AlN buffer layer and effectively improve the crystal quality of the subsequently deposited GaN epitaxial layer.

Step S04: depositing a non-doped GaN layer on the buffer layer.

Optionally, the growth temperature of the non-doped GaN layer is 1050° C.-1200° C., the pressure is 100 torr-600 torr, and the thickness is 1 um-5 um.

Specifically, the growth temperature of the undoped GaN layer is 1100°C, the growth pressure is 150torr, and the growth thickness is 2um-3um. The growth temperature of the undoped GaN layer is high and the pressure is low, so the crystal quality of the prepared GaN is better. At the same time, as the thickness of GaN increases, the compressive stress will be released through stacking faults, line defects will be reduced, the crystal quality will be improved, and the reverse leakage will be reduced. However, increasing the thickness of the GaN layer consumes more Ga source materials, which greatly increases the epitaxial cost of the LED. Therefore, at present, LED epitaxial wafers are usually grown with undoped GaN of 2um-3um, which not only saves production costs, but also the GaN material has higher crystal quality.

Step S05 , depositing an n-type GaN layer on the undoped GaN layer.

Optionally, the n-type GaN layer is grown at a temperature of 1050° C.-1200° C., a pressure of 100 torr-600 torr, a thickness of 2 um-3 um, and a Si doping concentration of 1E+19 atoms/cm ³ -5E+19 atoms/cm ³ .

Specifically, the growth temperature of the n-type GaN layer is 1120°C, the growth pressure is 100torr, the growth thickness is 2um-3um, and the Si doping concentration is 2.5E+19atoms/ ^cm3 . First, the n-type GaN layer provides sufficient electrons for LED light emission. Secondly, the resistivity of the n-type GaN layer is higher than that of the transparent electrode on the p-GaN. Therefore, sufficient Si doping can effectively reduce the resistivity of the n-type GaN layer. Finally, sufficient thickness of n-type GaN can effectively release the luminous efficiency of the stress light-emitting diode.

Step S06, depositing an active layer on the n-type GaN layer.

The active layer includes a plurality of alternately stacked composite quantum well layers and quantum barrier layers, wherein the composite quantum well layer includes a polarization control layer (In gradient P-type In _x Ga _1-x N layer), a first quantum well sublayer (In _y Ga _1-y N layer), and a second quantum well sublayer (low-temperature GaN layer). After the deposition of the second quantum well sublayer (low-temperature GaN layer), the original temperature, pressure and atmosphere are maintained for a few seconds before the lattice matching layer (Al gradient Al _z Ga _1-z N layer) is deposited.

Optionally, an active control layer (In gradient P-type In _x Ga _1-x N layer) is deposited on the n-type GaN layer, with a thickness of 0.1nm-5nm, a deposition temperature of 700°C-900°C, a temperature gradually decreasing, a pressure of 50torr-300torr, an atmosphere of N ₂ /H ₂ /NH ₃ , an In component of 0.01-0.5, gradually increasing, and a Mg doping concentration of 1E+17atoms/cm ³ -1E+18atoms/cm ³ . The In gradient n-type In _x Ga _1-x N layer reduces the lattice mismatch between the InGaN quantum well layer and the GaN layer barrier layer through its component change, reduces defects caused by stress, improves the crystal quality of the quantum well layer, and reduces the non-radiative recombination efficiency of the quantum well layer. In addition, doping with Mg can also regulate the polarization electric field of the quantum well and reduce the polarization effect of the quantum well.

Optionally, a first quantum well sublayer (In _y Ga _{1-y N layer) is deposited on the polarization control layer (In gradient P-type In x Ga 1-x N layer} ) with a thickness of 1nm-10nm, a deposition temperature of 700℃-900℃, a pressure of 50torr-300torr, an atmosphere of N ₂ /NH ₃ , and an In component of 0.01-0.5. The thickness of the InGaN quantum well is less than the de Broglie wavelength of the electron, and the energy levels of the electron and the hole are discrete quantized energy levels, which has a significant quantum confinement effect. The In-rich region of the InGaN layer produces a potential energy valley, and the In-rich region becomes a potential well for carriers. When electrons and holes are injected, they are easily captured by these potential wells and recombine to emit light, which greatly reduces the probability of non-radiative recombination due to dislocation capture, and improves the luminous efficiency of the light-emitting diode.

Optionally, a second quantum well sublayer (low-temperature GaN layer) is deposited on the first quantum well sublayer ( _{InyGa1 -yN} layer) with a thickness of 0.1nm-5nm, a deposition temperature of 700℃-900℃, a pressure of 50torr-300torr, and an atmosphere of _N2 / _NH3 . After the deposition of the second quantum well sublayer (low-temperature GaN layer), the original temperature, pressure, and atmosphere are maintained for a growth pause of 5 seconds to 100 seconds. The second quantum well sublayer (low-temperature GaN layer) reduces the surface segregation of In atoms, and the growth pause time can increase the formation of an In-rich region in the first quantum well sublayer ( _{InyGa1 -yN} layer), thereby improving the radiation recombination efficiency of the first quantum well sublayer ( _{InyGa1 -yN} layer).

Optionally, a lattice matching layer (Al gradient Al _z Ga _1-z N layer) is deposited on the second quantum well sublayer (low-temperature GaN layer) with a thickness of 0.5nm-10nm, a deposition temperature of 700°C-900°C, a gradually increasing temperature, a pressure of 50torr-300torr, an atmosphere of N ₂ /NH ₃ , and an Al composition of 0.01-0.5, which is gradually increased. The lattice matching layer Al gradient Al _z Ga _1-z N layer can reduce the lattice mismatch through the change of Al composition, thereby reducing the polarization effect caused by the lattice mismatch.

Optionally, the quantum barrier layer is an AlGaN/GaN layer, with a growth temperature of 800°C-1000°C, a thickness of 5nm-50 nm, a growth pressure of 50-500 torr, and an Al component of 0.01-0.5. A suitable quantum barrier layer can reduce the non-radiative recombination caused by the overflow of electrons to the P-type layer, and can also improve the recombination efficiency of electrons and holes in the quantum well.

Optionally, the composite quantum well layer and quantum barrier layer of the active layer are alternately stacked in a period of 1 to 20. Growing a multi-period active layer improves the quantum confinement effect, and electrons and holes are localized in the multi-quantum wells, thereby increasing the overlap of electron and hole wave functions, thereby increasing the radiation recombination rate.

Specifically, a polarization control layer (In gradient P-type In _x Ga _1-x N layer) is deposited on the n-type GaN layer, with a thickness of 1.5 nm, a deposition temperature of 850°C and a gradual decrease of 790°C, a pressure of 200 torr, an atmosphere of N ₂ /H ₂ /NH ₃ , an In component of 0.05 and a gradual increase of 0.15, and a Mg doping concentration of 6E+17 atoms/cm ^3. A first quantum well sublayer (In _y Ga _1-y N layer) is deposited on the polarization control layer (In gradient P-type In _x Ga 1 _-x N layer), with a thickness of 3.5 nm, a deposition temperature of 790°C, a pressure of 200 torr, an atmosphere of N ₂ /NH ₃ , and an In component of 0.15. A second quantum well sublayer (low-temperature GaN layer) is deposited on the first quantum well sublayer (In _y Ga _1-y N layer), with a thickness of 2 nm, a deposition temperature of 795°C, a pressure of 200 torr, and an atmosphere of N ₂ /NH ₃ . After the deposition of the second quantum well sublayer (low-temperature GaN layer), the original temperature, pressure and atmosphere growth are maintained for 15 seconds. A lattice matching layer (Al gradient Al _z Ga _1-z N layer) is deposited on the second quantum well sublayer (low-temperature GaN layer) with a thickness of 3nm, a deposition temperature of 700℃-900℃, a gradual increase in temperature, a pressure of 50torr-300torr, an atmosphere of N ₂ /NH ₃ , and an Al component of 0.05 gradually increasing by 0.1. The quantum barrier layer is an AlGaN/GaN layer with a growth temperature of 870℃, a thickness of 10nm, a growth pressure of 200torr, and an Al component of 0.1. The active layer has 11 alternating stacking cycles of the composite quantum well layer and the quantum barrier layer.

The present invention has the beneficial effects that the In gradient n-type In _x Ga _1-x N layer reduces the lattice mismatch between the InGaN quantum well layer and the GaN layer barrier layer through the change of its composition, reduces the defects caused by stress, improves the crystal quality of the quantum well layer, and reduces the non-radiative recombination efficiency of the quantum well layer. In addition, doping with Mg can also regulate the polarization electric field of the quantum well and reduce the polarization effect of the quantum well. The thickness of the InGaN quantum well is less than the de Broglie wavelength of the electron, and the energy levels of the electron and the hole are discrete quantized energy levels, which has a significant quantum confinement effect. The In-rich region of the InGaN layer generates a potential energy valley, and the In-rich region becomes a potential well for carriers. When electrons and holes are injected, they are easily captured by these potential wells and recombine to emit light, which greatly reduces the probability of non-radiative recombination due to capture by dislocations and improves the luminous efficiency of the light-emitting diode. The second quantum well sublayer (low-temperature GaN layer) reduces the surface segregation of In atoms, and the first quantum well sublayer (In _y Ga _1-y N layer) can be increased by the growth pause time to form an In-rich region, thereby improving the radiation recombination efficiency of the first quantum well sublayer (In _y Ga _1-y N layer). The lattice matching layer Al gradient Al _z Ga _1-z N layer can reduce the lattice mismatch by changing the Al component, thereby reducing the polarization effect caused by the lattice mismatch. A suitable quantum barrier layer can not only reduce the non-radiative recombination caused by the overflow of electrons to the P-type layer, but also improve the recombination efficiency of electrons and holes in the quantum well. The multi-period active layer is grown to improve the quantum confinement effect, and the electrons and holes are localized in the multi-quantum wells, thereby increasing the overlap of the electron and hole wave functions, and then increasing the radiation recombination rate. In the above, the present invention improves the crystal quality of the quantum well layer, reduces the polarization effect of the quantum well layer, improves the radiation recombination efficiency of the active layer, and improves the luminous efficiency of the light-emitting diode.

Step S07, depositing an electron blocking layer on the active layer.

Optionally, the electron blocking layer is AlInGaN with a thickness of 10nm-40nm, a growth temperature of 900°C-1000°C, and a pressure of 100torr-300torr, wherein the Al component is 0.01-0.1, and the In component concentration is 0.01-0.2.

Specifically, the electron blocking layer is AlInGaN with a thickness of 15 nm, in which the Al component concentration is 0.1, the In component concentration is 0.01, the growth temperature is 965°C, and the growth pressure is 200 torr. It can effectively limit electron overflow and reduce the blocking of holes, thereby improving the injection efficiency of holes into quantum wells, reducing carrier Auger recombination, and improving the luminous efficiency of light-emitting diodes.

Step S08, depositing a P-type GaN layer on the electron blocking layer.

Optionally, the P-type GaN layer has a growth temperature of 900° C.-1050° C., a thickness of 10 nm-50 nm, a growth pressure of 100 torr-600 torr, and a Mg doping concentration of 1E+19 atoms/cm ³ -1E+21 atoms/cm ³ .

Specifically, the growth temperature of the P-type GaN layer is 985°C, the thickness is 15nm, the growth pressure is 200torr, and the Mg doping concentration is 1E+20atoms/ ^cm3 . Too high a Mg doping concentration will damage the crystal quality, while a low doping concentration will affect the hole concentration. At the same time, for the LED structure containing V-shaped pits, the higher growth temperature of the P-type GaN layer is also conducive to merging the V-shaped pits to obtain a smooth surface LED epitaxial wafer.

Samples A and B were prepared into 10 mil*24 mil chips using the same chip process conditions, where sample A is the chip currently prepared for mass production, and sample B is the chip prepared by this solution. 300 LED chips were extracted from each sample and tested at 120 mA/60 mA current. The photoelectric efficiency was improved by 1%-5%, and other electrical properties were good.

In summary, in the light-emitting diode epitaxial wafer and preparation method in the above-mentioned embodiments of the present invention, the In gradient n-type In _x Ga _1-x N layer reduces the lattice mismatch between the InGaN quantum well layer and the GaN layer barrier layer through its composition change, reduces the defects caused by stress, improves the crystal quality of the quantum well layer, and reduces the non-radiative recombination efficiency of the quantum well layer. In addition, doping with Mg can also regulate the polarization electric field of the quantum well and reduce the polarization effect of the quantum well. The thickness of the InGaN quantum well is less than the de Broglie wavelength of the electron, and the energy levels of the electron and the hole are discrete quantized energy levels, which has a significant quantum confinement effect. The In-rich region of the InGaN layer produces a potential energy valley, and the In-rich region becomes a potential well for carriers. When electrons and holes are injected, they are easily captured by these potential wells and recombine to emit light, which greatly reduces the probability of non-radiative recombination due to capture by dislocations, and improves the luminous efficiency of the light-emitting diode. The second quantum well sublayer (low-temperature GaN layer) reduces the surface segregation of In atoms, and the first quantum well sublayer (In _y Ga _1-y N layer) can be increased by the growth pause time to form an In-rich region, thereby improving the radiation recombination efficiency of the first quantum well sublayer (In _y Ga _1-y N layer). The lattice matching layer Al gradient Al _z Ga _1-z N layer can reduce the lattice mismatch by changing the Al component, thereby reducing the polarization effect caused by the lattice mismatch. A suitable quantum barrier layer can not only reduce the non-radiative recombination caused by the overflow of electrons to the P-type layer, but also improve the recombination efficiency of electrons and holes in the quantum well. The multi-period active layer is grown to improve the quantum confinement effect, and the electrons and holes are localized in the multi-quantum wells, thereby increasing the overlap of the electron and hole wave functions, and then increasing the radiation recombination rate. In the above, the present invention improves the crystal quality of the quantum well layer, reduces the polarization effect of the quantum well layer, improves the radiation recombination efficiency of the active layer, and improves the luminous efficiency of the light-emitting diode.

In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the patent of the present invention. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims (8)

1. The light-emitting diode epitaxial wafer is characterized by comprising a substrate, a first semiconductor layer, an active layer and a second semiconductor layer which are sequentially deposited on the substrate, wherein the active layer comprises a plurality of alternately laminated composite quantum well layers and quantum barrier layers, the composite quantum well layers comprise a polarization regulation layer, a first quantum well sub-layer, a second quantum well sub-layer and a lattice matching layer which are sequentially deposited on the first semiconductor layer, wherein after the second quantum well sub-layer is deposited, the lattice matching layer is deposited after the temperature, the pressure and the atmosphere of the second quantum well sub-layer are kept to be stopped for a preset time, the polarization regulation layer is an In gradual change P-type In _xGa_1-x N layer, and the In component of the In gradual change P-type In _xGa_1-x N layer is gradually increased;

The first quantum well sub-layer is an In _yGa_1-y N layer, the thickness range of the In _yGa_1-y N layer is 1nm-10nm, the In component range of the In _yGa_1-y N layer is 0.01-0.5, the second quantum well sub-layer is a low-temperature GaN layer, the thickness range of the low-temperature GaN layer is 0.1nm-5nm, the temperature range of the deposited low-temperature GaN layer is 700-900 ℃, the lattice matching layer is an Al graded Al _zGa_1-z N layer, the thickness range of the Al graded Al _zGa_1-z N layer is 0.5nm-10nm, the Al component range of the Al graded Al _zGa_1-z N layer is 0.01-0.5, the Al component range of the Al graded Al _zGa_1-z N layer is gradually increased, the quantum barrier layer is an AlGaN/GaN layer, the Al component range of the AlGaN/GaN layer is 0.01-0.5, and the pause time is 5-100 seconds so as to improve the first quantum well region forming rich region and improve the first quantum well composite radiation efficiency of the first quantum well sub-layer.

2. The light-emitting diode epitaxial wafer according to claim 1, wherein the thickness of the In graded P-type In _xGa_1-x N layer is In the range of 0.1nm to 5nm, and the In composition of the In graded P-type In _xGa_1-x N layer is In the range of 0.01 to 0.5.

3. The light-emitting diode epitaxial wafer according to claim 1, wherein the composite quantum well layer and the quantum barrier layer of the active layer are alternately laminated for 11 to 20 cycles.

4. The light emitting diode epitaxial wafer of claim 1, wherein the first semiconductor layer comprises a buffer layer, an undoped GaN layer and an n-type GaN layer, and the second semiconductor layer comprises an electron blocking layer and a P-type GaN layer, wherein the buffer layer, the undoped GaN layer, the n-type GaN layer, the active layer, the electron blocking layer and the P-type GaN layer are sequentially deposited on the substrate.

5. A method for preparing the light-emitting diode epitaxial wafer according to any one of claims 1 to 4, comprising the steps of:

Providing a substrate, and sequentially depositing a buffer layer, an undoped GaN layer and an n-type GaN layer on the substrate;

Depositing an active layer on the N-type GaN layer, wherein the active layer comprises a plurality of composite quantum well layers and quantum barrier layers which are alternately laminated, the composite quantum well layer comprises a polarization regulation layer, a first quantum well sub-layer, a second quantum well sub-layer and a lattice matching layer which are sequentially deposited on the first semiconductor layer, wherein after the second quantum well sub-layer is deposited, the lattice matching layer is deposited after keeping the temperature, the pressure and the atmosphere for a preset time for depositing the second quantum well sub-layer, the polarization regulation layer is an In gradual change P-type In _xGa_1-x N layer, and the In component of the In gradual change P-type In _xGa_1-x N layer gradually rises;

and depositing an electron blocking layer and a P-type GaN layer on the active layer in sequence.

6. The method of claim 5, wherein the temperature range for depositing the polarization controlling layer is 700 ℃ to 900 ℃, the pressure is 50torr to 300torr, the atmosphere is N ₂/H₂/NH₃, and the Mg doping concentration is 1e+17atoms/cm ³-1E+18atoms/cm³, wherein the temperature for depositing the polarization controlling layer is gradually decreased.

7. The method of claim 5, wherein the first quantum well sub-layer is deposited at a temperature ranging from 700 ℃ to 900 ℃, a pressure ranging from 50torr to 300torr, and an atmosphere of N ₂/NH₃; the temperature range of the second quantum well sub-layer is 700 ℃ to 900 ℃, the pressure range is 50torr to 300torr, and the atmosphere is N ₂/NH₃.

8. The method of claim 5, wherein the lattice matching layer is deposited at a temperature ranging from 700 ℃ to 900 ℃ and a pressure ranging from 50torr to 300torr, in an atmosphere of N ₂/NH₃, and wherein the lattice matching layer is deposited at a gradually increasing temperature.