CN117712249B - Light-emitting diode epitaxial wafer and preparation method thereof - Google Patents
Light-emitting diode epitaxial wafer and preparation method thereof Download PDFInfo
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- H—ELECTRICITY
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
- H01L33/325—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen characterised by the doping materials
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Abstract
The invention provides a light-emitting diode epitaxial wafer and a preparation method thereof, wherein the light-emitting diode epitaxial wafer comprises a substrate, a first semiconductor layer, an active layer and a second semiconductor layer which are sequentially deposited on the substrate, the active layer comprises a plurality of alternately laminated composite quantum well layers and quantum barrier layers, the composite quantum well layers comprise a polarization regulation layer, a first quantum well sub-layer, a second quantum well sub-layer and a lattice matching layer which are sequentially deposited on the first semiconductor layer, wherein after the second quantum well sub-layer is deposited, the lattice matching layer is deposited after the temperature, the pressure and the atmosphere of the second quantum well sub-layer are kept to be stopped for a preset time, the polarization regulation layer is an In gradual change P-type In xGa1‑x N layer, and the In component of the In gradual change P-type In xGa1‑x N layer is gradually increased, so that the light-emitting efficiency of the light-emitting diode is improved.
Description
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a light-emitting diode epitaxial wafer and a preparation method thereof.
Background
Semiconductor materials, which are an important component of the national informatization industry, are now widely used in a variety of fields such as illumination display, information storage, radio frequency communication, integrated circuits, and power electronics. Gallium nitride (GaN) serving as a typical representation of a third-generation semiconductor has the advantages of wide forbidden bandwidth, high breakdown electric field strength, high electron saturation rate, high thermal conductivity, strong irradiation resistance and the like, and has remarkable advantages in the fields of wireless fast charging, laser radar, high-frequency communication, aerospace and the like; meanwhile, gaN can form an Al xGa1-xN、InyGa1-yN、AlxInyGa1-x-y N system semiconductor material with other III-V group semiconductors, the multi-element alloy material can realize continuous change of the forbidden band width of the material from 0.77 eV to 6.20 eV by adjusting the ratio of solid solution metal atoms, and the luminous wavelength covers the ultraviolet-visible light-infrared range and plays an important role in the field of optoelectronic devices.
Currently commercialized high-efficiency GaN-based blue-green light emitting diodes generally employ InGaN quantum well layers/AlGaN quantum barrier layers as active regions. Therefore, the high-quality InGaN quantum well layer/AlGaN quantum barrier layer is the key for realizing the high-efficiency and high-brightness luminous tube;
first, because lattice mismatch and thermal mismatch exist between the GaN epitaxial material and the sapphire substrate, dislocation is easily generated in heteroepitaxial growth, and as the epitaxial material grows, the screw dislocation is not annihilated, and a non-radiative recombination center is easily formed in a quantum well region, so that internal quantum efficiency is reduced. Second, quantum Confinement Stark Effect (QCSE) is strong, and because GaN material and commercial sapphire have larger difference in lattice constant and thermal expansion rate, the polarization electric field of the multi-quantum well layer is strong due to the stress field effect generated by the large difference, so that the energy band is inclined, the wave functions of electrons and holes are spatially separated, and the probability of carrier recombination is reduced.
Disclosure of Invention
In order to solve the technical problems, the invention provides a light-emitting diode epitaxial wafer and a preparation method thereof, which aim to improve the crystal quality of a quantum well layer, reduce the polarization effect of the quantum well layer, improve the radiation recombination efficiency of an active layer and improve the light-emitting efficiency of a light-emitting diode.
In one aspect, the invention provides a light emitting diode epitaxial wafer, which comprises a substrate, and a first semiconductor layer, an active layer and a second semiconductor layer which are sequentially deposited on the substrate, wherein the active layer comprises a plurality of alternately laminated composite quantum well layers and quantum barrier layers, the composite quantum well layers comprise a polarization regulating layer, a first quantum well sub-layer, a second quantum well sub-layer and a lattice matching layer which are sequentially deposited on the first semiconductor layer, wherein after the second quantum well sub-layer is deposited, the lattice matching layer is deposited after the temperature, the pressure and the atmosphere of the second quantum well sub-layer are kept to be stopped for a preset time, the polarization regulating layer is an In graded P-type In xGa1-x N layer, and the In component of the In graded P-type In xGa1-x N layer is gradually increased.
Compared with the prior art, the invention has the beneficial effects that: the In graded N-type In xGa1-x N layer reduces lattice mismatch of the InGaN quantum well layer and the GaN layer barrier layer through component change, reduces defects caused by stress, improves crystal quality of the quantum well layer, reduces non-radiative recombination efficiency of the quantum well layer, and can regulate and control polarization electric field of the quantum well and reduce polarization effect of the quantum well by doping Mg. The thickness of the InGaN quantum well is smaller than the Debroil wavelength of electrons, and the energy levels of the electrons and the holes are discrete quantized energy levels, so that the InGaN quantum well has obvious quantum confinement effect. Potential energy valleys are generated In the In-rich region of the InGaN layer, the In-rich region becomes potential wells of carriers, electrons and holes are easy to capture by the potential wells and recombine to emit light when injected, the probability of non-radiative recombination caused by dislocation capture is greatly reduced, and the luminous efficiency of the light-emitting diode is improved. The second quantum well sub-layer (low temperature GaN layer) reduces the surface segregation of In atoms, and the growth pause time can improve the formation of an In-rich region of the first quantum well sub-layer (In yGa1-y N layer) and the radiation recombination efficiency of the first quantum well sub-layer (In yGa1-y N layer). The lattice matching layer Al graded Al zGa1-z N layer can reduce lattice mismatch through Al component change, and reduce polarization effect generated by lattice mismatch. The proper quantum barrier layer can not only reduce non-radiative recombination caused by overflow of electrons to the P-type layer, but also improve the recombination efficiency of electrons and holes in the quantum well. And growing a multi-period active layer to improve quantum confinement effect, wherein electrons and holes are localized in the multi-quantum well, so that overlapping of wave functions of the electrons and the holes is improved, and further, the radiation recombination rate is improved. Therefore, the invention improves the crystal quality of the quantum well layer, reduces the polarization effect of the quantum well layer, improves the radiation recombination efficiency of the active layer and improves the luminous efficiency of the light-emitting diode.
Further, the thickness range of the In graded P-type In xGa1-x N layer is 0.1nm-5nm, and the In composition range of the In graded P-type In xGa1-x N layer is 0.01-0.5.
Further, the first quantum well sub-layer (In yGa1-y N layer), the thickness of the In yGa1-y N layer ranges from 1nm to 10nm, and the In yGa1-y N layer has an In composition ranging from 0.01 to 0.5.
Further, the second quantum well sub-layer is a low-temperature GaN layer, the thickness range of the low-temperature GaN layer is 0.1nm-5nm, the lattice matching layer is an Al graded Al zGa1-z N layer, the thickness range of the Al graded Al zGa1-z N layer is 0.5nm-10nm, the Al component range of the Al graded Al zGa1-z N layer is 0.01-0.5, the Al component of the Al graded Al zGa1-z N layer gradually rises, the quantum barrier layer is an AlGaN/GaN layer, and the Al component range of the AlGaN/GaN layer is 0.01-0.5.
Further, the preset pause time is 5 seconds to 100 seconds, and the composite quantum well layer and the quantum barrier layer of the active layer are alternately laminated for 1 to 20 periods.
Further, the first semiconductor layer comprises a buffer layer, an undoped GaN layer and an n-type GaN layer, and the second semiconductor layer comprises an electron blocking layer and a P-type GaN layer, wherein the buffer layer, the undoped GaN layer, the n-type GaN layer, the active layer, the electron blocking layer and the P-type GaN layer are sequentially deposited on the substrate.
On the other hand, the invention also provides a preparation method of the light-emitting diode epitaxial wafer, which comprises the following steps: providing a substrate, and sequentially depositing a buffer layer, an undoped GaN layer and an n-type GaN layer on the substrate;
Depositing an active layer on the N-type GaN layer, wherein the active layer comprises a plurality of composite quantum well layers and quantum barrier layers which are alternately laminated, the composite quantum well layer comprises a polarization regulation layer, a first quantum well sub-layer, a second quantum well sub-layer and a lattice matching layer which are sequentially deposited on the first semiconductor layer, wherein after the second quantum well sub-layer is deposited, the lattice matching layer is deposited after keeping the temperature, the pressure and the atmosphere for a preset time for depositing the second quantum well sub-layer, the polarization regulation layer is an In gradual change P-type In xGa1-x N layer, and the In component of the In gradual change P-type In xGa1-x N layer gradually rises;
and depositing an electron blocking layer and a P-type GaN layer on the active layer in sequence.
Further, the temperature range of depositing the polarization control layer is 700 ℃ to 900 ℃, the pressure is 50torr to 300torr, the atmosphere is N 2/H2/NH3, and the doping concentration range of Mg is 1E+17atoms/cm 3-1E+18atoms/cm3, wherein the temperature of depositing the polarization control layer is gradually reduced.
Further, the deposition temperature range of the first quantum well sub-layer is 700 ℃ to 900 ℃, the pressure range is 50torr to 300torr, and the atmosphere is N 2/NH3; the temperature range of the second quantum well sub-layer is 700 ℃ to 900 ℃, the pressure range is 50torr to 300torr, and the atmosphere is N 2/NH3.
Further, the deposition temperature range of the lattice matching layer is 700 ℃ to 900 ℃, the pressure range is 50torr to 300torr, and the atmosphere is N 2/NH3, wherein the temperature of the lattice matching layer is gradually increased.
Drawings
Fig. 1 is a schematic structural diagram of a light emitting diode epitaxial wafer in a first embodiment of the present invention.
Fig. 2 is a flowchart of a method for manufacturing an led epitaxial wafer according to a second embodiment of the present invention.
Description of main reference numerals: 100: substrate, 200: buffer layer, 300: undoped GaN layer, 400: n-type GaN layer, 500: active layer, 510: composite quantum well layer, 520: quantum barrier layer, 600: electron blocking layer, 700: and a P-type GaN layer.
The invention will be further described in the following detailed description in conjunction with the above-described figures.
Detailed Description
In order that the invention may be readily understood, a more complete description of the invention will be rendered by reference to the appended drawings. Several embodiments of the invention are presented in the figures. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Example 1
Referring to fig. 1, an led epitaxial wafer In a first embodiment of the present invention is shown, including a substrate 100, and a first semiconductor layer, an active layer 500 and a second semiconductor layer sequentially deposited on the substrate, where the active layer includes a plurality of alternately stacked composite quantum well layers 510 and quantum barrier layers 520, the composite quantum well layers include a polarization control layer, a first quantum well sub-layer, a second quantum well sub-layer and a lattice matching layer sequentially deposited on the first semiconductor layer, wherein after the second quantum well sub-layer is deposited, the lattice matching layer is deposited after a preset time of maintaining a temperature, a pressure and an atmosphere for depositing the second quantum well sub-layer, the polarization control layer is an In graded P-type In xGa1-x N layer, and an In composition of the In graded P-type In xGa1-x N layer gradually rises.
In this embodiment, the first semiconductor layer includes a buffer layer 200, an undoped GaN layer 300 and an n-type GaN layer 400, and the second semiconductor layer includes an electron blocking layer 600 and a P-type GaN layer 700, wherein the buffer layer, the undoped GaN layer, the n-type GaN layer, the active layer, the electron blocking layer and the P-type GaN layer are sequentially deposited on the substrate.
Specifically, a polarization control layer (In graded P-type In xGa1-x N layer) is deposited on the N-type GaN layer, the thickness is 0.1nm-5nm, the deposition temperature is 700-900 ℃, the temperature is gradually reduced, the pressure is 50-300 torr, the atmosphere is N 2/H2/NH3, the In component is 0.01-0.5, and the doping concentration of Mg is 1E+17atoms/cm 3-1E+18atoms/cm3.
It is worth to say that, through the In composition change of In gradual change N-type In xGa1-x N layer, reduce the lattice mismatch of InGaN quantum well layer and GaN layer barrier layer, reduce the defect that produces because of stress, improve the crystal quality of quantum well layer, reduce the non-radiative recombination efficiency of quantum well layer, in addition doping Mg also can regulate and control the polarization electric field of quantum well, reduce the polarization effect of quantum well.
In this embodiment, a first quantum well sub-layer (In yGa1-y N layer) is deposited on the polarization control layer (In graded P-type In xGa1-x N layer) at a thickness of 1nm to 10nm, a deposition temperature of 700 ℃ to 900 ℃, a pressure of 50torr to 300torr, an atmosphere of N 2/NH3, and an In composition of 0.01 to 0.5. The thickness of the InGaN quantum well is smaller than the Debroil wavelength of electrons, and the energy levels of the electrons and the holes are discrete quantized energy levels, so that the InGaN quantum well has obvious quantum confinement effect. Potential energy valleys are generated In the In-rich region of the InGaN layer, the In-rich region becomes potential wells of carriers, electrons and holes are easy to capture by the potential wells and recombine to emit light when injected, the probability of non-radiative recombination caused by dislocation capture is greatly reduced, and the luminous efficiency of the light-emitting diode is improved.
In this embodiment, a second quantum well sub-layer (low temperature GaN layer) is deposited on the first quantum well sub-layer (In yGa1-y N layer) at a thickness of 0.1nm-5nm, a deposition temperature of 700 ℃ to 900 ℃, a pressure of 50torr to 300torr, and an atmosphere of N 2/NH3. And after the second quantum well sub-layer (low temperature GaN layer) is deposited, the original temperature, pressure and atmosphere growth are kept for 5-100 seconds. The second quantum well sub-layer (low temperature GaN layer) reduces the surface segregation of In atoms, and the growth pause time can improve the formation of an In-rich region of the first quantum well sub-layer (In yGa1-y N layer) and the radiation recombination efficiency of the first quantum well sub-layer (In yGa1-y N layer).
In this embodiment, a lattice matching layer (Al graded Al zGa1-z N layer) is deposited on the second quantum well sub-layer (low temperature GaN layer) to a thickness of 0.5nm-10nm, the deposition temperature is 700-900 ℃, the temperature is gradually increased, the pressure is 50-300 torr, the atmosphere is N 2/NH3, and the Al composition is 0.01-0.5. The lattice matching layer (Al graded Al zGa1-z N layer) can reduce lattice mismatch through Al component change, and reduce polarization effect generated by lattice mismatch.
In the embodiment, the quantum barrier layer is an AlGaN/GaN layer, the growth temperature is 800-1000 ℃, the thickness is 5-50 nm, the growth pressure is 50-500 torr, and the Al component is 0.01-0.5. The proper quantum barrier layer can not only reduce non-radiative recombination caused by overflow of electrons to the P-type layer, but also improve the recombination efficiency of electrons and holes in the quantum well.
In this embodiment, the composite quantum well layer and the quantum barrier layer of the active layer are alternately stacked for 1 to 20 cycles. And growing a multi-period active layer to improve quantum confinement effect, wherein electrons and holes are localized in the multi-quantum well, so that overlapping of wave functions of the electrons and the holes is improved, and further, the radiation recombination rate is improved.
For convenience of subsequent testing and understanding, experimental group one and control group one, control group two and control group three are introduced in the application;
The first led epitaxial wafer according to embodiment one includes the active layer in embodiment one, and the structures of the first control group, the second control group, the third control group and the fourth control group are substantially the same as those of embodiment one.
Specifically, in the first experimental group, the thickness of the In graded P-type In xGa1-x N layer is 1.5 nm, the thickness of the In yGa1-y N layer is 3.5nm, the thickness of the low-temperature GaN layer is 2nm, the thickness of the Al graded Al zGa1-z N layer is 3nm, the In composition of the In graded P-type In xGa1-x N layer is increased from 5% to 15%, the Mg doping concentration of the In graded P-type In xGa1-x N layer is 6E+17atoms/cm 3,InyGa1-y N layer is increased from 5% to 10%, and the preset time for depositing the lattice matching layer is 15s;
The control group one had approximately the same structure as the experimental group one, but the differences were as follows: an In-free graded P-type In xGa1-x N layer, otherwise the conditions were the same as In example 1;
the control group II had substantially the same structure as the experimental group I, but was different as follows: no In yGa1-y N layer was present, and the other conditions were the same as In example 1;
The control group III had approximately the same structure as the experimental group I, but was different as follows: no low temperature GaN layer was present, and the other conditions were the same as in example 1;
The control group IV had approximately the same structure as the experimental group I, but was different as follows: no Al graded Al zGa1-z N layer, other conditions were the same as in example 1;
The led epitaxial wafers in the first control group, the second control group, the third control group and the fourth control group were prepared into 10 mil by 24 mil chips, and subjected to photoelectric testing, and the test results are shown in table 1:
as can be seen from table 1, in experiment group one, the light efficiency is improved by 5.0%;
in the first control group, the light efficiency is improved by 1.0%;
Control group II, the luminous efficacy is improved by 0.5%;
control group III, the luminous efficacy is improved by 0.8%;
and in the fourth control group, the light effect is improved by 1.5%.
As can be seen from table 1, according to the experimental data of the above experimental examples and comparative examples of the present invention, the light efficiency of the led epitaxial wafer disclosed in the experimental group one was improved to the maximum.
Example two
Referring to fig. 2, a method for preparing an led epitaxial wafer according to a second embodiment of the present invention is shown, and includes the following steps: step S01-step S08;
S01: providing a substrate;
Alternatively, the substrate may be one of a sapphire substrate, a SiO 2 sapphire composite substrate, a silicon carbide substrate, a gallium nitride substrate, and a zinc oxide substrate.
Specifically, the substrate is a sapphire substrate, which is the most commonly used GaN-based LED substrate material at present, and the sapphire substrate has the advantages of mature preparation process, low price, easy cleaning and processing and good stability at high temperature.
Step S02, depositing a buffer layer on the substrate.
Specifically, an AlN buffer layer is deposited in the PVD (physical vapor deposition) application material, the thickness of the AlN buffer layer is 15 nm, a nucleation center which is the same as the substrate orientation is provided by adopting the AlN buffer layer, the stress generated by lattice mismatch between GaN and the substrate and the thermal stress generated by thermal expansion coefficient mismatch are released, a flat nucleation surface is provided by further growth, and the contact angle of nucleation growth is reduced, so that island-shaped GaN grains can be connected into a plane in a smaller thickness, and the island-shaped GaN grains are converted into two-dimensional epitaxial growth.
Step S03, preprocessing the substrate on which the buffer layer is deposited;
Specifically, the sapphire substrate plated with the AlN buffer layer is transferred into MOCVD, pretreatment is carried out for 1min-10min in H 2 atmosphere, the treatment temperature is 1000-1200 ℃, and nitridation treatment is carried out on the sapphire substrate, so that the crystal quality of the AlN buffer layer is improved, and the crystal quality of a subsequent deposited GaN epitaxial layer can be effectively improved.
Step S04, depositing an undoped GaN layer on the buffer layer.
Optionally, the undoped GaN layer is grown at 1050-1200deg.C, under a pressure of 100-600 torr, and a thickness of 1-5 um.
Specifically, the growth temperature of the undoped GaN layer is 1100 ℃, the growth pressure is 150torr, the growth thickness is 2um-3um, the growth temperature of the undoped GaN layer is higher, the pressure is lower, the quality of the prepared GaN crystal is better, meanwhile, the thickness is increased along with the increase of the GaN thickness, the compressive stress can be released through stacking faults, the line defects are reduced, the crystal quality is improved, the reverse leakage current is reduced, the consumption of Ga source materials is larger by improving the GaN layer thickness, and the epitaxial cost of an LED is greatly improved, so that the conventional undoped GaN of an LED epitaxial wafer is usually grown for 2um-3um, the production cost is saved, and the GaN material has higher crystal quality.
And S05, depositing an n-type GaN layer on the undoped GaN layer.
Optionally, the growth temperature of the n-type GaN layer is 1050-1200 ℃, the pressure is 100-600 torr, the thickness is 2-3 um, and the Si doping concentration is 1E+19atoms/cm 3-5E+19atoms/cm3.
Specifically, the growth temperature of the n-type GaN layer is 1120 ℃, the growth pressure is 100torr, the growth thickness is 2um-3um, the Si doping concentration is 2.5E+19atoms/cm 3, firstly, the n-type GaN layer provides sufficient electrons for LED luminescence, secondly, the resistivity of the n-type GaN layer is higher than that of a transparent electrode on p-GaN, so that the sufficient Si doping can effectively reduce the resistivity of the n-type GaN layer, and finally, the sufficient thickness of the n-type GaN can effectively release the luminous efficiency of the stress LED.
Step S06, depositing an active layer on the n-type GaN layer.
The active layer comprises a plurality of composite quantum well layers and quantum barrier layers which are alternately stacked, wherein the composite quantum well layers comprise a polarization regulating layer (In gradual change P-type In xGa1-x N layer), a first quantum well sub-layer (In yGa1-y N layer) and a second quantum well sub-layer (low-temperature GaN layer), the second quantum well sub-layer (low-temperature GaN layer) is kept at the original temperature, pressure and atmosphere growth pause for a plurality of seconds after deposition, and then a lattice matching layer (Al gradual change Al zGa1-z N layer) is continuously deposited.
Optionally, a polarization control layer (In graded P-type In xGa1-x N layer) is deposited on the N-type GaN layer, the thickness is 0.1nm-5nm, the deposition temperature is 700-900 ℃, the temperature is gradually reduced, the pressure is 50-300 torr, the atmosphere is N 2/H2/NH3, the In component is 0.01-0.5, the doping concentration of Mg is 1E+17atoms/cm 3-1E+18atoms/cm3. The In graded N-type In xGa1-x N layer reduces lattice mismatch of the InGaN quantum well layer and the GaN layer barrier layer through component change, reduces defects caused by stress, improves crystal quality of the quantum well layer, reduces non-radiative recombination efficiency of the quantum well layer, and can regulate and control polarization electric field of the quantum well and reduce polarization effect of the quantum well by doping Mg.
Optionally, a first quantum well sub-layer (In yGa1-y N layer) is deposited on the polarization control layer (In graded P-type In xGa1-x N layer) at a thickness of 1nm-10nm, a deposition temperature of 700-900 ℃, a deposition pressure of 50-300 torr, an atmosphere of N 2/NH3 and an In composition of 0.01-0.5. The thickness of the InGaN quantum well is smaller than the Debroil wavelength of electrons, and the energy levels of the electrons and the holes are discrete quantized energy levels, so that the InGaN quantum well has obvious quantum confinement effect. Potential energy valleys are generated In the In-rich region of the InGaN layer, the In-rich region becomes potential wells of carriers, electrons and holes are easy to capture by the potential wells and recombine to emit light when injected, the probability of non-radiative recombination caused by dislocation capture is greatly reduced, and the luminous efficiency of the light-emitting diode is improved.
Optionally, a second quantum well sub-layer (low temperature GaN layer) is deposited on the first quantum well sub-layer (In yGa1-y N layer) at a thickness of 0.1nm-5nm, a deposition temperature of 700-900 ℃, a pressure of 50-300 torr, and an atmosphere of N 2/NH3. And after the second quantum well sub-layer (low temperature GaN layer) is deposited, the original temperature, pressure and atmosphere growth are kept for 5-100 seconds. The second quantum well sub-layer (low temperature GaN layer) reduces the surface segregation of In atoms, and the growth pause time can improve the formation of an In-rich region of the first quantum well sub-layer (In yGa1-y N layer) and the radiation recombination efficiency of the first quantum well sub-layer (In yGa1-y N layer).
Optionally, a lattice matching layer (Al graded Al zGa1-z N layer) is deposited on the second quantum well sub-layer (low temperature GaN layer) with a thickness of 0.5nm-10nm, a deposition temperature of 700-900 ℃, a temperature gradually rising, a pressure of 50-300 torr, an atmosphere of N 2/NH3 and an Al composition of 0.01-0.5. The lattice matching layer Al graded Al zGa1-z N layer can reduce lattice mismatch through Al component change, and reduce polarization effect generated by lattice mismatch.
Optionally, the quantum barrier layer is an AlGaN/GaN layer, the growth temperature is 800-1000 ℃, the thickness is 5nm-50 nm, the growth pressure is 50-500 torr, and the Al component is 0.01-0.5. The proper quantum barrier layer can not only reduce non-radiative recombination caused by overflow of electrons to the P-type layer, but also improve the recombination efficiency of electrons and holes in the quantum well.
Alternatively, the composite quantum well layer and the quantum barrier layer of the active layer are alternately laminated for 1 to 20 cycles. And growing a multi-period active layer to improve quantum confinement effect, wherein electrons and holes are localized in the multi-quantum well, so that overlapping of wave functions of the electrons and the holes is improved, and further, the radiation recombination rate is improved.
Specifically, a polarization control layer (In graded P-type In xGa1-x N layer) is deposited on the N-type GaN layer, the thickness is 1.5nm, the deposition temperature is gradually reduced by 790 ℃ at 850 ℃, the pressure is 200torr, the atmosphere is N 2/H2/NH3, the In component is gradually increased by 0.15, and the Mg doping concentration is 6E+17atoms/cm 3. And depositing a first quantum well sub-layer (In yGa1-y N layer) on the polarization control layer (In graded P-type In xGa1-x N layer) at a thickness of 3.5 and nm, wherein the deposition temperature is 790 ℃, the pressure is 200torr, the atmosphere is N 2/NH3, and the In component is 0.15. A second quantum well sub-layer (low temperature GaN layer) was deposited on the first quantum well sub-layer (In yGa1-y N layer) to a thickness of 2: 2 nm, at 795 ℃, under a pressure of 200: 200torr, in an atmosphere of N 2/NH3. And after the second quantum well sub-layer (low-temperature GaN layer) is deposited, the original temperature, pressure and atmosphere growth are kept for 15 seconds. And depositing a lattice matching layer (Al graded Al zGa1-z N layer) on the second quantum well sub-layer (the low-temperature GaN layer), wherein the thickness is 3nm, the deposition temperature is 700-900 ℃, the temperature is gradually increased, the pressure is 50-300 torr, the atmosphere is N 2/NH3, and the Al component is gradually increased by 0.05 to 0.1. The quantum barrier layer is an AlGaN/GaN layer, the growth temperature is 870 ℃, the thickness is 10nm, the growth pressure is 200torr, and the Al component is 0.1. The composite quantum well layer and the quantum barrier layer of the active layer are alternately laminated for 11 periods.
The invention has the beneficial effects that the In graded N-type In xGa1-x N layer reduces lattice mismatch of the InGaN quantum well layer and the GaN layer barrier layer through component change, reduces defects caused by stress, improves crystal quality of the quantum well layer, reduces non-radiative recombination efficiency of the quantum well layer, and can regulate and control polarization electric field of the quantum well and reduce polarization effect of the quantum well by doping Mg. The thickness of the InGaN quantum well is smaller than the Debroil wavelength of electrons, and the energy levels of the electrons and the holes are discrete quantized energy levels, so that the InGaN quantum well has obvious quantum confinement effect. Potential energy valleys are generated In the In-rich region of the InGaN layer, the In-rich region becomes potential wells of carriers, electrons and holes are easy to capture by the potential wells and recombine to emit light when injected, the probability of non-radiative recombination caused by dislocation capture is greatly reduced, and the luminous efficiency of the light-emitting diode is improved. The second quantum well sub-layer (low temperature GaN layer) reduces the surface segregation of In atoms, and the growth pause time can improve the formation of an In-rich region of the first quantum well sub-layer (In yGa1-y N layer) and the radiation recombination efficiency of the first quantum well sub-layer (In yGa1-y N layer). The lattice matching layer Al graded Al zGa1-z N layer can reduce lattice mismatch through Al component change, and reduce polarization effect generated by lattice mismatch. The proper quantum barrier layer can not only reduce non-radiative recombination caused by overflow of electrons to the P-type layer, but also improve the recombination efficiency of electrons and holes in the quantum well. And growing a multi-period active layer to improve quantum confinement effect, wherein electrons and holes are localized in the multi-quantum well, so that overlapping of wave functions of the electrons and the holes is improved, and further, the radiation recombination rate is improved. Therefore, the invention improves the crystal quality of the quantum well layer, reduces the polarization effect of the quantum well layer, improves the radiation recombination efficiency of the active layer and improves the luminous efficiency of the light-emitting diode.
Step S07, depositing an electron blocking layer on the active layer.
Optionally, the electron blocking layer is AlInGaN with the thickness of 10nm-40nm, the growth temperature of 900-1000 ℃ and the pressure of 100-300 torr, wherein the Al component is 0.01-0.1, and the in component concentration is 0.01-0.2.
Specifically, the electron blocking layer is AlInGaN with the thickness of 15nm, wherein the concentration of Al component is 0.1, the concentration of in component is 0.01, the growth temperature is 965 ℃, the growth pressure is 200torr, not only can the electron overflow be effectively limited, but also the blocking of holes can be reduced, the injection efficiency of the holes to the quantum well is improved, the auger recombination of carriers is reduced, and the luminous efficiency of the light emitting diode is improved.
And step S08, depositing a P-type GaN layer on the electron blocking layer.
Optionally, the growth temperature of the P-type GaN layer is 900-1050 ℃, the thickness is 10-50 nm, the growth pressure is 100-600 torr, and the doping concentration of Mg is 1E+19atoms/cm 3-1E+21atoms/cm3.
Specifically, the growth temperature of the P-type GaN layer is 985 ℃, the thickness is 15nm, the growth pressure is 200torr, the doping concentration of Mg is 1E+20atoms/cm 3, the crystal quality is destroyed when the doping concentration of Mg is too high, and the hole concentration is influenced when the doping concentration is low. Meanwhile, for the LED structure with the V-shaped pits, the higher growth temperature of the P-type GaN layer is favorable for combining the V-shaped pits, so that the LED epitaxial wafer with a smooth surface is obtained.
And preparing the sample A and the sample B into 10 mil 24 mil chips by using the same chip process conditions, wherein the sample A is the chip prepared by the current mass production, the sample B is the chip prepared by the scheme, the two samples respectively extract 300 LED chips, and the two samples are tested under the current of 120 mA/60 mA, so that the photoelectric efficiency is improved by 1% -5%, and the other products have good electrical properties.
In summary, according to the led epitaxial wafer and the method for manufacturing the same In the embodiments of the present invention, the In graded N-type In xGa1-x N layer reduces lattice mismatch between the InGaN quantum well layer and the GaN layer barrier layer through component variation, reduces defects caused by stress, improves crystal quality of the quantum well layer, reduces non-radiative recombination efficiency of the quantum well layer, and In addition, mg doping can also regulate polarization electric field of the quantum well, and reduces polarization effect of the quantum well. The thickness of the InGaN quantum well is smaller than the Debroil wavelength of electrons, and the energy levels of the electrons and the holes are discrete quantized energy levels, so that the InGaN quantum well has obvious quantum confinement effect. Potential energy valleys are generated In the In-rich region of the InGaN layer, the In-rich region becomes potential wells of carriers, electrons and holes are easy to capture by the potential wells and recombine to emit light when injected, the probability of non-radiative recombination caused by dislocation capture is greatly reduced, and the luminous efficiency of the light-emitting diode is improved. The second quantum well sub-layer (low temperature GaN layer) reduces the surface segregation of In atoms, and the growth pause time can improve the formation of an In-rich region of the first quantum well sub-layer (In yGa1-y N layer) and the radiation recombination efficiency of the first quantum well sub-layer (In yGa1-y N layer). The lattice matching layer Al graded Al zGa1-z N layer can reduce lattice mismatch through Al component change, and reduce polarization effect generated by lattice mismatch. The proper quantum barrier layer can not only reduce non-radiative recombination caused by overflow of electrons to the P-type layer, but also improve the recombination efficiency of electrons and holes in the quantum well. And growing a multi-period active layer to improve quantum confinement effect, wherein electrons and holes are localized in the multi-quantum well, so that overlapping of wave functions of the electrons and the holes is improved, and further, the radiation recombination rate is improved. Therefore, the invention improves the crystal quality of the quantum well layer, reduces the polarization effect of the quantum well layer, improves the radiation recombination efficiency of the active layer and improves the luminous efficiency of the light-emitting diode.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing examples illustrate only a few embodiments of the invention and are described in detail herein without thereby limiting the scope of the invention. It should be noted that it is possible for a person skilled in the art to make several variations and modifications without departing from the inventive concept, which are all within the scope of protection of the present invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (8)
1. The light-emitting diode epitaxial wafer is characterized by comprising a substrate, a first semiconductor layer, an active layer and a second semiconductor layer which are sequentially deposited on the substrate, wherein the active layer comprises a plurality of alternately laminated composite quantum well layers and quantum barrier layers, the composite quantum well layers comprise a polarization regulation layer, a first quantum well sub-layer, a second quantum well sub-layer and a lattice matching layer which are sequentially deposited on the first semiconductor layer, wherein after the second quantum well sub-layer is deposited, the lattice matching layer is deposited after the temperature, the pressure and the atmosphere of the second quantum well sub-layer are kept to be stopped for a preset time, the polarization regulation layer is an In gradual change P-type In xGa1-x N layer, and the In component of the In gradual change P-type In xGa1-x N layer is gradually increased;
The first quantum well sub-layer is an In yGa1-y N layer, the thickness range of the In yGa1-y N layer is 1nm-10nm, the In component range of the In yGa1-y N layer is 0.01-0.5, the second quantum well sub-layer is a low-temperature GaN layer, the thickness range of the low-temperature GaN layer is 0.1nm-5nm, the temperature range of the deposited low-temperature GaN layer is 700-900 ℃, the lattice matching layer is an Al graded Al zGa1-z N layer, the thickness range of the Al graded Al zGa1-z N layer is 0.5nm-10nm, the Al component range of the Al graded Al zGa1-z N layer is 0.01-0.5, the Al component range of the Al graded Al zGa1-z N layer is gradually increased, the quantum barrier layer is an AlGaN/GaN layer, the Al component range of the AlGaN/GaN layer is 0.01-0.5, and the pause time is 5-100 seconds so as to improve the first quantum well region forming rich region and improve the first quantum well composite radiation efficiency of the first quantum well sub-layer.
2. The light-emitting diode epitaxial wafer according to claim 1, wherein the thickness of the In graded P-type In xGa1-x N layer is In the range of 0.1nm to 5nm, and the In composition of the In graded P-type In xGa1-x N layer is In the range of 0.01 to 0.5.
3. The light-emitting diode epitaxial wafer according to claim 1, wherein the composite quantum well layer and the quantum barrier layer of the active layer are alternately laminated for 11 to 20 cycles.
4. The light emitting diode epitaxial wafer of claim 1, wherein the first semiconductor layer comprises a buffer layer, an undoped GaN layer and an n-type GaN layer, and the second semiconductor layer comprises an electron blocking layer and a P-type GaN layer, wherein the buffer layer, the undoped GaN layer, the n-type GaN layer, the active layer, the electron blocking layer and the P-type GaN layer are sequentially deposited on the substrate.
5. A method for preparing the light-emitting diode epitaxial wafer according to any one of claims 1 to 4, comprising the steps of:
Providing a substrate, and sequentially depositing a buffer layer, an undoped GaN layer and an n-type GaN layer on the substrate;
Depositing an active layer on the N-type GaN layer, wherein the active layer comprises a plurality of composite quantum well layers and quantum barrier layers which are alternately laminated, the composite quantum well layer comprises a polarization regulation layer, a first quantum well sub-layer, a second quantum well sub-layer and a lattice matching layer which are sequentially deposited on the first semiconductor layer, wherein after the second quantum well sub-layer is deposited, the lattice matching layer is deposited after keeping the temperature, the pressure and the atmosphere for a preset time for depositing the second quantum well sub-layer, the polarization regulation layer is an In gradual change P-type In xGa1-x N layer, and the In component of the In gradual change P-type In xGa1-x N layer gradually rises;
and depositing an electron blocking layer and a P-type GaN layer on the active layer in sequence.
6. The method of claim 5, wherein the temperature range for depositing the polarization controlling layer is 700 ℃ to 900 ℃, the pressure is 50torr to 300torr, the atmosphere is N 2/H2/NH3, and the Mg doping concentration is 1e+17atoms/cm 3-1E+18atoms/cm3, wherein the temperature for depositing the polarization controlling layer is gradually decreased.
7. The method of claim 5, wherein the first quantum well sub-layer is deposited at a temperature ranging from 700 ℃ to 900 ℃, a pressure ranging from 50torr to 300torr, and an atmosphere of N 2/NH3; the temperature range of the second quantum well sub-layer is 700 ℃ to 900 ℃, the pressure range is 50torr to 300torr, and the atmosphere is N 2/NH3.
8. The method of claim 5, wherein the lattice matching layer is deposited at a temperature ranging from 700 ℃ to 900 ℃ and a pressure ranging from 50torr to 300torr, in an atmosphere of N 2/NH3, and wherein the lattice matching layer is deposited at a gradually increasing temperature.
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