CN116885061A - High-light-efficiency light-emitting diode epitaxial wafer and preparation method thereof - Google Patents

High-light-efficiency light-emitting diode epitaxial wafer and preparation method thereof Download PDF

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CN116885061A
CN116885061A CN202310991563.0A CN202310991563A CN116885061A CN 116885061 A CN116885061 A CN 116885061A CN 202310991563 A CN202310991563 A CN 202310991563A CN 116885061 A CN116885061 A CN 116885061A
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layer
hole
type
thickness
hole layer
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程龙
郑文杰
高虹
刘春杨
胡加辉
金从龙
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Jiangxi Zhao Chi Semiconductor Co Ltd
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Jiangxi Zhao Chi Semiconductor Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H01L33/325—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen characterised by the doping materials

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Abstract

The application provides a high-light-efficiency light-emitting diode epitaxial wafer and a preparation method thereof, wherein the high-light-efficiency light-emitting diode epitaxial wafer comprises a composite hole layer, the composite hole layer comprises a hole expansion layer, a first hole layer and a second hole layer which are sequentially laminated, the thickness of the first hole layer is equal to that of the second hole layer, the thicknesses of the first hole layer and the second hole layer are larger than that of the hole expansion layer, the second hole layer is a P-type YInGaN layer, wherein the Y component in the P-type YInGaN layer ranges from 0.01 to 0.5, the in component ranges from 0.01 to 0.1, the injection efficiency of holes to a quantum well layer is improved, the recombination efficiency of holes and electrons in the multi-quantum well layer is improved, and the light-emitting efficiency of the light-emitting diode is improved.

Description

High-light-efficiency light-emitting diode epitaxial wafer and preparation method thereof
Technical Field
The application belongs to the technical field of semiconductors, and particularly relates to a high-light-efficiency light-emitting diode epitaxial wafer and a preparation method thereof.
Background
In recent years, group III nitride semiconductor materials typified by GaN have been a hot spot for worldwide research due to their excellent photoelectric characteristics. In the field of solid state lighting, the application of the light source is gradually wide, and the light source has attractive prospect and wide market value.
Up to now, in commercial production or laboratory research, most of the dopants with higher doping efficiency used for growing p-type GaN by MOCVD method are Mg (i.e., cp2Mg, magnesium-dicyclopentadiene). Mg atoms enter the lattice of GaN, most of Mg atoms will exist in the form of substitution for Ga atoms, and only few Mg atoms will exist in the form of interstitial atoms in the lattice interstices of GaN. At present, p-type GaN for generating holes is mostly obtained by adopting a mode of high Mg doping, the concentration of activated Mg is low, the concentration of free holes is reduced, the light absorption is serious, and the electrical characteristics of the device are also deteriorated.
Firstly, the energy level of the Mg acceptor is deep and is about 170meV, and the ionization rate of Mg at room temperature is only about 1 percent; secondly, the thickness of the P-type GaN layer is thicker, and the light absorption effect is serious due to the heavy Mg doping; finally, since the effective mass of holes is much greater than electrons, their transport rate is also lower than electrons, and thus the quantum efficiency of holes injected into electrons is also lower.
Disclosure of Invention
In order to solve the technical problems, the application provides a high-light-efficiency light-emitting diode epitaxial wafer and a preparation method thereof, which are used for solving the technical problems that the quantum efficiency of holes injected into the epitaxial wafer is lower than that of electrons.
In one aspect, the application provides a high-light-efficiency light-emitting diode epitaxial wafer, which comprises a composite hole layer;
the composite hole layer comprises a hole expansion layer, a first hole layer and a second hole layer which are sequentially stacked, wherein the thickness of the first hole layer is equal to that of the second hole layer, the thickness of the first hole layer and the thickness of the second hole layer are larger than that of the hole expansion layer, the second hole layer is a P-type YInGaN layer, the range of Y components in the P-type YInGaN layer is 0.01-0.5, and the range of in components is 0.01-0.1.
Compared with the prior art, the application has the beneficial effects that: first, the deposited hole expansion layer (two-dimensional BN layer) can tunnel holes into the multiple quantum well layer, and prevent electrons from overflowing into the composite hole layer for non-radiative recombination due to the higher barrier. Secondly, the deposited first hole layer (P-type InGaN layer) and second hole layer (P-type YInGaN layer) can reduce the activation energy of Mg, improve the concentration of activated Mg and improve the hole concentration due to the doped In element. And thirdly, the second hole layer (the P-type YInGaN layer) is doped with Y element, so that the barrier height can be increased, two-dimensional hole gas is formed with the first hole layer (the P-type InGaN layer), the injection efficiency of holes to the quantum well layer is improved, and the recombination efficiency of holes and electrons in the multi-quantum well layer is improved. Finally, the thicknesses of the first hole layer (the P-type InGaN layer) and the second hole layer (the P-type YInGaN layer) are thinner, so that the light absorption effect can be reduced, and the light emitting efficiency of the light emitting diode can be improved.
Further, the thickness of the hole expansion layer is in the range of 0.5 nm-5 nm, the thickness of the first hole layer is in the range of 1 nm-50 nm, and the thickness of the second hole layer is in the range of 1 nm-50 nm.
Further, the first hole layer is a P-type InGaN layer, and the In component In the P-type InGaN layer ranges from 0.01 to 0.2.
Further, the semiconductor device further comprises a substrate, a buffer layer, an undoped GaN layer, an n-type GaN layer, a multiple quantum well layer, a P-type GaN layer and an electron blocking layer, wherein the buffer layer, the undoped GaN layer, the n-type GaN layer, the multiple quantum well layer, the composite hole layer, the P-type GaN layer and the electron blocking layer are sequentially deposited on the substrate.
Further, the multiple quantum well layer includes a plurality of InGaN quantum well layers and AlGaN quantum barrier layers alternately stacked.
Further, the number of periods of alternating lamination of the multiple quantum well layers is in the range of 6 to 12.
On the other hand, the application also provides a preparation method of the high-light-efficiency light-emitting diode epitaxial wafer, which comprises the following steps:
providing a substrate;
depositing a buffer layer on the substrate;
depositing an undoped GaN layer on the buffer layer;
depositing an n-type GaN layer on the undoped GaN layer;
depositing a multi-quantum well layer on the n-type AlGaN layer;
depositing a composite hole layer on the multiple quantum well layer, wherein the composite hole layer comprises a hole expansion layer, a first hole layer and a second hole layer which are sequentially laminated, the thickness of the first hole layer is equal to that of the second hole layer, the thickness of the first hole layer and the thickness of the second hole layer are larger than that of the hole expansion layer, the second hole layer is a P-type YInGaN layer, wherein the range of Y components in the P-type YInGaN layer is 0.01-0.5, and the range of in components is 0.01-0.1;
depositing an electron blocking layer on the composite hole layer;
and depositing a P-type GaN layer on the electron blocking layer.
Further, the first hole layer and the second hole layer have a Mg doping concentration ranging from 1E+19atoms/cm 3 ～1E+21atoms/cm 3 。
Further, the hole expansion layer grows in atmosphere N 2 /NH 3 The ratio range is 1:10-10:1, and the growth atmosphere N of the first hole layer and the second hole layer is that of the first hole layer 2 /H 2 /NH 3 The ratio range is 1:1:1 to 1:10:10.
Further, the growth temperature of the hole expansion layer is in a range of 800-900 ℃, the growth temperature of the first hole layer and the second hole layer is in a range of 700-800 ℃, and the growth pressure of the hole expansion layer, the first hole layer and the second hole layer is in a range of 50-300 torr.
Drawings
Fig. 1 is a schematic structural diagram of a high-light-efficiency led epitaxial wafer according to a first embodiment of the present application.
Fig. 2 is a flowchart of a method for manufacturing a high-efficiency led epitaxial wafer according to a second embodiment of the present application.
Description of main reference numerals: 100. a substrate; 200. a buffer layer; 300. an undoped GaN layer; 400. an n-type GaN layer; 500. a multiple quantum well layer; 600. a composite hole layer; 610. a hole expansion layer; 620. a first hole layer; 630. a second hole layer; 700. an electron blocking layer; 800. a p-type GaN layer.
The application will be further described in the following detailed description in conjunction with the above-described figures.
Detailed Description
In order that the application may be readily understood, a more complete description of the application will be rendered by reference to the appended drawings. Several embodiments of the application are presented in the figures. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Example 1
Referring to FIG. 1, a high light efficiency LED epitaxial wafer according to a first embodiment of the present application comprises
And the substrate is sequentially deposited with a buffer layer, an undoped GaN layer, an n-type GaN layer, a multiple quantum well layer, a composite hole layer, an electron blocking layer and a P-type GaN layer.
The composite hole layer comprises a hole expansion layer, a first hole layer and a second hole layer which are sequentially stacked, wherein the thickness of the first hole layer is equal to that of the second hole layer, the thickness of the first hole layer and the thickness of the second hole layer are larger than that of the hole expansion layer, so that holes of the hole expansion layer tunnel into the multiple quantum well layer, and holes generated by the first hole layer and the second hole layer are composited with electrons. It should be noted that, the thickness range of the hole expansion layer (two-dimensional BN layer) can just enable holes to tunnel into the multi-quantum well layer, and the higher potential barrier can prevent electrons from overflowing into the composite hole layer to perform non-radiative recombination, if the thickness can cause the potential barrier to be too high, holes are limited to enter the multi-quantum well layer. Sufficient holes and electrons generated by the proper thickness of the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) are recombined, and the light absorption of the first hole layer and the second hole layer is serious and the luminous efficiency is reduced if the thickness is too thick.
Specifically, the hole expansion layer is a two-dimensional BN layer, the first hole layer is P-type InGaN layer thickness, and the second hole layer is P-type YInGaN layer.
Further, the thickness of the hole expansion layer is in the range of 0.5 nm-5 nm, the thickness of the first hole layer is in the range of 1 nm-50 nm, and the thickness of the second hole layer is in the range of 1 nm-50 nm. Optionally, the hole extension layer has a thickness of 0.5nm, 1nm, 2nm, 3nm or 5nm, the first hole layer has a thickness of 1nm, 5nm, 10nm, 15nm or 50nm, and the second hole layer has a thickness of 1nm, 5nm, 10nm, 15nm or 50nm. In this embodiment, the hole expansion layer (two-dimensional BN layer) has a thickness of 2nm, the first hole layer (P-type InGaN layer) has a thickness of 10nm, and the second hole layer (P-type YInGaN layer) has a thickness of 10nm.
Further, the In composition of the first hole layer (P-type InGaN layer) is In the range of 0.01 to 0.2. The second hole layer (P-type YInGaN layer) has a Y component ranging from 0.01 to 0.5 and an in component ranging from 0.01 to 0.1. Optionally, the In composition In the first hole layer (P-type InGaN layer) is 0.01, 0.05, 0.1, 0.15 or 0.2, the Y composition In the second hole layer (P-type YInGaN layer) is 0.01, 0.05, 0.1, 0.15 or 0.5, and the In composition In the second hole layer (P-type YInGaN layer) is 0.01, 0.02, 0.05, 0.07 or 0.1. In this embodiment, the first hole layer (P-type InGaN layer) has an In composition of 0.1, the second hole layer (P-type YInGaN layer) has a Y composition of 0.1, and the In composition of 0.05. Wherein Y is Yttrium (Yttrium) which is a gray-black metal element.
Further, the multiple quantum well layer comprises a plurality of InGaN quantum well layers and AlGaN quantum barrier layers which are alternately stacked, and the number of the alternately stacked periods of the multiple quantum well layers ranges from 6 to 12. Preferably, the number of periods of alternating lamination of the multiple quantum well layers is in the range of 6, 8, 10, 11 or 12. In this embodiment, the number of periods of alternating lamination of the multiple quantum well layers is in the range of 10.
Further, the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) have Mg doping concentration in the range of 1E+19atoms/cm 3 ～1E+21atoms/cm 3 The Mg doping concentration of the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) is 1E+19atoms/cm 3 、1E+20atoms/cm 3 Or 1E+21atoms/cm 3 . In the present embodiment, the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) have a Mg doping concentration of 1E+20atoms/cm 3 。
In order to facilitate the subsequent photoelectric test and understanding, the application introduces a first experimental group, a second experimental group, a third experimental group, a fourth experimental group, a fifth experimental group, a sixth experimental group, a seventh experimental group, a eighth experimental group, a ninth experimental group and a control group;
the first experimental group, the second experimental group, the third experimental group, the fourth experimental group, the fifth experimental group, the sixth experimental group, the seventh experimental group, the eighth experimental group and the ninth experimental group all adopt a high-light-efficiency light-emitting diode epitaxial wafer as described in the first embodiment, which comprises the composite hole layer in the first embodiment, and the control group adopts the high-light-efficiency light-emitting diode epitaxial wafer in the prior art, and the structure is the same as that of the first embodiment, but the differences are as follows: the control group used the prior art no-recombination hole layer.
Specifically, in experiment group I, the thickness of the hole expansion layer (two-dimensional BN layer) is 2nm, the thickness of the first hole layer (P-type InGaN layer) is 10nm, the thickness of the second hole layer (P-type YInGaN layer) is 10nm, the In composition of the first hole layer (P-type InGaN layer) is 0.1, the Y composition of the second hole layer (P-type YInGaN layer) is 0.1, the In composition of the second hole layer (P-type YInGaN layer) is 0.05, and the Mg doping concentration of the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) is 1E+20atoms/cm 3 。
The hole expansion layer (two-dimensional BN layer) In the experiment group II has a thickness of 3nm, the first hole layer (P-type InGaN layer) has a thickness of 15nm, the second hole layer (P-type YInGaN layer) has a thickness of 15nm, the first hole layer (P-type InGaN layer) has an In composition of 0.1, the second hole layer (P-type YInGaN layer) has a Y composition of 0.1, the second hole layer (P-type YInGaN layer) has an In composition of 0.05, and the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) have an Mg doping concentration of 1E+20atoms/cm 3 。
In the third experiment group, the thickness of the hole expansion layer (two-dimensional BN layer) is 1nm, the thickness of the first hole layer (P-type InGaN layer) is 5nm, the thickness of the second hole layer (P-type YInGaN layer) is 5nm, the In component of the first hole layer (P-type InGaN layer) is 0.1, the Y component of the second hole layer (P-type YInGaN layer) is 0.1, the In component of the second hole layer (P-type YInGaN layer) is 0.05, and the Mg doping concentration of the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) is 1E+20atoms/cm 3 。
In the fourth experiment group, the thickness of the hole expansion layer (two-dimensional BN layer) is 2nm, the thickness of the first hole layer (P-type InGaN layer) is 10nm, the thickness of the second hole layer (P-type YInGaN layer) is 10nm, the In composition of the first hole layer (P-type InGaN layer) is 0.15, the Y composition of the second hole layer (P-type YInGaN layer) is 0.1, the In composition of the second hole layer (P-type YInGaN layer) is 0.05, and the Mg doping concentration of the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) is 1E+20atoms/cm 3 。
The thickness of the hole expansion layer (two-dimensional BN layer) in the experiment group V is 2nm, the thickness of the first hole layer (P-type InGaN layer) is 10nm, the thickness of the second hole layer (P-type YInGaN layer) is 10nm, and the first hole layer is [ ], the second hole layer isP-type InGaN layer) In composition of 0.05, a second hole layer (P-type YInGaN layer) Y composition of 0.1, a second hole layer (P-type YInGaN layer) In composition of 0.05, and Mg doping concentrations of the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) of 1e+20atoms/cm 3 。
In the sixth experimental group, the hole expansion layer (two-dimensional BN layer) had a thickness of 2nm, the first hole layer (P-type InGaN layer) had a thickness of 10nm, the second hole layer (P-type YInGaN layer) had a thickness of 10nm, the first hole layer (P-type InGaN layer) had an In composition of 0.1, the second hole layer (P-type YInGaN layer) had a Y composition of 0.15, the second hole layer (P-type YInGaN layer) had an In composition of 0.07, and the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) had an Mg doping concentration of 1E+20atoms/cm 3 。
In experiment group seven, the hole expansion layer (two-dimensional BN layer) had a thickness of 2nm, the first hole layer (P-type InGaN layer) had a thickness of 10nm, the second hole layer (P-type YInGaN layer) had a thickness of 10nm, the first hole layer (P-type InGaN layer) had an In composition of 0.1, the second hole layer (P-type YInGaN layer) had a Y composition of 0.05, the second hole layer (P-type YInGaN layer) had an In composition of 0.02, and the second hole layer (P-type YInGaN layer) had an Mg doping concentration of 1E+20atoms/cm 3 。
In the eighth experimental group, the hole expansion layer (two-dimensional BN layer) had a thickness of 2nm, the first hole layer (P-type InGaN layer) had a thickness of 10nm, the second hole layer (P-type YInGaN layer) had a thickness of 10nm, the first hole layer (P-type InGaN layer) had an In composition of 0.1, the second hole layer (P-type YInGaN layer) had a Y composition of 0.1, the second hole layer (P-type YInGaN layer) had an In composition of 0.05 the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) had an Mg doping concentration of 1E+20atoms/cm 3 。
In the eighth experimental group, the hole expansion layer (two-dimensional BN layer) had a thickness of 2nm, the first hole layer (P-type InGaN layer) had a thickness of 10nm, the second hole layer (P-type YInGaN layer) had a thickness of 10nm, the first hole layer (P-type InGaN layer) had an In composition of 0.1, the second hole layer (P-type YInGaN layer) had a Y composition of 0.1, the second hole layer (P-type YInGaN layer) had an In composition of 0.05 the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) had an Mg doping concentration of 1E+20atoms/cm 3 。
The hole-expanding layer (two-dimensional BN layer) in experiment group nine was 2nm thick, the first hole layerThe thickness of the (P-type InGaN layer) is 10nm, the thickness of the second hole layer (P-type YInGaN layer) is 10nm, the In component of the first hole layer (P-type InGaN layer) is 0.1, the Y component of the second hole layer (P-type YInGaN layer) is 0.1, the In component of the second hole layer (P-type YInGaN layer) is 0.05, and the Mg doping concentration of the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) is 1E+19atoms/cm 3 。
And carrying out photoelectric tests on the high-light-efficiency light-emitting diode epitaxial wafers in the first experimental group, the second experimental group, the third experimental group, the fourth experimental group, the fifth experimental group, the sixth experimental group, the seventh experimental group, the eighth experimental group, the ninth experimental group and the control group, wherein the test results are shown in table 1:
as can be seen from table 1, the light efficiency of the led epitaxial wafer with high light efficiency provided by the control group is used as a reference, so that the light efficiency is improved by 0%, the light efficiency of the control group is improved by 5%, the light efficiency of the control group is improved by 3.5%, the light efficiency of the control group is improved by 2.8%, the light efficiency of the control group is improved by four, the light efficiency of the control group is improved by 3.2%, the light efficiency of the control group is improved by five, the light efficiency of the control group is improved by 2%, the light efficiency of the control group is improved by six, the light efficiency of the control group is improved by 3.5%, the light efficiency of the control group is improved by seven, the light efficiency of the control group is improved by 1.8%, the light efficiency of the control group is improved by eight, the light efficiency of the control group is improved by 2.5%, the light efficiency of the control group is improved by nine, and the light efficiency of the control group is improved by 1.8%.
Therefore, compared with the control group, the light efficiency of the high-light-efficiency light-emitting diode epitaxial wafer provided by the experimental group I is improved by 5% to the maximum.
Example two
Referring to fig. 2, a method for preparing a high light efficiency led epitaxial wafer according to a second embodiment of the present application is shown, the method includes the following steps: steps S01 to S09;
step S01, providing a substrate;
the substrate can be one of a sapphire substrate, a SiO2 sapphire composite substrate, a silicon carbide substrate, a gallium nitride substrate and a zinc oxide substrate.
Specifically, the substrate is a sapphire substrate, which is the most commonly used GaN-based LED substrate material at present, and the sapphire substrate has the advantages of mature preparation process, low price, easy cleaning and processing and good stability at high temperature.
Step S02, depositing a buffer layer on the substrate.
Preferably, the buffer layer is an AlN buffer layer or a GaN buffer layer, and the thickness of the buffer layer ranges from 10nm to 50nm.
Specifically, an AlN buffer layer is deposited in the PVD (physical vapor deposition) application material, the thickness of the AlN buffer layer is 15nm, the AlN buffer layer provides a nucleation center which is the same as the substrate orientation, stress generated by lattice mismatch between GaN and the substrate and thermal stress generated by thermal expansion coefficient mismatch are released, further growth provides a flat nucleation surface, and the contact angle of nucleation growth is reduced to enable island-shaped GaN crystal grains to be connected into a plane in a smaller thickness, so that the island-shaped GaN crystal grains are converted into two-dimensional epitaxial growth.
Step S03, preprocessing the substrate on which the buffer layer is deposited.
Specifically, the sapphire substrate plated with the AlN buffer layer is transferred into MOCVD, pretreatment is carried out for 1-10 min in H2 atmosphere, the treatment temperature is 1000-1200 ℃, and nitridation treatment is carried out on the sapphire substrate, so that the crystal quality of the AlN buffer layer is improved, and the crystal quality of a subsequent deposited GaN epitaxial layer can be effectively improved.
And step S04, depositing an undoped GaN layer on the processed buffer layer.
Optionally, the undoped GaN layer grows at 1050-1200 deg.C, at 100-600 torr and at 1-5 um thickness.
Specifically, the growth temperature of the undoped GaN layer is 1100 ℃, the growth pressure is 150torr, the growth thickness is 2-3 um, the growth temperature of the undoped GaN layer is higher, the pressure is lower, the prepared GaN crystal has better quality, meanwhile, the thickness is increased along with the thickness of the GaN, the compressive stress can be released through stacking faults, the line defects are reduced, the crystal quality is improved, the reverse leakage is reduced, the consumption of Ga source materials by improving the thickness of the GaN layer is larger, and the epitaxial cost of an LED is greatly improved, so that the conventional undoped GaN of an LED epitaxial wafer is usually grown for 2-3 um, the production cost is saved, and the GaN material has higher crystal quality.
And S05, depositing an n-type GaN layer on the undoped GaN layer.
Optionally, the growth temperature range of the n-type GaN layer is 1050-1200 ℃, the pressure range is 100-600 torr, the thickness range is 2-3 um, and the Si doping concentration range is 1E+19atoms/cm 3 ～5E+19atoms/cm 3 。
Specifically, the growth temperature of the n-type GaN layer is 1120 ℃, the growth pressure is 100torr, the growth thickness is 2-3 um, and the doping concentration of Si is 2.5E+19atoms/cm 3 Firstly, the n-type GaN layer provides sufficient electrons for LED luminescence, secondly, the resistivity of the n-type GaN layer is higher than that of the transparent electrode on the p-GaN layer, so that the resistivity of the n-type GaN layer can be effectively reduced due to sufficient Si doping, and finally, the luminous efficiency of the stress LED can be effectively released due to sufficient thickness of the n-type GaN.
And step S06, depositing a multi-quantum well layer on the n-type GaN layer.
Optionally, the multiple quantum well layer is a plurality of InGaN quantum well layers and AlGaN quantum barrier layers which are alternately stacked, the stacking cycle number range is 6-12, wherein the growth temperature range of the InGaN quantum well layer is 790-810 ℃, the thickness range is 2-5 nm, the growth pressure range is 50-300 torr, the growth temperature range of the AlGaN quantum barrier layer is 800-900 ℃, the thickness range is 5-15 nm, the growth pressure range is 50-300 torr, and the Al component range is 0.01-0.1.
Specifically, the multiple quantum well layers are an InGaN quantum well layer and an AlGaN quantum barrier layer which are alternately stacked, the stacking period number is 10, the growth temperature of the InGaN quantum well is 795 ℃, the thickness is 3.5nm, the pressure is 200torr, the in component is 0.22, the growth temperature of the AlGaN quantum barrier layer is 855 ℃, the thickness is 9.8nm, the growth pressure is 200torr, the Al component is 0.05, the multiple quantum well is an electron and hole recombination region, and the overlapping degree of an electron and hole wave function can be remarkably increased due to reasonable structural design, so that the luminous efficiency of the LED device is improved.
And S07, depositing a composite hole layer on the multiple quantum well layer.
The composite hole layer comprises a hole expansion layer (two-dimensional BN layer), a first hole layer (P-type InGaN layer) and a second hole layer (P-type YInGaN layer) which are sequentially deposited on the multi-quantum well layer.
Optionally, the hole expansion layer (two-dimensional BN layer) has a thickness ranging from 0.5nm to 5nm, the first hole layer (P-type InGaN layer) has a thickness ranging from 1nm to 50nm, and the second hole layer (P-type YInGaN layer) has a thickness ranging from 1nm to 50nm.
Alternatively, the first hole layer (P-type InGaN layer) has an In composition ranging from 0.01 to 0.2, the second hole layer (P-type YInGaN layer) has a Y composition ranging from 0.01 to 0.5, and the In composition ranges from 0.01 to 0.1.
Optionally, the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) have Mg doping concentrations in the range of 1E+19atoms/cm 3 ～1E+21atoms/cm 3 。
Optionally, a hole-expanding layer (two-dimensional BN layer) is grown in an atmosphere N 2 /NH 3 The ratio is 1:10-10:1, and the growth atmosphere N of the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) is that 2 /H 2 /NH 3 The ratio range is 1:1:1-1:10:10.
Optionally, the growth temperature of the hole expansion layer (two-dimensional BN layer) ranges from 800 ℃ to 900 ℃, and the growth temperature of the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) ranges from 700 ℃ to 800 ℃.
Optionally, the growth pressure of the hole expansion layer (two-dimensional BN layer), the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) ranges from 50torr to 300torr.
In this embodiment, the composite hole layer includes a hole expansion layer (two-dimensional BN layer), a first hole layer (P-type InGaN layer), and a second hole layer (P-type YInGaN layer) sequentially deposited on the multiple quantum well layer. The hole expansion layer (two-dimensional BN layer) has a thickness of 2nm, the first hole layer (P-type InGaN layer) has a thickness of 10nm, and the second hole layer (P-type YInGaN layer) has a thickness of 10nm. A first hole layer (P-type InGaN layer) having an In composition of 0.1 and a second hole layer (P-type YInGaN layer) having a Y composition0.1, in composition 0.05. The Mg doping concentration of the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) is 1E+20atoms/cm 3 . Hole expansion layer (two-dimensional BN layer) growth atmosphere N 2 /NH 3 The ratio is 3:4, and the growth atmosphere N of the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) is that 2 /H 2 /NH 3 The ratio is 1:10:6. The temperature of the hole expansion layer (two-dimensional BN layer) is 870 ℃, and the growth temperature of the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) is 760 ℃. The growth pressure of the hole expansion layer (two-dimensional BN layer), the first hole layer (P-type InGaN layer) and the second hole layer (P-type YInGaN layer) is 200torr.
The application has the beneficial effects that firstly, the deposited hole expansion layer (two-dimensional BN layer) can enable holes to tunnel into the multi-quantum well layer, and electrons are prevented from overflowing into the composite hole layer to generate non-radiative recombination due to higher potential barrier. Secondly, the deposited first hole layer (P-type InGaN layer) and second hole layer (P-type YInGaN layer) can reduce the activation energy of Mg, improve the concentration of activated Mg and improve the hole concentration due to the doped In element. And thirdly, the second hole layer (the P-type YInGaN layer) is doped with Y element, so that the barrier height can be increased, two-dimensional hole gas is formed with the first hole layer (the P-type InGaN layer), the injection efficiency of holes to the quantum well layer is improved, and the recombination efficiency of holes and electrons in the multi-quantum well layer is improved. Finally, the thicknesses of the first hole layer (the P-type InGaN layer) and the second hole layer (the P-type YInGaN layer) are thinner, so that the light absorption effect can be reduced, and the light emitting efficiency of the light emitting diode can be improved.
And step S08, depositing an electron blocking layer on the composite hole layer.
Optionally, the electron blocking layer is an AlInGaN layer, the thickness of the AlInGaN layer ranges from 10nm to 40nm, the growth temperature ranges from 900 ℃ to 1000 ℃, the pressure ranges from 100torr to 300torr, wherein the Al component ranges from 0.01 to 0.1, and the in component ranges from 0.01 to 0.2.
Specifically, the AlInGaN layer has a thickness of 15nm, wherein the Al component is 0.1, the in component is 0.05, the growth temperature is 965 ℃, and the growth pressure is 200torr, so that not only can the electron overflow be effectively limited, but also the blocking of holes can be reduced, the injection efficiency of the holes to the quantum well is improved, the auger recombination of carriers is reduced, and the luminous efficiency of the light-emitting diode is improved.
Step S09, depositing a P-type GaN layer on the electron blocking layer.
Optionally, the growth temperature range of the P-type GaN layer is 900-1050 ℃, the thickness range is 10-50 nm, the growth pressure range is 100-600 torr, and the doping concentration range of Mg is 1E+19atoms/cm 3 ～1E+21atoms/cm 3 。
Specifically, the growth temperature of the P-type GaN layer is 985 ℃, the thickness is 15nm, the growth pressure is 200torr, and the doping concentration of Mg is 2E+20atoms/cm 3 Too high a Mg doping concentration can damage the crystal quality, while a lower doping concentration can affect the hole concentration. Meanwhile, for the LED structure with the V-shaped pits, the higher growth temperature of the P-type GaN layer is favorable for combining the V-shaped pits, so that the LED epitaxial wafer with a smooth surface is obtained.
And preparing the sample A and the sample B into 10 mil-24 mil chips by using the same chip process conditions, wherein the sample A is the chip prepared by the current mass production, the sample B is the chip prepared by the scheme, the two samples respectively extract 300 LED chips, and the two samples are tested under 120mA/60mA current, so that the photoelectric efficiency is improved by 1% -5%, and other items have good electrical properties.
In summary, in the above embodiments of the present application, the deposited hole extension layer (two-dimensional BN layer) can tunnel holes into the multiple quantum well layer, and prevent electrons from overflowing into the composite hole layer to generate non-radiative recombination due to the higher barrier. Secondly, the deposited first hole layer (P-type InGaN layer) and second hole layer (P-type YInGaN layer) can reduce the activation energy of Mg, improve the concentration of activated Mg and improve the hole concentration due to the doped In element. And thirdly, the second hole layer (the P-type YInGaN layer) is doped with Y element, so that the barrier height can be increased, two-dimensional hole gas is formed with the first hole layer (the P-type InGaN layer), the injection efficiency of holes to the quantum well layer is improved, and the recombination efficiency of holes and electrons in the multi-quantum well layer is improved. Finally, the thicknesses of the first hole layer (the P-type InGaN layer) and the second hole layer (the P-type YInGaN layer) are thinner, so that the light absorption effect can be reduced, and the light emitting efficiency of the light emitting diode can be improved.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing examples illustrate only a few embodiments of the application and are described in detail herein without thereby limiting the scope of the application. It should be noted that it is possible for a person skilled in the art to make several variations and modifications without departing from the inventive concept, which are all within the scope of protection of the present application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.

Claims (10)

1. The high-luminous-efficiency light-emitting diode epitaxial wafer is characterized by comprising a composite hole layer;
the composite hole layer comprises a hole expansion layer, a first hole layer and a second hole layer which are sequentially stacked, wherein the thickness of the first hole layer is equal to that of the second hole layer, the thickness of the first hole layer and the thickness of the second hole layer are larger than that of the hole expansion layer, the second hole layer is a P-type YInGaN layer, the range of Y components in the P-type YInGaN layer is 0.01-0.5, and the range of in components is 0.01-0.1.
2. The high light efficiency led epitaxial wafer of claim 1, wherein the hole expansion layer thickness ranges from 0.5nm to 5nm, the first hole layer thickness ranges from 1nm to 50nm, and the second hole layer thickness ranges from 1nm to 50nm.
3. The high light efficiency led epitaxial wafer of claim 1, wherein said first hole layer is a P-type InGaN layer having an In composition ranging from 0.01 to 0.2.
4. The high light efficiency led epitaxial wafer of claim 1, further comprising a substrate, a buffer layer, an undoped GaN layer, an n-type GaN layer, a multiple quantum well layer, a P-type GaN layer, and an electron blocking layer, wherein the buffer layer, the undoped GaN layer, the n-type GaN layer, the multiple quantum well layer, the composite hole layer, the P-type GaN layer, and the electron blocking layer are sequentially deposited on the substrate.
5. The high light efficiency light emitting diode epitaxial wafer of claim 4, wherein the multiple quantum well layer comprises a plurality of InGaN quantum well layers and AlGaN quantum barrier layers alternately stacked.
6. The high light efficiency led epitaxial wafer of claim 5, wherein the number of alternating stacked cycles of the multiple quantum well layers ranges from 6 to 12.
7. A method for preparing the high-light-efficiency light-emitting diode epitaxial wafer according to any one of claims 1 to 6, comprising the following steps:
providing a substrate;
depositing a buffer layer on the substrate;
depositing an undoped GaN layer on the buffer layer;
depositing an n-type GaN layer on the undoped GaN layer;
depositing a multi-quantum well layer on the n-type AlGaN layer;
depositing a composite hole layer on the multiple quantum well layer, wherein the composite hole layer comprises a hole expansion layer, a first hole layer and a second hole layer which are sequentially laminated, the thickness of the first hole layer is equal to that of the second hole layer, the thickness of the first hole layer and the thickness of the second hole layer are larger than that of the hole expansion layer, the second hole layer is a P-type YInGaN layer, wherein the range of Y components in the P-type YInGaN layer is 0.01-0.5, and the range of in components is 0.01-0.1;
depositing an electron blocking layer on the composite hole layer;
and depositing a P-type GaN layer on the electron blocking layer.
8. The method of claim 7, wherein the first hole layer and the second hole layer have Mg doping concentrations ranging from 1e+19atoms/cm 3 ～1E+21atoms/cm 3 。
9. The method for preparing a high light efficiency light emitting diode epitaxial wafer according to claim 7, wherein the hole expansion layer is grown in an atmosphere N 2 /NH 3 The ratio range is 1:10-10:1, and the growth atmosphere N of the first hole layer and the second hole layer is that of the first hole layer 2 /H 2 /NH 3 The ratio range is 1:1:1 to 1:10:10.
10. The method of manufacturing a high efficiency led epitaxial wafer of claim 7, wherein the growth temperature of the hole extension layer is in the range of 800 ℃ to 900 ℃, the growth temperature of the first hole layer and the second hole layer is in the range of 700 ℃ to 800 ℃, and the growth pressures of the hole extension layer, the first hole layer and the second hole layer are in the range of 50torr to 300torr.
CN202310991563.0A 2023-08-08 2023-08-08 High-light-efficiency light-emitting diode epitaxial wafer and preparation method thereof Pending CN116885061A (en)

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