CN116230823A - Efficient light-emitting diode epitaxial wafer and preparation method thereof - Google Patents

Efficient light-emitting diode epitaxial wafer and preparation method thereof Download PDF

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CN116230823A
CN116230823A CN202310366837.7A CN202310366837A CN116230823A CN 116230823 A CN116230823 A CN 116230823A CN 202310366837 A CN202310366837 A CN 202310366837A CN 116230823 A CN116230823 A CN 116230823A
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layer
doped
epitaxial wafer
electron blocking
type gan
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程龙
郑文杰
高虹
刘春杨
胡加辉
金从龙
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Jiangxi Zhao Chi Semiconductor Co Ltd
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Jiangxi Zhao Chi Semiconductor Co Ltd
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
    • H—ELECTRICITY
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004—Devices characterised by their operation
    • H01L33/0008—Devices characterised by their operation having p-n or hi-lo junctions
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H—ELECTRICITY
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H01L33/325—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen characterised by the doping materials
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Abstract

The invention provides a high-efficiency light-emitting diode epitaxial wafer and a preparation method thereof, wherein the light-emitting diode epitaxial wafer comprises a substrate, and a buffer layer, an undoped GaN layer, an N-type electron blocking layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially deposited on the substrate; the N-type electron blocking layer comprises a SiN layer and an Al layer which are sequentially deposited on the N-type GaN layer a Si 1‑a N layer and superlattice layer, the superlattice layer includes Si doped Al alternately deposited in turn according to preset period b Ga 1‑b N layer and non-doped Al x In y Ga 1‑x‑y And N layers. The invention reduces the movement of electrons by inserting an N-type electron blocking layer between the N-type GaN layer and the multiple quantum well layerThe speed is effectively reduced, electrons in the N-type GaN layer reach the P-type GaN layer through flushing the multiple quantum well layers, non-radiative recombination is generated between the electrons and the holes, and the radiative recombination efficiency of the electrons and the holes in the quantum well layers is improved.

Description

Efficient light-emitting diode epitaxial wafer and preparation method thereof
Technical Field
The invention relates to the technical field of photoelectricity, in particular to a high-efficiency light-emitting diode epitaxial wafer and a preparation method thereof.
Background
In recent years, with the progress of science and technology, the results of semiconductor materials have become more and more remarkable, and in particular, group nitride semiconductor materials such as GaN, alN, inN and its alloy compounds have been rapidly developed.
Among the semiconductor materials, gaN materials are typical of group compound semiconductor materials, and GaN-based light emitting diodes have many advantages of energy saving, environmental protection, small volume, long life, short lighting response time, adjustable color, and the like. Attracting more and more attention. N-type doping is a necessary step for fabricating semiconductor devices. N-type doping can be effectively realized by doping GaN with Si, and enough electrons are generated to enter a quantum well to be recombined with holes.
Although doping Si in GaN material can generate enough electrons, the transfer speed of electrons in semiconductor is far higher than that of holes in semiconductor, so that electrons in N-type GaN layer doped with Si can cross multiple quantum well layer and reach P-type GaN layer, and non-radiative recombination with holes in P-type GaN layer occurs, reducing luminous efficiency of light emitting diode.
Disclosure of Invention
Based on the above, the invention aims to provide an efficient light-emitting diode epitaxial wafer and a preparation method thereof, so as to solve the problems that the transmission speed of N-type GaN is too high and non-radiative recombination is easy to occur with holes in P-type GaN layers in the prior art.
The first aspect of the present invention provides a high-efficiency light emitting diode epitaxial wafer, comprising a substrate, and a buffer layer, an undoped GaN layer, an N-type electron blocking layer, and a multiple quantum well layer sequentially deposited on the substrateAn electron blocking layer and a P-type GaN layer; the N-type electron blocking layer comprises a SiN layer and an Al layer which are sequentially deposited on the N-type GaN layer a Si 1-a N layers and superlattice layers, wherein the superlattice layers comprise Si doped Al which are sequentially and alternately deposited according to a preset period b Ga 1-b N layer and non-doped Al x In y Ga 1-x- y And N layers.
The beneficial effects of the invention are as follows: the invention provides a high-efficiency LED epitaxial wafer, an N-type electron blocking layer is inserted between an N-type GaN layer and a multiple quantum well layer, wherein the electron blocking layer comprises a SiN layer and an Al layer which are sequentially deposited on the N-type GaN layer a Si 1-a N layer and superlattice layer, the superlattice layer includes Si doped Al alternately deposited in turn according to preset period b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y An N layer; since defects of the substrate can cause heterogenic defects during epitaxial growth, dislocation is easy to generate along the growth direction of the epitaxial layer, and Si doped in the N-type GaN layer is easy to gather in a large amount along the dislocation, so that electric leakage is caused, a SiN layer and Al are deposited on the N-type GaN layer a Si 1-a An N layer to form a compact SiN layer and Al on the N-type GaN layer a Si 1-a The N layer film can effectively prevent dislocation from extending to the epitaxial layer, reduce heterogeneous defects, further reduce Si doping from gathering on the dislocation and prevent electric leakage. Further, alternately deposited Si-doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The superlattice structure formed by the N layer forms a barrier layer and a potential well layer, so that the energy band of the superlattice layer is changed, and electrons are doped with Al in Si b Ga 1-b In the N layer, the electron flow rate is reduced due to the higher potential barrier, and the Al is not doped x In y Ga 1-x-y The In atom radius In the N layer is larger, and the clay effect is provided, so that electrons are remained In the potential well layer, and therefore, through the barrier layer/potential well layer with periodically alternating changes, the situation that electrons In the N type GaN layer are rushed into a plurality of quantum well layers to reach the P type GaN layer to be subjected to non-radiative recombination with holes is effectively reduced, and the radiative recombination efficiency of the electrons and the holes In the quantum well layer is improved.
Preferably, in the Al a Si 1-a The Al content in the N layer gradually rises along the growth direction of the epitaxial wafer, and the value of a is 0.01-1.
Preferably, the Si is doped with Al b Ga 1-b The value of b in the N layer is 0-0.5.
Preferably, the Si is doped with Al b Ga 1-b The concentration of doped Si in the N layer is 1 x 10 16 atoms/cm 3 -1*10 18 atoms/cm 3 。
Preferably, the non-Al-doped alloy x In y Ga 1-x-y The value of x in the N layer is 0-0.1, and the value of y is 0-0.1.
Preferably, the SiN layer has a thickness of 1nm to 100nm, and the Al a Si 1-a The thickness of the N layer is 1nm-100nm, and the Si is doped with Al b Ga 1-b The thickness of the N layer is 1nm-50nm, and the non-doped Al x In y Ga 1-x-y The thickness of the N layer is 1nm-10nm.
Preferably, the preset period is 1-20.
The invention also provides a preparation method for preparing the high-efficiency light-emitting diode epitaxial wafer, which comprises the following steps:
providing a substrate;
sequentially depositing a buffer layer, an undoped GaN layer, an N-type electron blocking layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer on the substrate;
wherein the N-type electron blocking layer comprises a SiN layer and Al which are sequentially deposited on the N-type GaN layer a Si 1-a N layers and superlattice layers, wherein the superlattice layers comprise Si doped Al which are sequentially and alternately deposited according to a preset period b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y And N layers.
Preferably, the growth atmosphere in the growth process of the N-type electron blocking layer is N 2 /NH 3 The component ratio of the mixed gas is 1:5-5:1.
Preferably, the growth pressure in the growth process of the N-type electron blocking layer is 50-300 torr; the SiN layer and the Al layer a Si 1-a The deposition growth temperature of the N layer is 900-110 DEG CAnd the deposition growth temperature of the superlattice layer is 800-1000 ℃.
Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
Fig. 1 is a schematic structural diagram of an efficient led epitaxial wafer provided by the present invention;
fig. 2 is a flowchart of a method for preparing an epitaxial wafer of a high-efficiency light-emitting diode.
Description of main reference numerals:
substrate and method for manufacturing the same 10 Buffer layer 20
Undoped GaN layer 30 N-type GaN layer 40
N-type electron blocking layer 50 SiN layer 51
Al a Si 1-a N layer 52 Superlattice layer 53
Si doped with Al b Ga 1-b N layer 531 Not doped with Al x In y Ga 1-x-y N layer 532
Multiple quantum well layer 60 Electron blocking layer 70
P-type GaN layer 80
The invention will be further described in the following detailed description in conjunction with the above-described figures.
Detailed Description
In order that the invention may be readily understood, a more complete description of the invention will be rendered by reference to the appended drawings. Several embodiments of the invention are presented in the figures. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
The invention provides a high-efficiency light-emitting diode epitaxial wafer and a preparation method thereof, wherein an N-type electron blocking layer is inserted between an N-type GaN layer and a multiple quantum well layer, wherein the electron blocking layer comprises a SiN layer and Al which are sequentially deposited on the N-type GaN layer a Si 1-a N layer and superlattice layer, the superlattice layer includes Si doped Al alternately deposited in turn according to preset period b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y An N layer; through SiN layer and Al a Si 1-a The N layer blocks dislocation extension to the epitaxial layer by alternately deposited Si doped with Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The N layer effectively reduces the non-radiative recombination of electrons penetrating through the multi-quantum well layer and holes in the P-type GaN layer, and improves the radiative recombination efficiency of the electrons and the holes in the N-type GaN layer in the multi-quantum well layer.
Specifically, referring to fig. 1, the high-efficiency light emitting diode epitaxial wafer provided in the embodiment of the invention includes: comprises a substrate 10, a buffer layer 20, an undoped GaN layer 30, an N-type GaN layer 40, an N-type electron blocking layer 50, a multiple quantum well layer 60, an electron blocking layer 70 and a P-type GaN layer 80 which are sequentially deposited on the substrate 10; the N-type electron blocking layer 50 includes a SiN layer 51, al deposited in sequence on the N-type GaN layer 40 a Si 1-a N layers 52 and superlattice layers 53, the superlattice layers 53 comprising sequentially and alternately deposited Al at predetermined periods a Si 1-a Si-doped Al on N layer 52 b Ga 1-b N layer 531 and undoped Al x In y Ga 1-x-y N layer 532.
Specifically, the substrate 10 may be a sapphire substrate or an SiO substrate 2 Sapphire compositeOne of a composite substrate, a silicon carbide substrate, a gallium nitride substrate and a zinc oxide substrate; the sapphire substrate is one of the most commonly used substrates of the light-emitting diode at present, and has the advantages of mature preparation process, lower price, convenient material taking at the bottom, high cost performance, easy cleaning and processing and good stability at high temperature. However, the sapphire substrate surface has very large defects, and direct deposition of the epitaxial layer on the substrate is liable to cause mismatch and form large internal stress, so before the epitaxial layer is deposited on the substrate, the buffer layer 20 needs to be deposited on the substrate 10 to reduce the defects on the sapphire substrate surface to a certain extent, and specifically, the buffer layer 20 may be an AlN buffer layer with a thickness of 10nm-15nm.
The undoped GaN layer 30 is deposited on the buffer layer 20, the thickness of the undoped GaN layer 30 is 1um to 5um, the growth temperature of the undoped GaN layer 30 is higher, the pressure is lower, the quality of the prepared GaN crystal is better, meanwhile, the thickness is increased along with the increase of the GaN thickness, the compressive stress can be released through stacking faults, the line defects are reduced, the crystal quality is improved, the reverse leakage is reduced, but meanwhile, the consumption of Ga source materials is larger due to the increase of the GaN layer thickness, and the epitaxial cost of a Light Emitting Diode (LED) is greatly improved, so that further, in order to achieve the quality and the production cost of the light emitting diode, the undoped GaN layer 30 is preferably 2um to 3um. The main function of the N-type GaN layer 40 in the LED is to provide enough electrons for the LED to emit light, and the electrons of the N-type GaN layer 40 are radiative and recombined with holes in the multiple quantum well layer 60 to emit light, and the more electrons are radiative and recombined with holes, the better the light emitting effect of the LED. Specifically, the thickness of the N-type GaN layer 40 is 2um-3um, and the sufficiently thick N-type GaN layer can effectively release the luminous efficiency of the stress led.
The N-type electron blocking layer 50 comprises a SiN layer 51 and Al sequentially deposited on the N-type GaN layer 40 a Si 1-a The N layer 52 and the superlattice layer 53, specifically, the SiN layer 51 has a thickness of 1nm to 100nm, al a Si 1-a The thickness of the N layer 52 is 1nm-100nm, and Si is doped with Al b Ga 1-b The thickness of the N layer 531 is 1nm-50nm, and Al is not doped x In y Ga 1-x-y The thickness of the N layer 532 is 1nm to 10nm. Further, in Al a Si 1-a In the N layer, the Al content gradually increases along the growth direction of the epitaxial wafer, and the value of a is 0.01-1, namely, the Al a Si 1-a The Al component content in the N layer is 0.01-1 and gradually increases along the growth direction of the epitaxial wafer.
Since the buffer layer 20 is added on the surface of the substrate 10 during epitaxial growth of GaN-based material, defects of the substrate 10 cannot be completely eliminated, and thus heterogeneous defects may be generated during epitaxial growth of GaN-based material on the buffer layer, resulting in lattice mismatch and thermal mismatch, and further dislocation is easily generated along the growth direction of the epitaxial layer, however Si is greatly accumulated along the dislocation due to Si doping in the GaN-based material, resulting in LED leakage; thus, siN layer 51 and Al are deposited on N-type GaN layer 40 a Si 1-a The N layer 52 forms a dense film on the N-type GaN layer 40, effectively blocks dislocation from extending in the extension direction of the epitaxial layer, reduces hetero-defects, reduces Si doping from gathering on the dislocation, and prevents leakage.
Specifically, al a Si 1-a In the N layer 52, the Al component gradually increases in the growth direction of the epitaxial wafer so that Al a Si 1-a The barrier of N layer 52 is higher, which can reduce the rate of electrons flowing to multiple quantum well layer 60 in N-type GaN layer 40. Further, si is doped with Al b Ga 1-b The value of b in the N layer 531 is 0-0.5, and the concentration of doped Si is 1 x 10 16 atoms/cm 3 -1*10 18 atoms/cm 3 . Not doped with Al x In y Ga 1-x-y The value of x in the N layer 532 is 0-0.1 and the value of y is 0-0.1. Alternately deposited on Al a Si 1-a Si-doped Al on N layer 52 b Ga 1-b N layer 531 and undoped Al x In y Ga 1-x-y The period of the N layer 532 is 1-20. Alternately deposited Si-doped Al b Ga 1-b N layer 531 and undoped Al x In y Ga 1-x-y The superlattice layer 53 formed of the N layer 532 constitutes an alternating barrier layer/well layer; so that the superlattice layer 53 forms a structure with energy band height variation, and electrons in the N-type GaN layer 40 are doped with Al in Si b Ga 1-b In the N layer 531, the electron flow velocity decreases due to its higher potential barrier; in the absence of doped Al x In y Ga 1-x-y The N layer 532 has a clay effect due to the larger radius of In atoms, and the electrons are partially remained In the potential well layer, so that non-radiative recombination of electrons rushing through the multiple quantum well layer and holes of the P-type GaN layer is effectively reduced through the alternately deposited barrier layers/potential well layers, and the efficiency of the electrons and the holes In the multiple quantum well layer is improved.
Referring to fig. 2, a method for preparing an epitaxial wafer of a high-efficiency light-emitting diode according to an embodiment of the present invention is specifically used for preparing the epitaxial wafer of the high-efficiency light-emitting diode, and the method for preparing the epitaxial wafer of the high-efficiency light-emitting diode provided by the present invention includes steps S10-S90.
Step S10, providing a substrate;
specifically, the substrate can be one of a sapphire substrate, a SiO2 sapphire composite substrate, a silicon carbide substrate, a gallium nitride substrate and a zinc oxide substrate. Sapphire is the most commonly used GaN-based LED substrate material at present, and the sapphire substrate has the greatest advantages of mature technology, good stability and low production cost. Therefore, in this embodiment mode, sapphire is used as a substrate.
Step S20, depositing a buffer layer on a substrate;
specifically, physical vapor deposition (Physical Vapor Deposition, PVD) can be adopted to deposit a buffer layer on the substrate, the thickness of the buffer layer is 15nm-20nm, in the embodiment, alN buffer layer is adopted to control the crystal defect of the substrate, the quality of the subsequently grown crystal is improved, and the stress between the substrate and the epitaxial layer caused by lattice mismatch and thermal mismatch is relieved.
Step S30, preprocessing the substrate on which the buffer layer is deposited.
Specifically, the sapphire substrate on which the buffer layer has been deposited is transferred to a medium-micro A7 Metal organic vapor deposition (MOCVD for Metal-organic Chemical Vapor Deposition) equipment, in which high purity H can be used 2 (Hydrogen), high purity N 2 (Nitrogen) high purity H 2 And high purity N 2 Is used as carrier gas, high-purity NH 3 As N source, trimethylgallium (TMGa) and triethylgallium (TEGa) as gallium source, trimethylindium (TMIn) as gallium sourceIndium source, trimethylaluminum (TMAL) as aluminum source, silane (SiH) 4 ) As an N-type dopant, magnesium-bis-cyclopentadienyl (CP 2 Mg) was epitaxially grown as a P-type dopant.
Specifically, the substrate on which the buffer layer has been deposited is subjected to a process of H 2 The atmosphere is treated for 1min-10min, the treatment temperature is 1000 ℃ to 1200 ℃, and then nitriding treatment is carried out on the GaN epitaxial layer, so that the crystal quality of the buffer layer is improved, and the crystal quality of the GaN epitaxial layer deposited subsequently can be effectively improved.
In step S40, an undoped GaN layer is deposited on the buffer layer.
After nitriding the substrate on which the buffer layer is deposited, depositing an undoped GaN layer in MOCVD equipment by adopting high-purity NH 3 As an N source, trimethylgallium (TMGa) and triethylgallium (TEGa) as a gallium source; the growth temperature of the undoped GaN layer is 1050-1200 ℃, the pressure is 100-600 torr, and the thickness is 1-5 um; optionally, the growth temperature of the undoped GaN layer is 1100 ℃, the growth pressure is 150torr, the growth temperature of the undoped GaN layer is higher, the pressure is lower, the prepared crystal quality of the GaN is better, along with the increase of the thickness of the GaN, the compressive stress in the undoped GaN layer can be released through stacking faults, the line defect is reduced, the crystal quality is improved, the reverse leakage current is reduced, but the consumption of Ga source materials is larger by improving the thickness of the GaN layer, the epitaxial cost of the LED is greatly improved, and the optional undoped GaN growth thickness is 2um-3um, so that the production cost is saved, and the GaN material has higher crystal quality.
And S50, depositing an N-type GaN layer on the undoped GaN layer.
Specifically, after the undoped GaN layer is deposited, continuously depositing an N-type GaN layer in MOCVD equipment, wherein the growth temperature of the N-type GaN layer is 1050-1200 ℃, the pressure is 100-600 torr, the deposition thickness is 2-3 um, doping is carried out by adopting Si, and the doping concentration of Si is 1 x 10 19 atoms/cm 3 -5*10 19 atoms/cm 3 . Optionally, the growth temperature of the N-type GaN layer is 1120 ℃, the growth pressure is 100torr, the growth thickness is 2um-3um, and the Si doping concentration is 2.5 x 10 19 atoms/cm 3 . Doping Si impurity into the GaN layer can provide sufficient electrons for LED light emission, and electrons of the N-type GaN layer 40 and empty spaces in the multiple quantum well layer 60The holes are subjected to radiation recombination to emit light, and the more electrons and holes are subjected to radiation recombination, the better the light emitting effect of the LED is. In addition, the resistivity of the N-type GaN layer is higher than that of the transparent electrode on the P-type GaN layer, so that sufficient Si doping can effectively increase electrons in the N-type GaN layer, reduce the layer resistivity of the N-type GaN layer, enable more electrons to enter the multiple quantum well layer for recombination, and in addition, the sufficient thickness of the N-type GaN can effectively reduce line defects, release compressive stress and improve the luminous efficiency of the light-emitting diode.
Step S60, depositing an N-type electron blocking layer on the N-type GaN layer.
Specifically, depositing SiN layer and Al layer on the N-type GaN layer in turn a Si 1-a N layers and superlattice layers, wherein the superlattice layers comprise Si doped Al which are sequentially and alternately deposited according to a preset period b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y And N layers. Specifically, the SiN layer has a deposition thickness of 1nm-100nm, al a Si 1-a The deposition thickness of the N layer is 1nm-100nm, and Si is doped with Al b Ga 1-b The deposition thickness of the N layer is 1nm-50nm, and Al is not doped x In y Ga 1-x-y The deposition thickness of the N layer is 1nm-10nm. At Al a Si 1-a In the N layer, the Al content gradually rises along the growth direction of the epitaxial wafer, the value of a is 0.01-1, and Si is doped with Al b Ga 1-b The value of b in the N layer is 0-0.5, and the concentration of doped Si is 1 x 10 16 atoms/cm 3 -1*10 18 atoms/cm 3 . Not doped with Al x In y Ga 1-x-y The value of x in the N layer 532 is 0-0.1, and the value of y is 0-0.1; alternatively, the SiN layer is deposited to a thickness of 65nm, al a Si 1-a The deposition thickness of the N layer is 50nm, and Si is doped with Al b Ga 1-b The deposition thickness of the N layer is 25nm, and Al is not doped x In y Ga 1-x-y The deposition thickness of the N layer is 2.5nm, and the N layer is formed on Al a Si 1-a In the N layer, the Al content gradually rises to 0.6 along the growth direction of the epitaxial wafer, and Si is doped with Al b Ga 1-b The value of b in the N layer is 0.3, and the concentration of doped Si is 5 x 10 17 atoms/cm 3 Not doped with Al x In y Ga 1-x-y N layer 532, x is 0.08 and y is 0.05.
In addition, in the deposition growth of the N-type electron blocking layer, the SiN layer and the Al a Si 1-a The deposition temperature of the N layer is 900-1100 ℃, and Si is deposited and grown to be doped with Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The temperature of the N layer is 800-1000 ℃. The growth atmosphere in the deposition and growth process of the N-type electron blocking layer is N 2 /NH 3 The mixed gas with the component ratio of 1:5-5:1 has the growth pressure of 50-300 torr in the growth process. Alternately deposited Si-doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The deposition period of the N layer is 1-20. Optionally, siN layer and Al a Si 1-a The deposition temperature of the N layer is 1020 ℃, and Si is deposited and grown to be doped with Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The temperature of the N layer is 900 ℃, the SiN layer and the Al layer a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The growth atmosphere in the deposition and growth process of the N layer is N 2 /NH 3 The composition ratio of the mixed gas is 1:3, and the growth pressure in the growth process is 150torr. Alternately deposited Si-doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The deposition period of the N layer was 6.
By depositing SiN and Al layers on an N-type GaN layer a Si 1-a The N layer enables the N-type GaN layer to form a compact film, dislocation on the N-type GaN layer can be effectively prevented from extending to the epitaxial layer, heterogeneous defects are reduced, si doping is reduced to gather on the dislocation, and electric leakage is prevented. Further, alternately deposited Si-doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The superlattice structure formed by the N layer forms a barrier layer and a potential well layer, so that the energy band of the superlattice layer is changed, and electrons in the N-type GaN layer are doped with Al in Si b Ga 1-b In the N layer, the electron flow rate is reduced due to the higher potential barrier, and the Al is not doped x In y Ga 1-x-y The N layer has a clay effect due to larger radius of In atoms, and electrons are generatedAnd the electrons in the N-type GaN layer are effectively reduced to reach the P-type GaN layer and the holes to generate non-radiative recombination through the barrier layers/potential well layers which are alternately changed in period, so that the radiative recombination efficiency of the electrons and the holes in the quantum well layer is improved.
Step S70, depositing a multi-quantum well layer on the N-type electron blocking layer.
Specifically, the multi-quantum well layer is an InGaN quantum well layer and an AlGaN quantum barrier layer which are deposited alternately, the deposition cycle number is 6-12, the deposition growth temperature of the InGaN quantum well layer is 790-810 ℃, the thickness is 2-5 nm, the growth pressure is 50-300 torr, and the in component is 0.01-0.3. The deposition growth temperature of the AlGaN quantum barrier layer is 800-900 ℃, the thickness is 5-15 nm, the growth pressure is 50-300 torr, and the Al component is 0.01-0.1. Alternatively, the multiple quantum well layers are alternately deposited InGaN quantum well layers and AlGaN quantum barrier layers, the deposition cycle number is 10, wherein the deposition growth temperature of the InGaN quantum well layers is 795 ℃, the thickness of the InGaN quantum well layers is 3.5nm, the growth pressure is 200torr, and the in component is 0.15. The deposition growth temperature of the AlGaN quantum barrier layer is 855 ℃, the thickness is 9.8nm, the growth pressure is 200torr, and the Al component is 0.05. The multi-quantum well layer is an area where electrons and holes are combined by radiation, and the overlapping degree of wave functions of the electrons and the holes can be remarkably increased by reasonable structural design, so that the luminous efficiency of the LED device is improved.
Step S80, depositing an electron blocking layer on the multiple quantum well layer.
Specifically, the electron blocking layer is Al n In m The GaN layer has a thickness of 10nm-40nm, a growth temperature of 900-1000 ℃ and a growth pressure of 100-300 torr, wherein Al n In m The value of n in the GaN layer is 0.005-0.1, and the value of m is 0.01-0.2. Optionally, the electron blocking layer has a thickness of 15nm, a growth temperature of 965deg.C, and a growth pressure of 200torr, wherein Al n In m Al in the GaN layer gradually rises from 0.01 to 0.05 along the growth direction of the epitaxial layer, and the value of m is 0.01. The electron blocking layer can not only effectively limit electron overflow in the multi-quantum well layer, but also reduce blocking of holes in the P-type GaN layer, improve injection efficiency of the holes to the multi-quantum well, reduce carrier auger recombination, and improve light-emitting of the light-emitting diodeLight efficiency.
In step S90, a P-type GaN layer is deposited on the electron blocking layer.
Specifically, the growth temperature of the P-type GaN layer is 900-1050 ℃, the thickness is 10-50 nm, the growth pressure is 100-600 torr, and the doping concentration of Mg is 1 x 10 19 atoms/cm 3 ～1*10 21 atoms/cm 3 . Optionally, the growth temperature of the P-type GaN layer is 985 ℃, the thickness is 15nm, the growth pressure is 200torr, and the doping concentration of Mg is 2 x 10 20 atoms/cm 3 . Too high a Mg doping concentration can damage the crystal quality, while a lower doping concentration can affect the hole concentration. In addition, for the LED structure containing the V-shaped pits, the higher growth temperature of the P-type GaN layer is favorable for combining the V-shaped pits, so that the LED epitaxial wafer with a smooth surface is obtained.
Example 1
In the embodiment, a sapphire substrate is selected, and the sapphire has the advantages of good thermal stability and chemical stability, high mechanical strength, mature technology, relatively low price and the like. SiN layer, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The thickness of the N layer is 1nm/85nm/50nm/5nm, respectively, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The Al components in the N layer are respectively 0.01/0.5/0.05, and Si is doped with Al b Ga 1-b The concentration of doped Si in the N layer is 1 x 10 16 atoms/cm 3 Not doped with Al x In y Ga 1-x-y The In component In the N layer is 0, and the growth atmosphere In the deposition growth process of the N-type electron blocking layer is N 2 /NH 3 The component ratio is 1:5, alternately deposited Si doped with Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The deposition period of the N layer was 1.
Example 2
The light emitting diode epitaxial wafer in this embodiment is different from the light emitting diode epitaxial wafer in embodiment 1 in that. SiN layer, al a Si 1-a N layer, si doped Al b Ga 1-b N layerNot doped with Al x In y Ga 1-x-y The thickness of the N layer is 10nm/50nm/45nm/3nm, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The Al components in the N layer are respectively 0.1/0.01/0, and Si is doped with Al b Ga 1-b The concentration of doped Si in the N layer is 1 x 10 17 atoms/cm 3 Not doped with Al x In y Ga 1-x-y The In component In the N layer is 0.05, and the growth atmosphere In the deposition growth process of the N-type electron blocking layer is N 2 /NH 3 The component ratio is 1:3, alternately deposited Si doped with Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The deposition period of the N layer was 12.
Example 3
The light emitting diode epitaxial wafer in this embodiment is different from the light emitting diode epitaxial wafer in embodiment 1 in that. SiN layer, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The thickness of the N layer is 30nm/55nm/30nm/2.5nm, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The Al components in the N layer are respectively 0.6/0/0.1, and Si is doped with Al b Ga 1-b The concentration of doped Si in the N layer is 2 x 10 16 atoms/cm 3 Not doped with Al x In y Ga 1-x-y The In composition In the N layer is 0.1, and the growth atmosphere In the deposition growth process of the N-type electron blocking layer is N 2 /NH 3 The component ratio is 1:4, alternately deposited Si doped with Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The deposition period of the N layer was 5.
Example 4
The light emitting diode epitaxial wafer in this embodiment is different from the light emitting diode epitaxial wafer in embodiment 1 in that. SiN layer, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The thickness of the N layers is 55nm/100nm/25nm/1nm，Al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The Al components in the N layer are respectively 0.4/0.2/0.06, and Si is doped with Al b Ga 1-b The concentration of doped Si in the N layer is 5 x 10 17 atoms/cm 3 Not doped with Al x In y Ga 1-x-y The In component In the N layer is 0.08, and the growth atmosphere In the deposition growth process of the N-type electron blocking layer is N 2 /NH 3 The component ratio is 2:1, alternately deposited Si doped with Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The deposition period of the N layer was 4.
Example 5
The light emitting diode epitaxial wafer in this embodiment is different from the light emitting diode epitaxial wafer in embodiment 1 in that. SiN layer, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The thickness of the N layer is 65nm/50nm/40nm/6nm, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The Al components in the N layer are respectively 0.8/0.01/0.04, and Si is doped with Al b Ga 1-b The concentration of doped Si in the N layer is 2 x 10 17 atoms/cm 3 Not doped with Al x In y Ga 1-x-y The In component In the N layer is 0.05, and the growth atmosphere In the deposition growth process of the N-type electron blocking layer is N 2 /NH 3 The component ratio is 1:3, alternately deposited Si doped with Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The deposition period of the N layer was 6.
Example 6
The light emitting diode epitaxial wafer in this embodiment is different from the light emitting diode epitaxial wafer in embodiment 1 in that. SiN layer, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The thickness of the N layer is 75nm/10nm/1nm/10nm respectively, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The Al components in the N layer are respectively 0.7/0.4/0.08, and Si is doped with Al b Ga 1-b The concentration of doped Si in the N layer is 8 x 10 16 atoms/cm 3 Not doped with Al x In y Ga 1-x-y The In component In the N layer is 0.02, and the growth atmosphere In the deposition growth process of the N-type electron blocking layer is N 2 /NH 3 The component ratio is 1:1, alternately deposited Si doped with Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The deposition period of the N layer was 1.
Example 7
The light emitting diode epitaxial wafer in this embodiment is different from the light emitting diode epitaxial wafer in embodiment 1 in that. SiN layer, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The thickness of the N layer is 80nm/50nm/35nm/6nm, respectively, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The Al components in the N layer are 1/0.3/0.06 respectively, and Si is doped with Al b Ga 1-b The concentration of doped Si in the N layer is 1 x 10 18 atoms/cm 3 Not doped with Al x In y Ga 1-x-y The In component In the N layer is 0.04, and the growth atmosphere In the deposition growth process of the N-type electron blocking layer is N 2 /NH 3 The component ratio is 5:1, alternately deposited Si doped with Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The deposition period of the N layer was 20.
Example 8
The light emitting diode epitaxial wafer in this embodiment is different from the light emitting diode epitaxial wafer in embodiment 1 in that. SiN layer, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The thickness of the N layer is 100nm/80nm/35nm/5nm, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The Al components in the N layer are respectively 0.95/0.5/0.03, and Si is doped with Al b Ga 1-b The concentration of doped Si in the N layer is 5 x 10 17 atoms/cm 3 Not doped with Al x In y Ga 1-x-y The In component In the N layer is 0.05, and the growth atmosphere In the deposition growth process of the N-type electron blocking layer is N 2 /NH 3 The component ratio is 1:2, alternately deposited Si doped with Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The deposition period of the N layer was 7.
Example 9
The light emitting diode epitaxial wafer in this embodiment is different from the light emitting diode epitaxial wafer in embodiment 1 in that. SiN layer, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The thickness of the N layer is 20nm/1nm/25nm/1nm, al a Si 1-a N layer, si doped Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The Al components in the N layer are respectively 0.85/0.3/0.1, and Si is doped with Al b Ga 1-b The concentration of doped Si in the N layer is 8 x 10 17 atoms/cm 3 Not doped with Al x In y Ga 1-x-y The In composition In the N layer is 0.1, and the growth atmosphere In the deposition growth process of the N-type electron blocking layer is N 2 /NH 3 The component ratio is 1:3, alternately deposited Si doped with Al b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y The deposition period of the N layer was 15.
Comparative example
The light emitting diode epitaxial wafer in this embodiment is different from the light emitting diode epitaxial wafer in embodiment 1 in that an N-type electron blocking layer is not interposed between the N-type GaN layer and the multiple quantum well layer.
Referring to table 1, the results of comparing the parameters and the corresponding light transmittance of the above examples and comparative examples are shown.
TABLE 1
Figure BDA0004167138360000131
As can be seen from Table 1, compared with the existing light-emitting diode epitaxial wafer prepared in mass production, the high-efficiency light-emitting diode epitaxial wafer provided by the invention has the advantage that the photoelectric efficiency is improved by 1% -5%.
It should be noted that the foregoing implementation process is only for illustrating the feasibility of the present application, but this does not represent that the high-efficiency led epitaxial wafer of the present application has only the foregoing implementation processes, and instead, the present application can be incorporated into the feasible embodiments of the present application as long as the high-efficiency led epitaxial wafer of the present application can be implemented. In addition, in the embodiment of the present invention, the structural part of the light emitting diode epitaxial wafer corresponds to the part of the method for preparing the light emitting diode epitaxial wafer of the present invention, and specific implementation details thereof are the same, which is not described herein again.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.

Claims (10)

1. The high-efficiency light-emitting diode epitaxial wafer is characterized by comprising a substrate, and a buffer layer, an undoped GaN layer, an N-type electron blocking layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially deposited on the substrate;
the N-type electron blocking layer comprises a SiN layer and an Al layer which are sequentially deposited on the N-type GaN layer a Si 1-a N layers and superlattice layers, wherein the superlattice layers comprise Si doped Al which are sequentially and alternately deposited according to a preset period b Ga 1-b N layer and non-doped Al x In y Ga 1-x-y And N layers.
2. The epitaxial wafer of claim 1, wherein, in the Al a Si 1-a The Al content in the N layer gradually rises along the growth direction of the epitaxial wafer, and the value of a is 0.01-1.
3. The epitaxial wafer of claim 1, wherein the Si is doped with Al b Ga 1-b The value of b in the N layer is 0-0.5.
4. The epitaxial wafer of claim 1, wherein the Si is doped with Al b Ga 1-b The concentration of doped Si in the N layer is 1 x 10 16 atoms/cm 3 -1*10 18 atoms/cm 3 。
5. The epitaxial wafer of claim 1, wherein the undoped Al x In y Ga 1-x-y The value of x in the N layer is 0-0.1, and the value of y is 0-0.1.
6. The epitaxial wafer of claim 1, wherein the SiN layer has a thickness of 1nm to 100nm, and the Al layer is a Si 1-a The thickness of the N layer is 1nm-100nm, and the Si is doped with Al b Ga 1-b The thickness of the N layer is 1nm-50nm, and the non-doped Al x In y Ga 1-x-y The thickness of the N layer is 1nm-10nm.
7. The epitaxial wafer of claim 1, wherein the predetermined period is 1-20.
8. A method for producing the epitaxial wafer according to any one of claims 1 to 7, characterized in that the production method comprises the steps of:
providing a substrate;
sequentially depositing a buffer layer, an undoped GaN layer, an N-type electron blocking layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer on the substrate;
wherein the N-type electron blocking layer comprises a SiN layer and Al which are sequentially deposited on the N-type GaN layer a Si 1-a N layers and superlattice layers, wherein the superlattice layers comprise Si doped Al which are sequentially and alternately deposited according to a preset period b Ga 1-b N layer and non-doped Al x In y Ga 1-x- y And N layers.
9. The method of manufacturing according to claim 8, wherein: the growth atmosphere in the growth process of the N-type electron blocking layer is N 2 /NH 3 The component ratio of the mixed gas is 1:5-5:1.
10. The method of manufacturing according to claim 8, wherein: the growth pressure in the growth process of the N-type electron blocking layer is 50-300 torr;
the SiN layer and the Al layer a Si 1-a The deposition growth temperature of the N layer is 900-1100 ℃, and the deposition growth temperature of the superlattice layer is 800-1000 ℃.
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CN116598395A (en) * 2023-07-14 2023-08-15 江西兆驰半导体有限公司 Light-emitting diode and preparation method thereof
CN116936701A (en) * 2023-09-19 2023-10-24 江西兆驰半导体有限公司 LED epitaxial wafer, preparation method and LED chip
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116598395A (en) * 2023-07-14 2023-08-15 江西兆驰半导体有限公司 Light-emitting diode and preparation method thereof
CN116598395B (en) * 2023-07-14 2023-09-29 江西兆驰半导体有限公司 Light-emitting diode and preparation method thereof
CN116936701A (en) * 2023-09-19 2023-10-24 江西兆驰半导体有限公司 LED epitaxial wafer, preparation method and LED chip
CN116936701B (en) * 2023-09-19 2023-12-01 江西兆驰半导体有限公司 LED epitaxial wafer, preparation method and LED chip
CN117153968A (en) * 2023-10-30 2023-12-01 江西兆驰半导体有限公司 Deep ultraviolet light-emitting diode epitaxial wafer, preparation method thereof and deep ultraviolet light-emitting diode
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